Carbon Cortex-M3 User manual

Carbon Cortex-M3 Model
User Guide for
SoC Designer Plus
Carbon Model Version 4.0.0
For the ARM Cortex-M3 Processor
Silicon Version: r2p0
The Trusted Path to Accuracy ™
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Carbon Design Systems, Inc. Confidential
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Document revised August 2013.

Carbon Design Systems, Inc. Confidential

Carbon Design Systems, Inc. Confidential
Contents
Chapter 1.
Using the Model Kit Component in SoC Designer Plus
Cortex-M3 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1
Fully Functional and Accurate Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2
Fully Functional and Approximate Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2
Hardware Features not Implemented . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2
Differences from the ARM RVML Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3
Features Additional to the Hardware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4
Adding and Configuring the SoC Designer Plus Component . . . . . . . . . . . . . . . . . . . . . . . .1-4
Carbon SoC Designer Plus Component Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4
Adding the Carbon Model to the Component Library . . . . . . . . . . . . . . . . . . . . . . . . . .1-5
Adding the Component to the SoC Designer Canvas . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6
Available Component ESL Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-6
Transaction Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-8
Clock Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Setting Component Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-9
Debug Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12
Register Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-12
Run To Debug Point Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-19
Memory Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-20
Disassembly View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-20
Available Profiling Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-21
Hardware Profiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-21
Software Profiling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-21

vi Contents
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Carbon Design Systems, Inc. Confidential
Preface
A Carbon Model component is a library developed from ARM intellectual property (IP)
that is generated through Carbon Model Studio™. The model then can be used within a
virtual platform tool, for example, Carbon SoC Designer Plus.
About This Guide
This guide provides all the information needed to configure and use the Carbon Cortex-
M3 Model in Carbon SoC Designer Plus.
Audience
This guide is intended for experienced hardware and software developers who create com-
ponents for use with Carbon SoC Designer Plus. You should be familiar with the follow-
ing products and technology:
• Carbon SoC Designer Plus
• Hardware design verification
• Verilog or VHDL programming language

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Conventions
This guide uses the following conventions:
Also note the following references:
• References to C code implicitly apply to C++ as well.
• File names ending in .cc, .cpp, or .cxx indicate a C++ source file.
Convention Description Example
courier Commands, functions,
variables, routines, and
code examples that are set
apart from ordinary text.
sparseMem_t SparseMemCreate-
New();
italic New or unusual words or
phrases appearing for the
first time.
Transactors provide the entry and exit
points for data ...
bold Action that the user per-
forms. Click Close to close the dialog.
<text> Values that you fill in, or
that the system automati-
cally supplies.
<platform>/ represents the name of
various platforms.
[ text ] Square brackets [ ] indicate
optional text. $CARBON_HOME/bin/modelstudio
[ <filename> ]
[ text1 | text2 ] The vertical bar | indicates
“OR,” meaning that you
can supply text1 or text 2.
$CARBON_HOME/bin/modelstudio
[<name>.symtab.db |
<name>.ccfg ]

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Further reading
This section lists related publications by Carbon and by third parties.
Carbon SoC Designer Plus Documentation
The following publications provide information that relate directly to SoC Designer Plus:
• Carbon SoC Designer Plus Installation Guide
• Carbon SoC Designer Plus User Guide
• Carbon SoC Designer Plus Standard Model Library Reference Manual
• Carbon SoC Designer Plus AHBv2 Protocol Bundle User Guide
External publications
The following publications provide reference information about ARM® products:
• Cortex-M3 Technical Reference Manual
• AMBA 3 AHB-Lite Overview
• AMBA Specification (Rev 2.0)
• AMBA AHB Transaction Level Modeling Specification
• Architecture Reference Manual
• ARM RealView Model Debugger User Guide
See http://infocenter.arm.com/help/index.jsp for access to ARM documentation.
The following publications provide additional information on simulation:
• IEEE 1666™ SystemC Language Reference Manual, (IEEE Standards Association)
• SPIRIT User Guide, Revision 1.2, SPIRIT Consortium.

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Glossary
AMBA Advanced Microcontroller Bus Architecture. The ARM open standard on-chip
bus specification that describes a strategy for the interconnection and manage-
ment of functional blocks that make up a System-on-Chip (SoC).
AHB Advanced High-performance Bus. A bus protocol with a fixed pipeline
between address/control and data phases. It only supports a subset of the func-
tionality provided by the AMBA AXI protocol.
APB Advanced Peripheral Bus. A simpler bus protocol than AXI and AHB. It is
designed for use with ancillary or general-purpose peripherals such as timers,
interrupt controllers, UARTs, and I/O ports.
AXI Advanced eXtensible Interface. A bus protocol that is targeted at high perfor-
mance, high clock frequency system designs and includes a number of fea-
tures that make it very suitable for high speed sub-micron interconnect.
Carbon Model A software object created by the Carbon Model Studio (or Carbon compiler)
from an RTL design. The Carbon Model contains a cycle- and register-accu-
rate model of the hardware design.
Carbon Model
Studio Carbon’s graphical tool for generating, validating, and executing hardware- accurate software models. It creates a Carbon Model, and it also takes a Car-
bon Model as input and generates a Carbon component that can be used in
SoC Designer Plus, Platform Architect, or OSCI SystemC for simulation.
CASI ESL API Simulation Interface, is based on the SystemC communication
library and manages the interconnection of components and communication
between components.
CADI ESL API Debug Interface, enables reading and writing memory and register
values and also provides the interface to external debuggers.
CAPI ESL API Profiling Interface, enables collecting historical data from a compo-
nent and displaying the results in various formats.
Component Building blocks used to create simulated systems. Components are connected
together with unidirectional transaction-level or signal-level connections.
ESL Electronic System Level. A type of design and verification methodology that
models the behavior of an entire system using a high-level language such as C
or C++.
HDL Hardware Description Language. A language for formal description of elec-
tronic circuits, for example, Verilog or VHDL.
RTL Register Transfer Level. A high-level hardware description language (HDL)
for defining digital circuits.
SoC Designer The full name is Carbon SoC Designer Plus. A high-performance, cycle accu-
rate simulation framework which is targeted at System-on-a-Chip hardware
and software debug as well as architectural exploration.
SystemC SystemC is a single, unified design and verification language that enables ver-
ification at the system level, independent of any detailed hardware and soft-
ware implementation, as well as enabling co-verification with RTL design.
Transactor Transaction adaptors. You add transactors to your Carbon component to con-
nect your component directly to transaction level interface ports for your par-
ticular platform.