Cherry theobroma systems JAGUAR SBC-RK3588-AMR User manual

featuring the Rockchip RK3588 cutting-edge processor
Autonomous Mobile Robots
JAGUAR SBC-RK3588-AMR
USER MANUAL
Single Board Computer for
Document revision: v1.0
Issue date: Nov 28, 2023


Contents
1 Introduction 1
1.1 DeviceOverview .................................................. 1
1.2 Precautions ..................................................... 2
2 Interfaces 3
2.1 PowerSupply.................................................... 3
2.2 USBSerialConsole................................................. 4
2.3 Buttons ....................................................... 6
2.4 FAN ......................................................... 7
2.5 CAN......................................................... 8
2.6 RS-485 ....................................................... 8
2.7 Battery........................................................ 9
2.8 MezzanineConnector ............................................... 9
3 Mechanical Specification 13
4 Software Overview 14
4.1 SupportedDistributions .............................................. 14
4.2 CompilingLinuxApplications........................................... 14
4.3 Knownissues .................................................... 14
5 Debian image guide 15
5.1 PreparethehostPC................................................. 15
5.2 GettheATF..................................................... 15
5.3 CompileU-Boot .................................................. 16
5.4 CompiletheLinuxkernel ............................................. 17
5.5 Buildingthedebosimage.............................................. 17
6 Deploy a disk image 19
6.1 DeployonSDCard................................................. 19
6.2 DeployoninternaleMMC............................................. 19
7 Companion controller features 21
7.1 HowtoflashMule-ATtiny ............................................. 21
8 Serial Number 22
9 Revision History 23
JAGUAR SBC-RK3588-AMR User Manual
©Theobroma Systems Design und Consulting GmbH
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1 Introduction
Congratulations for acquiring our new product, combining best-in-class performance with a rich set of peripherals.
Note: The latest version of this manual and related resources can always be found on our website at the following address:
https://www.theobroma-systems.com/product/jaguar-sbc-rk3588/
1.1 Device Overview
Cutting-edge performance for Autonomous Mobile Robots (AMR)
Due to its top performance CPU in parallel with GPU and NPU, algorithms can be based on rules, statistical methods, and
neural learning. The RK3588 is a low-power octa-core processor for Internet of Things (IoT) devices with Artificial Intelligence
(AI). It features 4 ARM Cortex-A76 and 4 ARM Cortex-A55 cores, a Mali G610 GPU, and an NPU with up to 6 TOPs. The
64-bit-capable ARMv8 cores support both ARM Cryptographic Extension (for wire-rate AES cryptography) and AdvSIMD
vector processing. The JAGUAR SBC-RK3588-AMR uses up to 16 GB LPDDR4X memory and up to 256 GB eMMC storage
on board, and optionally external storage media such as NVMe/SSD, and SD card.
Native support of four high-resolution cameras
The JAGUAR SBC-RK3588-AMR module provides MIPI-CSI interfaces for four high-resolution cameras. Using a MIPI-
CSI interface not only reduces the costs of camera modules, but also provides a continuous stream of raw video data into the
processor – regardless of USB or Ethernet protocol. The 4 cameras can be grouped into two pairs that are synchronized (vsync),
enabling their data to be easily combined into an accurate 3-dimensional point cloud. In addition to the video input signal,
the two camera ports can also receive the signals of Inertial Measurement Units (IMU) integrated in the cameras, allowing to
track accelerations and turns.
Simple integration into the design of your robot
The JAGUAR SBC-RK3588-AMR comes with common ports for the various interfaces, which provides both simple interfacing
to the robotic device and low connector costs for the overall product. Additional interfaces can be utilized by an optional ex-
tension board that plugs into a specific connector called a “mezzanine” connector because it adds a second floor. The JAGUAR
SBC-RK3588-AMR operates from a single power input with a voltage range of 12 to 24 V. While its consumption under load
is a moderate 18 W, it provides up to 35 W for devices attached via PCIe and USB. It also routes the voltage input to an optional
extension board on a mezzanine connector. Last but not least, the RK3588 is located on the bottom of the PCBA as the highest
element on this side, which means that, heat can be easily dissipated by simply interfacing the RK3588 to the chassis with a
thermal conductor.
State-of-the-art security for your assets
The JAGUAR SBC-RK3588-AMR features a Secure Element in addition to the capability to enable a Secure Boot mechanism.
This Secure Element is based on the GlobalPlatform 2.2.1 compliant JavaCard environment. Secure Boot guarantees that only
signed images can run on the device. Enjoy the peace of mind that comes with a government-grade security solution for
all identification, key-storage and asset-protection requirements. The Common Criteria (EAL6+) certified security module
ensures that you never have to sacrifice security for performance again.
Note: In favor of readability in this document JAGUAR SBC-RK3588-AMR will be referenced by its code name Jaguar.
JAGUAR SBC-RK3588-AMR User Manual
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v1.0
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1.2 Precautions
Warning: ESD Sensitive Device
Electronic boards and their components are sensitive to static electricity. Therefore, care must be taken during all handling
operations and inspections of this product, in order to ensure product integrity at all times.
Do not handle this product out of its protective enclosure while it is not used for operational purposes unless it is otherwise
protected. Whenever possible, unpack or pack this product only at EOS/ESD safe work stations. Where a safe work station
is not guaranteed, it is important for the user to be electrically discharged before touching the product with hands or tools.
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2 Interfaces
Jaguar provides a wide variety of interfaces.
Gigabit
Ethernet
P9
PPS
P8
M.2 Key-M P3
MIPI-CSI P14
M.2 Key-E P2
HDMI
P7
USB 2.0
P10
USB 3.1
P12
Mezzanine Connector P1
MIPI-CSI P15
USB 3.1
P11
FAN P13 P20
USB Serial
Console
Boot SW2
Reset SW1
RS-485
P19
Power
P4
Supply
12-24V
CAN
P5
Fig. 2.1: Jaguar interfaces overview
2.1 Power Supply
In order to power the board, connect the appropriate cable to the highlighted connector shown in the figure below. The Jaguar
power supply voltage is 12-24V.
Note: Be careful when connecting the power cable since all three terminal block connectors are of the same type.
JAGUAR SBC-RK3588-AMR User Manual
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Power Supply
12-24V
P4
3.GND
2.VCC
1.GND
Fig. 2.2: Power connector
Table 2.1: Compatible mating connectors
Manufacturer Partnumber Description
Würth 691361100003 Vertical
Würth 691363110003 Horizontal with hook on wire Side
Würth 691366110003 Horizontal with hook on back Side
Würth 691304100003 Screwless Plug Vertical Entry Low Profile
2.2 USB Serial Console
Jaguar contains an on-board Silicon Labs CP2102N USB-serial converter. Connect a Micro-USB cable to the Micro-USB as
highlighted below:
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USB Serial
Console
P20
Fig. 2.3: USB UART
For macOS and Windows, drivers are available from Silicon Labs: https://www.silabs.com/products/development-tools/
software/usb-to-uart-bridge-vcp-drivers
A terminal emulation program is required to access the serial console.
Table 2.2: Terminal emulators recommendations
Operation
System
Terminal Em-
ulator
URL Example Commandline
Microsoft
Windows
PuTTY https://www.chiark.greenend.org.uk/
~sgtatham/putty/
MobaXterm https://mobaxterm.mobatek.net/
Tera Term https://ttssh2.osdn.jp/
macOS cu
cu -s 115200 -l /dev/cu.
SLAB_USBtoUART
Linux picocom https://github.com/npat-efault/picocom/
picocom -b 115200 /dev/
ttyUSB0
minicom https://salsa.debian.org/minicom-team/
minicom/
minicom -b 115200 -D /dev/
ttyUSB0
GNU Screen https://www.gnu.org/software/screen/
screen /dev/ttyUSB0 115200
Note: Make sure to disable software flow-control (XON/XOFF). Otherwise, serial input may not be recognized.
After system boot-up with the Jaguar Debian development image, the login console appears on the terminal:
jaguar login:
You can log with one of the following credentials:
Table 2.3: Default User
Username Password
root root
user 123123
JAGUAR SBC-RK3588-AMR User Manual
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2.3 Buttons
Reset
SW1
Boot
SW2
USB 3.1
P11
Fig. 2.4: Buttons and Download USB Type-C port
The control buttons provide the following functionality:
•
Reset
triggers a board reset.
•
BOOT SW
forces alternate boot sequence.
2.3.1 Boot Order
The used boot order of the Jaguar board depends on the state of the
BOOT SW
switch.
Default
BOOT SW
pressed
1 eMMC storage SD card
2 SD card USB loader
3 USB loader
If no bootloader is found on any storage device, Jaguar will go into USB loader mode, showing up as a USB device with VID:PID
2207:350b
on the USB port P11 marked Download.
Once booted into Linux, presses on the
BOOT SW
button will trigger a
KEY_VENDOR
input event on the
/dev/input/
by-path/platform-adc-keys-event
input device:
$ evtest /dev/input/by-path/platform-adc-keys-event
Input driver version is 1.0.1
Input device ID: bus 0x19 vendor 0x1 product 0x1 version 0x100
Input device name: "adc-keys"
Supported events:
Event type 0 (EV_SYN)
Event type 1 (EV_KEY)
Event code 360 (KEY_VENDOR)
Properties:
Testing ... (interrupt to exit)
Event: time 1695722632.280609, type 1 (EV_KEY), code 360 (KEY_VENDOR), value 1
(continues on next page)
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(continued from previous page)
Event: time 1695722632.280609, -------------- SYN_REPORT ------------
Event: time 1695722632.383952, type 1 (EV_KEY), code 360 (KEY_VENDOR), value 0
Event: time 1695722632.383952, -------------- SYN_REPORT ------------
2.4 FAN
A PWM controlled fan with tacho signal can be connected. The supply voltage can be selected by changing a 0-Ohm resistor,
the default supply is 12 V.
Table 2.4: Fan supply (bold default)
Resistor Fan supply
R314 Main supply voltage
R315 12 V
R316 5 V
Table 2.5: Fan mating connector
Manufacturer Partnumber
JST PHR-4
FAN
P13
4.GND
3.VCC
2.TACHO
1.PWM
Fig. 2.5: FAN connection
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2.5 CAN
Jaguar supports up to three CAN busses. CAN0 has an on-board transceiver and supports up to 1 MBaud data rate. CAN1
and CAN2 are available on the Mezzanine connector and require a transceiver on the Mezzanine board.
CAN
P5
3.GND
2.CAN_N
1.CAN_P
Fig. 2.6: CAN connector
Table 2.6: Compatible mating connectors
Manufacturer Partnumber Description
Würth 691361100003 Vertical
Würth 691363110003 Horizontal with hook on wire Side
Würth 691366110003 Horizontal with hook on back Side
Würth 691304100003 Screwless Plug Vertical Entry Low Profile
2.6 RS-485
Jaguar supports half-duplex RS-485.
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RS-485
P19
3.GND
2.RS-486_N
1.RS-486_P
Fig. 2.7: RS-485 connector
Table 2.7: Compatible mating connectors
Manufacturer Partnumber Description
Würth 691361100003 Vertical
Würth 691363110003 Horizontal with hook on wire Side
Würth 691366110003 Horizontal with hook on back Side
Würth 691304100003 Screwless Plug Vertical Entry Low Profile
2.7 Battery
A CR2032 coin cell can be used to supply the on-board real-time-clock. The coin cell is only used when Jaguar is not supplied
power from an external source.
2.8 Mezzanine Connector
Jaguar has an 80-pin connector for extensions board. Most pins have multiple functions that can be selected via software
configuration. See Table 2.10 Mezzanine multiplex functions.
Table 2.8: Compatible mating connectors
Manufacturer Partnumber Description
Hirose ER8-80P-0.8SV-2H 2mm height plug
Hirose ER8-80P-0.8SV-5H 5mm height plug
Table 2.9: Mezzanine connector pinout
Pin Function Pin Function
1 CP2102_POWER_EN 41 GND
2 CAM0_STROBE 42 GPIO3_C0
3 ADC_IN2 43 CAM2_CLK0_P
continues on next page
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Table 2.9 – continued from previous page
Pin Function Pin Function
4 CAM1_STROBE 44 GPIO3_C1
5 WDTRIG# 45 CAM2_CLK0_N
6 I2C1_SCL 46 GPIO3_C2
7 GND 47 GND
8 I2C1_SDA 48 GPIO3_C3
9 CAM3_D1_P 49 CAM2_MCLK
10 GND 50 GPIO3_C4
11 CAM3_D1_N 51 CAM2_RST
12 X 52 GPIO3_C5
13 GND 53 PCIE20_0_RX_P
14 GPIO3_A0 54 GPIO3_C6
15 CAM3_D0_P 55 PCIE20_0_RX_N
16 GPIO3_A1 56 GPIO3_C7
17 CAM3_D0_N 57 GND
18 GPIO3_A2 58 GPIO3_D0
19 GND 59 PCIE20_0_TX_P
20 GPIO3_A3 60 GPIO3_D1
21 CAM3_CLK0_P 61 PCIE20_0_TX_N
22 GPIO3_A4 62 GPIO3_D2
23 CAM3_CLK0_N 63 GND
24 GPIO3_A5 64 GPIO3_D3
25 GND 65 PCIE20_0_CLK_P
26 GPIO3_A6 66 GPIO3_D4
27 CAM3_MLCK 67 PCIE20_0_CLK_N
28 GPIO3_B1 68 GPIO3_D5
29 CAM3_RST 69 GND
30 GPIO3_B2 70 GND
31 CAM2_D1_P 71 VCC_1V8
32 GPIO3_B3 72 VCC_3V3
33 CAM2_D1_N 73 VCC_1V8
34 GPIO3_B4 74 VCC_3V3
35 GND 75 GND
36 GPIO3_B5 76 GND
37 CAM2_D0_P 77 VCC_IN
38 GPIO3_B6 78 VCC_5V0
39 CAM2_D0_N 79 VCC_IN
40 GPIO3_B7 80 VCC_5V0
Table 2.10: Mezzanine multiplex functions
Pin Number GPIO Name PWM SDIO I2S I2C
14 GPIO3_A0 PWM10_M0 SDIO_D0_M1 I2S3_MCLK I2C6_SDA_M4
16 GPIO3_A1 PWM11_IR_M0 SDIO_D1_M1 I2S3_SCLK I2C6_SCL_M4
18 GPIO3_A2 SDIO_D2_M1 I2S3_LRCK
20 GPIO3_A3 SDIO_D3_M1 I2S3_SDO
22 GPIO3_A4 SDIO_CMD_M1 I2S3_SDI
24 GPIO3_A5 SDIO_CLK_M1 I2C4_SDA_M0
26 GPIO3_A6 I2C4_SCL_M0
49 GPIO3_A7 PWM8_M0
27 GPIO3_B0 PWM9_M0
28 GPIO3_B1 PWM2_M1
30 GPIO3_B2 PWM3_IR_M1 I2S2_SDI_M1
32 GPIO3_B3 I2S2_SDO_M1
34 GPIO3_B4 I2S2_MCLK_M1
36 GPIO3_B5 PWM12_M0 I2S2_SCLK_M1
38 GPIO3_B6 PWM13_M0 I2S2_LRCK_M1
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Table 2.10 – continued from previous page
Pin Number GPIO Name PWM SDIO I2S I2C
40 GPIO3_B7
42 GPIO3_C0
44 GPIO3_C1
46 GPIO3_C2 PWM14_M0
48 GPIO3_C3 PWM15_IR_M0
50 GPIO3_C4
52 GPIO3_C5
54 GPIO3_C6
56 GPIO3_C7
58 GPIO3_D0 PWM8_M2
60 GPIO3_D1 PWM9_M2
62 GPIO3_D2
64 GPIO3_D3 PWM10_M2
66 GPIO3_D4
68 GPIO3_D5 PWM11_IR_M3
Table 2.11: Mezzanine multiplex functions (cont.)
Pin Number GPIO Name CAN PCIE UART
14 GPIO3_A0
16 GPIO3_A1
18 GPIO3_A2 UART8_TX_M1
20 GPIO3_A3 UART8_RX_M1
22 GPIO3_A4 UART8_RSTN_M1
24 GPIO3_A5 UART8_CTSN_M1
26 GPIO3_A6
49 GPIO3_A7
27 GPIO3_B0
28 GPIO3_B1
30 GPIO3_B2
32 GPIO3_B3
34 GPIO3_B4
36 GPIO3_B5 CAN1_RX_M0
38 GPIO3_B6 CAN1_TX_M0
40 GPIO3_B7
42 GPIO3_C0
44 GPIO3_C1 PCIE30X2_BUTTON_RSTN_M1
46 GPIO3_C2
48 GPIO3_C3
50 GPIO3_C4 CAN2_RX_M0 UART5_TX_M1
52 GPIO3_C5 CAN2_TX_M0 PCIE30X4_WAKEN_M2 UART5_RX_M1
54 GPIO3_C6
56 GPIO3_C7 PCIE20X1_2_CLKREQN_M0
58 GPIO3_D0 PCIE20X1_2_WAKEN_M0 UART4_RX_M1
60 GPIO3_D1 PCIE20X1_2_PERSTN_M0 UART4_TX_M1
62 GPIO3_D2 PCIE30X2_CLKREQN_M2 UART9_RTSN_M2
64 GPIO3_D3 PCIE30X2_WAKEN_M2 UART9_CTSN_M2
66 GPIO3_D4 PCIE30X2_PERSTN_M2 UART9_RX_M2
68 GPIO3_D5 PCIE30X4_BUTTON_RSTN UART9_TX_M2
Table 2.12: Mezzanine multiplex functions (cont.)
Pin Number GPIO Name ETH MIPI_CAMERA_CLK SPI
14 GPIO3_A0 GMAC1_TXD2 SPI4_MISO_M1
16 GPIO3_A1 GMAC1_TXD3 SPI4_MOSI_M1
continues on next page
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Table 2.12 – continued from previous page
Pin Number GPIO Name ETH MIPI_CAMERA_CLK SPI
18 GPIO3_A2 GMAC1_RXD2 SPI4_CLK_M1
20 GPIO3_A3 GMAC1_RXD3 SPI4_CS0_M1
22 GPIO3_A4 GMAC1_TXCLK SPI4_CS1_M1
24 GPIO3_A5 GMAC1_RXCLK
26 GPIO3_A6 ETH1_REFCLKO_25M
49 GPIO3_A7 GMAC1_RXD0 MIPI_CAMERA2_CLK_M1
27 GPIO3_B0 GMAC1_RXD1 MIPI_CAMERA3_CLK_M1
28 GPIO3_B1 GMAC1_RXDV_CRS MIPI_CAMERA4_CLK_M1
30 GPIO3_B2 GMAC1_TXER
32 GPIO3_B3 GMAC1_TXD0
34 GPIO3_B4 GMAC1_TXD1
36 GPIO3_B5 GMAC1_TXEN
38 GPIO3_B6 GMAC1_MCLKINOUT
40 GPIO3_B7 GMAC1_PTP_REF_CLK SPI1_MOSI_M1
42 GPIO3_C0 GMAC_PPSTRIG SPI1_MISO_M1
44 GPIO3_C1 GMAC1_PPSCLK SPI1_CLK_M1
46 GPIO3_C2 GMAC1_MDC SPI1_CS0_M1
48 GPIO3_C3 GMAC1_MDIO SPI1_CS1_M1
50 GPIO3_C4 SPI3_CS0_M3
52 GPIO3_C5 SPI3_CS1_M3
54 GPIO3_C6 SPI3_MISO_M3
56 GPIO3_C7 SPI3_MOSI_M3
58 GPIO3_D0 SPI3_CLK_M3
60 GPIO3_D1
62 GPIO3_D2
64 GPIO3_D3
66 GPIO3_D4
68 GPIO3_D5
Fig. 2.8: Mezzanine board dimensions (bottom view)
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3 Mechanical Specification
Fig. 3.1: Mechanical dimensions
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4 Software Overview
This chapter provides instructions for compiling and deploying the BSP (Board Support Package) software to the board.
4.1 Supported Distributions
The following chapters describe how to build a disk image for:
•Debian: Section 5 Debian image guide
Support for Yocto is in progress.
4.2 Compiling Linux Applications
The easiest option is to compile your applications directly on a board running Debian. Install the
gcc
package and related
utilities and you are good to go:
sudo apt-get install build-essential
The second option is to cross-compile your applications on a host PC. The compiler that is installed in Section 5.1 Prepare the
host PC is suitable.
4.3 Known issues
1. The SD card cannot currently be automatically detected at runtime, so please insert it before booting the JAGUAR SBC-
RK3588-AMR.
It is however possible to force a detection at runtime by running the following commands:
echo "fe2c0000.mmc" > /sys/bus/platform/drivers/dwmmc_rockchip/unbind
echo "fe2c0000.mmc" > /sys/bus/platform/drivers/dwmmc_rockchip/bind
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5 Debian image guide
As opposed to Yocto, Debian does not provide a completely integrated build experience by itself. Linux kernel and U-Boot
have to be compiled manually and copied to the appropriate directory to be picked up by Debian build system.
This chapter will go through all neccessary steps, finally building a complete image using the debos Debian image builder. The
result will be a fully-functional Debian system.
Alternatively, prebuilt images can be downloaded from https://downloads.theobroma-systems.com/jaguar .
At the time of writing this document, the following Debian image variants are available for Jaguar:
•Debian 12 Bookworm
Note: While Debian is a great tool for fast prototyping of your product, it is highly recommended to use a distribution/image
tailored to your need. This can be achieved by Yocto or Buildroot for example.
5.1 Prepare the host PC
The debos Debian OS Builder is only available for Debian and Debian-based distributions (like Ubuntu). This chapter assumes
you use Debian or a Debian-based distribution as the host PC.
Install packages for compiling the parts and the complete image:
sudo apt-get -y install debos git build-essential gcc-aarch64-linux-gnu make bison bc flex \
libssl-dev device-tree-compiler python3-dev python3-pkg-resources swig fdisk \
python-is-python3
As debos internally uses kvm virtualization, your user must be a member of the
kvm
group:
sudo adduser $(id -un) kvm
Log out and back for the change to take affect. Then verify that
kvm
is listed in your groups:
id -Gn
Note: If you are not using Debian distribution on your host PC you need to use podman to build the debos image:
sudo apt-get install podman
5.2 Get the ATF
Get the Arm Trusted Firmware as follows:
# Set up cross-compilation
export ARCH=arm64
export CROSS_COMPILE=aarch64-linux-gnu-
# Download the source code
git clone https://github.com/rockchip-linux/rkbin
cd rkbin
# Tag linux-5.10-gen-rkr4.1
(continues on next page)
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(continued from previous page)
git checkout "1356c978"
export RKBIN_FOLDER=$PWD
export BL31=$RKBIN_FOLDER/bin/rk35/rk3588_bl31_v1.38.elf
export BL32=$RKBIN_FOLDER/bin/rk35/rk3588_bl32_v1.13.bin
export TPL=$RKBIN_FOLDER/bin/rk35/rk3588_ddr_lp4_2112MHz_lp5_2736MHz_v1.11.bin
cd ..
# Make the baudrate match our U-Boot
sed -i
'
s/uart baudrate=/uart baudrate=115200/
'
rkbin/tools/ddrbin_param.txt
rkbin/tools/ddrbin_tool rkbin/tools/ddrbin_param.txt "$TPL"
This step should take under 1 minute total.
5.3 Compile U-Boot
Note: Variables
BL31
,
BL32
,
TPL
must be already set as described in Section 5.2 Get the ATF .
Get the source code and compile the U-Boot bootloader as follows:
# Set up cross-compilation
export ARCH=arm64
export CROSS_COMPILE=aarch64-linux-gnu-
# Download the source code
git clone https://git.theobroma-systems.com/jaguar-u-boot.git
cd jaguar-u-boot
# Load u-boot config
make jaguar-rk3588_defconfig
# Build idbloader.img
make spl/u-boot-spl.bin -j$(nproc)
./tools/mkimage -n rk3588 -T rksd -d "$TPL":spl/u-boot-spl.bin idbloader.img
# Build u-boot.dtb/u-boot.itb
cp "$BL31"bl31.elf
cp "$BL32"tee.bin
make u-boot.dtb u-boot.itb -j$(nproc)
# Make the resulting file available to later steps
export JAGUAR_UBOOT_DIR=$PWD
cd ..
This step should take about 1 minute total.
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5.4 Compile the Linux kernel
Get the source code and compile the Linux kernel as follows:
# Set up cross-compilation
export ARCH=arm64
export CROSS_COMPILE=aarch64-linux-gnu-
# Download the source code
git clone https://git.theobroma-systems.com/jaguar-linux.git
cd jaguar-linux
# Compile
make jaguar-rk3588_defconfig
make -j$(nproc)
# Make the resulting files available to later steps
export JAGUAR_LINUX_DIR=$PWD
cd ..
The time required for this step heavily depends on your internet connection and CPU power. On a quad-core 2.9GHz machine
with an 1Gb/s internet connection, it takes about 20 minutes total.
5.5 Building the debos image
5.5.1 Prepare required components
Note: The variables
JAGUAR_UBOOT_DIR
and
JAGUAR_LINUX_DIR
must be already set as described in Section 5.3 Compile
U-Boot and Section 5.4 Compile the Linux kernel, respectively.
Get the source code for the debos recipe and copy the necessary components that were built in the previous steps:
# Download the source code
git clone https://git.theobroma-systems.com/debos-recipes.git
cd debos-recipes
# Copy Linux & U-Boot binaries into the
``
jaguar
``
folder
cp "$JAGUAR_LINUX_DIR"/arch/arm64/boot/Image jaguar/overlay/boot/
cp "$JAGUAR_LINUX_DIR"/arch/arm64/boot/dts/rockchip/rk3588-jaguar* jaguar/overlay/boot/
cp "$JAGUAR_UBOOT_DIR"/idbloader.img jaguar/
cp "$JAGUAR_UBOOT_DIR"/u-boot.itb jaguar/
5.5.2 Build a complete image
Depending on your host PC and internet connection, this step should complete in about 5-10 minutes.
The resulting image is a file called
sdcard-jaguar-debos-bookworm.XXX.YYY.img
and, for convenience, the symlink
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that always points to the latest version.
JAGUAR SBC-RK3588-AMR User Manual
©Theobroma Systems Design und Consulting GmbH
v1.0
Page 17
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