Compal PEW76 Technical manual

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
155Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
155Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
155Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Champlain Processor with RS880M/SB820/Madison VGA
PEW76 Schematics Document
LA5911P REV: 1.0
Compal Confidential
2010-06-07
AMD Danube
ZZZ
X76244BOL05
Part Number = X76244BOL05
128M1G@
ZZZ
X76244BOL05
Part Number = X76244BOL05
128M1G@
ZZZ
X76244BOL01
Part Number = X76244BOL01
64M512@
ZZZ
X76244BOL01
Part Number = X76244BOL01
64M512@
ZZZ
X76244BOL06
Part Number = X76244BOL06
128M2G@
ZZZ
X76244BOL06
Part Number = X76244BOL06
128M2G@
ZZZ
X76244BOL03
Part Number = X76244BOL03
64M1G@
ZZZ
X76244BOL03
Part Number = X76244BOL03
64M1G@
ZZZ
PCB
Part Number = DAZ0FQ00100
ZZZ
PCB
Part Number = DAZ0FQ00100

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
255Tuesday, September 14, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
255Tuesday, September 14, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
255Tuesday, September 14, 2010
2008/10/06 2009/10/06
Compal Electronics, Inc.
Power On/Off CKT.
Touch Pad
LPC BUS
page 42
Compal Confidential
uFCBGA-528
page 43
Int.KBD
page 39
USB
conn
X 3
A link Express2
DC/DC Interface CKT.
AMD S1G4 Processor
page 38
3.3V 48MHz
Hyper Transport Link
16 x 16
page 38
EC I/O Buffer
Power Circuit
uPGA-638 Package
page 41
page 45
ATI RS880M
BIOS
page 4,5,6,7
page 39
HD Audio
page 10,11,12,13
ATI SB820M
page 27,28,29,30,31
page 39
ENE KB926
Bluetooth
Conn
3.3V 24.576MHz/48Mhz
Model Name : NEW75/85/95
RTC CKT.
page 26
page 43
page 46,47,48,49,50,51
52,53,54
S-ATA
page 32
SATA HDD
Conn.
port 0
CMOS
Camera
USB port 0,1,2
USB
CDROM
Conn.
page 32
Mini
card
(WL)X1
port 1
USB port 5 USB port 12 USB port 8
page 36,37 page 27 page 37 page 36
Dual Channel BANK 0, 1, 2, 3
204pin DDRIII-SO-DIMM X2
1.5V DDRIII 800~1333MHz
Memory BUS(DDR3)
page 8,9
Clock Generator
ICS9LPRS488
page 6 page 23
Thermal Sensor
ADM1032
ATI M97
Madisan/Park
VRAM 1GB
64M16 x 8
PCI-Express x 16
DDR3
page 19, 20
Page 14,15,16,17,18,21,22
uFCBGA-605
uFCBGA-962
HDA Codec
ALC272X
Audio AMP
Phone Jack x2
page 40
LED
page 39
LID SW / MEDIA/B
Gen2
Champlain
Danube
page 34
MINI Card 1
WLAN
page 36
GPP0GPP1
RJ45
page 35
Broadcom
BCM57780
LAN(GbE)
LVDS
page 24
CRT
page 26
HDMI Conn.
page 25
Fan Control
page 44
<Option>
Extend Card/B
1. USB X2
2. Cardreader
JM385
page 36
USB port 9
3G/GPS
WWAN
<Option>
page 36
USB port 6
Card
Reader
Gen1
Gen2

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
355Tuesday, September 14, 2010
2005/10/10 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
355Tuesday, September 14, 2010
2005/10/10 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
355Tuesday, September 14, 2010
2005/10/10 2010/03/12
GbE LAN
Broadcom
B57780
WLAN
Mini PCI Socket
A_SODIMM
S1G4
CPU SOCKET
NB
RS880M
SB
SB820M
Internal CLK GEN
CPU_HT_CLKP/N
200MHz
VGA
ATI
Madison/Park
B_SODIMM
MEM_MA_CLK7_P/N
1066MHz
1066MHz
MEM_MA_CLK1_P/N
MEM_MB_CLK1_P/N
MEM_MB_CLK7_P/N
AMD CLK_SBSRC_BCLK/#
100MHz
100MHz
NB_DISP_CLKP/N
100MHz
NB_HT_CLKP/N
AMD AMD
AMD
VGA_CLKP/N
100MHz
100MHz
100MHz
GPP_CLK1P/N
GPP_CLK3P
32.768KHz 25MHz
Compal Electronics, Inc.

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
455Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
455Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
B
455Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
STATE SIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
Vcc 3.3V +/- 5%
100K +/- 5%Ra/Rc/Re
Board ID
Rb / Rd / Rf V min
0
1
2
3
0
8.2K +/- 5% 0 V 0.216 V 0.250 V 0.289 V
0.436 V
0.712 V 0.503 V 0.819 V 0.538 V 0.875 V
AD_BID
V typ
AD_BID
V
AD_BID
max
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5% 3.300 V
0 V 0 V
4
5
6
7NC
1.036 V
1.453 V 1.650 V 1.759 V
1.935 V
2.500 V 2.200 V 3.300 V 2.341 V
1.185 V 1.264 V
Board ID
0
1
2
3
4
5
6
7
PCB Revision
BOARD ID Table BTO Option Table
BTO Item BOM Structure
1101 001Xb
OFF OFF
+0.9V 0.9V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail
+2.5VS
+5VS
+3VS
+5VALW
+1.8V
2.5V for CPU_VDDA
+3VALW
1.8V power rail for CPU VDDIO and DDR
3.3V always on power rail
5V always on power rail
3.3V switched power rail
5V switched power rail
+VSB VSB always on power rail ON ON*
ONON
ON
ON
EC SM Bus1 address
Device
SB820
SM Bus 1 address
ON
OFF
OFF
DDR DIMM1
1001 000Xb
DDR DIMM2
1001 010Xb
1.5V power rail for PCIE Card
+CPU_CORE_0
SB820
SM Bus 0 address
Device
Clock Generator
(SILEGO SLG8SP626)
Address
Address Address
Voltage Rails
VIN
B+
+1.1VS
Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU (0.7-1.2V)
External PCI Devices
Device IDSEL# REQ#/GNT# Interrupts
ON
+VGA_CORE OFFOFFON
1.1V switched power rail for NB VDDC & VGA
ON
+CPU_CORE_1 Core voltage for CPU (0.7-1.2V) ON OFF OFF
+CPU_CORE_NB Voltage for On-die Northbridge of CPU(0.8-1.1V)
ON OFF OFF
ADI ADM1032 (CPU)
+1.2V_HT 1.2V switched power rail ON OFF OFF
ON ON*
ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON ON
S1 S3 S5
ON OFF
ON
N/A N/A N/A
N/AN/AN/A
Power Plane Description
EC SM Bus2 address
Device
Smart Battery
OFF
OFF
ON
OFF
OFF
OFF
ON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFFON
ON
ON
ON
OFF
ON*
OFF
OFF
ON
Device Address
ON
1001 100X b0001 011X b
0.95-1.2V switched power rail
HEX
98H
9AH
GMT G781-1 (GPU)
1001 101X b
16H
HEX
D2
HEX
90
94
Mini card
98H
SB-Temp Sensor
Project ID Table
Board ID
0
1
2
3
4
5
6
7
PCB Revision
BOM Config
DIS ONLY:(Park) 3G@/BT@/DISO@/ VGA@/EXT@/EXTPW@/PARK@
PowerXpress SKU(Park): 3G@/BT@/UMA@/ VGA@/SG@/EXT@/EXTPW@/VB@/PARK@
UMA only SKU: 3G@/BT@/UMA@/ UMAO@/EXT@/VB@
DIS ONLY(PARK): 3G@/BT@/DISO@/VGA@/INT@/PARK@
PowerXpress SKU(Madison):3G@/BT@/UMA@/VGA@/SG@/INT@/VB@/MAD@
UMA only SKU: 3G@/BT@/UMA@/UMAO@/INT@/VB@
EXT CLKGEN
INT CLKGEN
PowerXpress SKU(Madison): 3G@/BT@/UMA@/ VGA@/SG@/EXT@/EXTPW@/VB@/MAD@
PowerXpress SKU(Park): 3G@/BT@/UMA@/VGA@/SG@/INT@/VB@/PARK@
No USB Patch
Add USB patch
NEW75/85/95
PEW76/86/96
PEW56
--For SSID define
--For TSI thermal math
Capilano w/ USB patch

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Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
555Tuesday, September 14, 2010
2009/3/8 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
555Tuesday, September 14, 2010
2009/3/8 2010/03/12
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
555Tuesday, September 14, 2010
2009/3/8 2010/03/12
PU10
APL5913
EC
ENE KB926
1.5V
0.75V
+1.5VS 500mA
+3.3VS 1A+3.3VS 300mA +3.3VALW 330mA +3.3VS 3mA
+3.3VALW 30mA
SATA
+5V 45mA
+3.3VS 25mA +3.3VALW 201mA
Audio AMP
TPA6017A2
+5V 25mA
+3.3 350mA
B+ 300mA
LCD panel
15.6"
+5V 3A
+3.3V
BATTERY
12.6V PU5 CHARGER
ISL6261AHAZ-T
ICS9LPRS488B
+3.3V 400mA
AC ADAPTOR
19V 90W
LAN
Atheros AR8114
RAM DDRIII SODIMMX2
VDD_MEM 4A
FAN Control
APL5607
+5VS 500mA
Audio Codec
ALC272 RTC
Bettary
VTT_MEM 0.5A
+5V
Dual+1
2.5A
USB X3 Realtek
RTS5159 Mini Card
+1.1V
BATT+
VIN
VDD CORE 36A
VDDNB 4A
VDDIO 3A
VDDR 1.5A
VDDA 250mA
VLDT 1.5A
AMD CPU S1G4
0.7~1.3V
0.8~1.2V
2.5V
1.5V
1.05V
1.1V
VDDIO_AZ_S
VDDAN_11_PCIE 1A
SouthBridge AMD SB820M
VDDPL_33_PCIE 0.030A
VDDAN_33_USB_S 0.2A
VDDAN_11_SATA 0.8A
VDDIO_33_S
VDDIO_33_PCIGP 0.020A
VDDRF_GBE_S
VDDCR_11 1.1V 0.5A
VDDAN_11_USB_S 200mA
VDDIO_18_FC
VDDPL_33_SATA 0.020A
VDDAN_11_CLK 0.4A
VDDCR_11_USB_S 197mA
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
VDDCR_11_S 113mA
VDDPL_11_SYS_S
VDDPL_33_SYS
VDDPL_33_USB_S
VDDAN_33_S
VDDXL_33_S
1.1V_S5
1.1V_S0
3.3V_S5
3.3V_S0
No Use
VDDBT_RTC_G2.5~3.6V
BAT
VGA ATI Madison / Park
TSVDD 5 mA
PCIE_VDDC 2 A
SPV10 100 mA
MPV18 150 mA
DPLL_VDDC 125 mA
SPV18 50 mA
DPLL_PVDD 75 mA
DP[F:A]_PVDD 20 mA
VDDCI 4 A
VDDR1 TBD A
PCIE_PVDD 40 mA
PCIE_VDDR 400 mA
DP[F:A]_VDD18 330 mA
VDDC 29 A
VDD_CT 17 mA
VDDR3 60 mA
DP[F:A]_VDD10 230 mA
NorthBridge AMD RS880M
VDDPCIE 1.1A
VDDHTTX 0.68A
PLLs 0.1A
VDDC 1.0V-1.1V 7.6A
VDDHTRX+HT 0.68A
AVDD 0.125A
VDDA18 0.64A
VDDG33 0.06A
VDDG18 0.005A
VDD18_MEM 1.8V 0.005A
VDD_MEM 1.8V 0.23A
VDDLT18 0.22A
VDDLT33 0A
PLLs 0.23A
1.1V_S0
1.8V_S0
1.0~1.1V
3.3V_S0
No Use
VDD1DI 45 mA
VDD2DI 50 mA
AVDD 70 mA
VDDR4 TBD mA
A2VDDQ 1.5 mA
A2VDD 130 mA
1.0V
3.3V
0.85~1.1V
1.5V
1.8V
VRAM 1GB
64Mx16 (K4B1G1646E) * 8
1.5V 2.4 A
B+
PU15
ISL6265IRZ-T
+CPU_CORE
+NB_CORE
+CPU_CORE_NB
+GPU_CORE +VDDCI
+5VALW
+3VALW
PU4
SN0806081 RHBR
PU17
APW7138NITRL
PU8
RT8209BGQW
+1.5V
PU7
RT8209BGQW
+1.1VALW
PU6
RT8209BGQW
+1VSG
PU10
APL5913
+0.75VS
PU12
APL5915
+1.05VS
PU19
TSP51117RGYR U35 SI4800BDY
+1.5VS
+1.5V
+3VS
+5VS
U36
SI4800BDY
+1.1VS
+1.1VS
+1.1VALW
+1.1VALW
+1.8VSP1
+3VALW
+1.5VS
U37
SI1800BDY
+1.5V
+2.5VS
PU16
APL5508-25DC
+1.8VSP2
PU14
APL5913 PU11 MP2121DQ
+1.8VS
U34
SI4800BDY
+INVPWR_B+
+USB_VCCA
+USB_VCCB
U25/U40
TPS2061DRG4
+CPU_CORE
+CPU_CORE_NB
+1.1VS
+1.05VS
Delay +3VS_DELAY
Compal Electronics, Inc.

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3
H_CADIN2
H_CADIP2
H_CADIP1
H_CADIN3
H_CADIP4
H_CADIN5
H_CADIN4
H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10
H_CADIP10
H_CADIN11
H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15
H_CADIP15
H_CADIP13
H_CADON15
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
H_CADON[0..15] <12>H_CADIN[0..15]<12>
H_CADOP[0..15] <12>
H_CLKIN0<12>
H_CLKIN1<12> H_CLKIP1<12>
H_CTLIN1<12>
H_CLKIP0<12>
H_CTLIP1<12> H_CTLOP1 <12>
H_CLKOP1 <12>
H_CADIP[0..15]<12>
H_CLKOP0 <12>
H_CLKON0 <12>
H_CLKON1 <12>
H_CTLON1 <12>
H_CTLOP0 <12>
H_CTLON0 <12>H_CTLIN0<12> H_CTLIP0<12>
+1.1VS
+1.1VS
+1.1VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
655Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
655Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
655Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
250 mil
Near CPU Socket
VLDT CAP.
TBD
C1
10U_0805_10V4Z
C1
10U_0805_10V4Z
1
2C5
180P_0402_50V8J
C5
180P_0402_50V8J
1
2
C3
0.22U_0603_16V4Z
C3
0.22U_0603_16V4Z
1
2
C6
180P_0402_50V8J
C6
180P_0402_50V8J
1
2
C4
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
1
2
C2
10U_0805_10V4Z
C2
10U_0805_10V4Z
1
2
C7
10U_0805_10V4Z
C7
10U_0805_10V4Z
12 HT LINK
JCPU1A
FOX_PZ6382A-284S-41F_Champlian
CONN@
HT LINK
JCPU1A
FOX_PZ6382A-284S-41F_Champlian
CONN@
VLDT_A3
D4 VLDT_A2
D3 VLDT_A1
D2 VLDT_A0
D1
VLDT_B3 AE5
VLDT_B2 AE4
VLDT_B1 AE3
VLDT_B0 AE2
L0_CADIN_H15
N5 L0_CADIN_L15
P5
L0_CADIN_H14
M3 L0_CADIN_L14
M4
L0_CADIN_H13
L5 L0_CADIN_L13
M5
L0_CADIN_H12
K3 L0_CADIN_L12
K4
L0_CADIN_H11
H3 L0_CADIN_L11
H4
L0_CADIN_H10
G5 L0_CADIN_L10
H5
L0_CADIN_H9
F3 L0_CADIN_L9
F4
L0_CADIN_H8
E5 L0_CADIN_L8
F5
L0_CADIN_H7
N3 L0_CADIN_L7
N2
L0_CADIN_H6
L1 L0_CADIN_L6
M1
L0_CADIN_H5
L3 L0_CADIN_L5
L2
L0_CADIN_H4
J1 L0_CADIN_L4
K1
L0_CADIN_H3
G1 L0_CADIN_L3
H1
L0_CADIN_H2
G3 L0_CADIN_L2
G2
L0_CADIN_H1
E1 L0_CADIN_L1
F1
L0_CADIN_H0
E3 L0_CADIN_L0
E2
L0_CADOUT_H15 T4
L0_CADOUT_L15 T3
L0_CADOUT_H14 V5
L0_CADOUT_L14 U5
L0_CADOUT_H13 V4
L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5
L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5
L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4
L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5
L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4
L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1
L0_CADOUT_L7 R1
L0_CADOUT_H6 U2
L0_CADOUT_L6 U3
L0_CADOUT_H5 V1
L0_CADOUT_L5 U1
L0_CADOUT_H4 W2
L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2
L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1
L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2
L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1
L0_CADOUT_L0 AC1
L0_CLKIN_H1
J5 L0_CLKIN_L1
K5
L0_CLKIN_H0
J3 L0_CLKIN_L0
J2
L0_CTLIN_H1
P3 L0_CTLIN_L1
P4
L0_CTLIN_H0
N1 L0_CTLIN_L0
P1
L0_CLKOUT_H1 Y4
L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1
L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5
L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2
L0_CTLOUT_L0 R3

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_CKE1
DDRB_SDQ0
DDRB_CKE0
DDRB_SDQS6
DDRB_SDQS6#
DDRB_SDQS2
DDRB_SDQS2#
DDRB_SDQS5
DDRB_SDQS5#
DDRB_SDQS1
DDRB_SDQS1#
DDRB_SDQS4
DDRB_SDQS4#
DDRB_SDQS0
DDRB_SDQS0#
DDRB_SDQS7
DDRB_SDQS7#
DDRB_SDQS3
DDRB_SDQS3#
DDRA_SDQS0
DDRA_SDQS0#
DDRA_SDQS3
DDRA_SDQS3#
DDRA_SDQS2
DDRA_SDQS2#
DDRA_SDQS1
DDRA_SDQS1#
DDRA_SDQS4
DDRA_SDQS4#
DDRA_SDQS5
DDRA_SDQS5#
DDRA_SDQS6
DDRA_SDQS6#
DDRA_SDQS7#
DDRA_SDQS7
MEMZP
MEMZN
MEM_VREF
DDRB_ODT0
DDRB_ODT1
DDRA_ODT1
DDRA_ODT0
DDRA_CKE0
DDRA_CKE1
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7 DDRA_SDM6
DDRA_SDM5
DDRA_SDM4
DDRA_SDM3
DDRA_SDM2
DDRA_SDM1
DDRA_SDM0
DDRA_SDM7
DDRA_SDQ3
DDRA_SDQ4
DDRA_SDQ0
DDRA_SDQ1
DDRA_SDQ2
DDRB_SRAS#
DDRB_SCAS#
DDRB_SWE#
DDRB_SBS0#
DDRB_SBS1#
DDRB_SBS2#
DDRA_SWE#
DDRA_SCAS#
DDRA_SRAS#
DDRA_SBS2#
DDRA_SBS1#
DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14
DDRA_SMA13
DDRA_SMA11
DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2
DDRA_SMA3
DDRA_SMA8
DDRA_SMA5
DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRB_SMA14
DDRA_SCS1# DDRB_SCS0#
DDRB_SCS1#
DDRA_SCS0#
MEM_VREF
DDRA_SDQ5
DDRA_SDQ6
DDRA_SDQ7
DDRA_SDQ8
DDRA_SDQ9
DDRA_SDQ10
DDRA_SDQ11
DDRA_SDQ12
DDRA_SDQ13
DDRA_SDQ14
DDRA_SDQ15
DDRA_SDQ16
DDRA_SDQ17
DDRA_SDQ18
DDRA_SDQ19
DDRA_SDQ20
DDRA_SDQ21
DDRA_SDQ22
DDRA_SDQ23
DDRA_SDQ24
DDRA_SDQ25
DDRA_SDQ26
DDRA_SDQ27
DDRA_SDQ28
DDRA_SDQ29
DDRA_SDQ30
DDRA_SDQ31
DDRA_SDQ32
DDRA_SDQ33
DDRA_SDQ34
DDRA_SDQ35
DDRA_SDQ36
DDRA_SDQ37
DDRA_SDQ38
DDRA_SDQ39
DDRA_SDQ40
DDRA_SDQ41
DDRA_SDQ42
DDRA_SDQ43
DDRA_SDQ44
DDRA_SDQ45
DDRA_SDQ46
DDRA_SDQ47
DDRA_SDQ48
DDRA_SDQ49
DDRA_SDQ50
DDRA_SDQ51
DDRA_SDQ52
DDRA_SDQ53
DDRA_SDQ54
DDRA_SDQ55
DDRA_SDQ56
DDRA_SDQ57
DDRA_SDQ58
DDRA_SDQ59
DDRA_SDQ60
DDRA_SDQ61
DDRA_SDQ62
DDRA_SDQ63
DDRB_SDQ1
DDRB_SDQ2
DDRB_SDQ3
DDRB_SDQ4
DDRB_SDQ5
DDRB_SDQ6
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ9
DDRB_SDQ10
DDRB_SDQ11
DDRB_SDQ12
DDRB_SDQ13
DDRB_SDQ14
DDRB_SDQ15
DDRB_SDQ16
DDRB_SDQ17
DDRB_SDQ18
DDRB_SDQ19
DDRB_SDQ20
DDRB_SDQ21
DDRB_SDQ22
DDRB_SDQ23
DDRB_SDQ24
DDRB_SDQ25
DDRB_SDQ26
DDRB_SDQ27
DDRB_SDQ28
DDRB_SDQ29
DDRB_SDQ30
DDRB_SDQ31
DDRB_SDQ32
DDRB_SDQ33
DDRB_SDQ34
DDRB_SDQ35
DDRB_SDQ36
DDRB_SDQ37
DDRB_SDQ38
DDRB_SDQ39
DDRB_SDQ40
DDRB_SDQ41
DDRB_SDQ42
DDRB_SDQ43
DDRB_SDQ44
DDRB_SDQ45
DDRB_SDQ46
DDRB_SDQ47
DDRB_SDQ48
DDRB_SDQ49
DDRB_SDQ50
DDRB_SDQ51
DDRB_SDQ52
DDRB_SDQ53
DDRB_SDQ54
DDRB_SDQ55
DDRB_SDQ56
DDRB_SDQ57
DDRB_SDQ58
DDRB_SDQ59
DDRB_SDQ60
DDRB_SDQ61
DDRB_SDQ62
DDRB_SDQ63
VTT_SENSE
DDRA_CLK0#
DDRA_CLK0
DDRA_CLK1#
DDRA_CLK1
DDRB_CLK0#
DDRB_CLK0
DDRB_CLK1
DDRB_CLK1#
MEM_MA_RST#
MEM_MB_RST#
DDRB_CKE1 <11>
DDRB_CKE0 <11>
DDRA_SCS0#<10> DDRA_SCS1#<10> DDRB_SCS0# <11>
DDRB_SCS1# <11>
DDRB_SDQ[63..0]<11>
DDRB_SDM[7..0]<11> DDRA_SDM[7..0] <10>
DDRA_SDQ[63..0] <10>
DDRB_SDQS7<11> DDRB_SDQS7#<11>
DDRB_SDQS6<11>
DDRB_SDQS5<11>
DDRB_SDQS4<11>
DDRB_SDQS3<11>
DDRB_SDQS2<11>
DDRB_SDQS1<11>
DDRB_SDQS0<11>
DDRB_SDQS6#<11>
DDRB_SDQS5#<11>
DDRB_SDQS4#<11>
DDRB_SDQS3#<11>
DDRB_SDQS2#<11>
DDRB_SDQS1#<11>
DDRB_SDQS0#<11>
DDRA_SDQS3 <10>
DDRA_SDQS2 <10>
DDRA_SDQS1 <10>
DDRA_SDQS0 <10>
DDRA_SDQS3# <10>
DDRA_SDQS2# <10>
DDRA_SDQS1# <10>
DDRA_SDQS0# <10>
DDRA_SDQS4 <10>
DDRA_SDQS4# <10>
DDRA_SDQS5 <10>
DDRA_SDQS5# <10>
DDRA_SDQS6 <10>
DDRA_SDQS6# <10>
DDRA_SDQS7 <10>
DDRA_SDQS7# <10>
DDRB_SRAS# <11>
DDRB_SCAS# <11>
DDRB_SWE# <11>
DDRB_SBS0# <11>
DDRB_SBS1# <11>
DDRB_SBS2# <11>
DDRA_SRAS#<10> DDRA_SCAS#<10> DDRA_SWE#<10>
DDRA_SBS0#<10> DDRA_SBS1#<10> DDRA_SBS2#<10>
DDRA_SMA[15..0]<10> DDRB_SMA[15..0] <11>
DDRB_ODT0 <11>
DDRB_ODT1 <11>
DDRA_ODT0<10> DDRA_ODT1<10>
DDRA_CKE0<10> DDRA_CKE1<10>
DDRA_CLK0<10>DDRA_CLK0#<10>
DDRA_CLK1<10>DDRA_CLK1#<10>
DDRB_CLK0 <11>
DDRB_CLK0# <11>
DDRB_CLK1 <11>
DDRB_CLK1# <11>
MEM_MA_RST#<10>
MEM_MB_RST# <11>
+1.5V
+CPU_VDDR+CPU_VDDR
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
755Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
755Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
755Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Place them
close to CPU
within 1"
Processor DDR3 Memory Interface
VDDR: DDR3 under 1033MHz
set to 0.9V to save power
1.5A
C8
1000P_0402_50V7K
C8
1000P_0402_50V7K
1
2
MEM:CMD/CTRL/CLK
JCPU1B
FOX_PZ6382A-284S-41F_Champlian
CONN@
MEM:CMD/CTRL/CLK
JCPU1B
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDDR1
D10 VDDR2
C10 VDDR3
B10 VDDR4
AD10
VDDR5 W10
VDDR6 AC10
VDDR7 AB10
VDDR8 AA10
VDDR9 A10
MA1_ODT1
V19 MA1_ODT0
U21 MA0_ODT1
V22 MA0_ODT0
T19
MB1_ODT0 Y26
MB0_ODT1 W23
MB0_ODT0 W26
MB_RESET_L B18
MB1_CS_L0 U22
MB0_CS_L1 W25
MB0_CS_L0 V26 MA0_CS_L1
U19
MA1_CS_L1
V20 MA1_CS_L0
U20
MA0_CS_L0
T20
MA_ADD15
K19 MA_ADD14
K24 MA_ADD13
V24 MA_ADD12
K20 MA_ADD11
L22 MA_ADD10
R21 MA_ADD9
K22 MA_ADD8
L19 MA_ADD7
L21 MA_ADD6
M24 MA_ADD5
L20 MA_ADD4
M22 MA_ADD3
M19 MA_ADD2
N22 MA_ADD1
M20 MA_ADD0
N21
MA_BANK2
J21 MA_BANK1
R23 MA_BANK0
R20
MA_RAS_L
R19 MA_CAS_L
T22 MA_WE_L
T24
MEMZP
AF10 MEMZN
AE10 VDDR_SENSE Y10
MEMVREF W17
MA_CLK_H4
P19 MA_CLK_L4
P20
MA_CLK_H7
Y16 MA_CLK_L7
AA16
MA_CLK_H1
E16 MA_CLK_L1
F16
MA_CLK_H5
N19 MA_CLK_L5
N20
MB_CLK_H4 R26
MB_CLK_L4 R25
MB_CLK_H7 AF18
MB_CLK_L7 AF17
MB_CLK_H1 A17
MB_CLK_L1 A18
MB_CLK_H5 P22
MB_CLK_L5 R22
MA_CKE0
J22 MA_CKE1
J20 MB_CKE0 J25
MB_CKE1 H26
MB_ADD15 J24
MB_ADD14 J23
MB_ADD13 W24
MB_ADD12 L25
MB_ADD11 L26
MB_ADD10 T26
MB_ADD9 K26
MB_ADD8 M26
MB_ADD7 L24
MB_ADD6 N25
MB_ADD5 L23
MB_ADD4 N26
MB_ADD3 N23
MB_ADD2 P26
MB_ADD1 N24
MB_ADD0 P24
MB_BANK2 J26
MB_BANK1 U26
MB_BANK0 R24
MB_RAS_L U25
MB_CAS_L U24
MB_WE_L U23
MA_RESET_L
H16
R1
1K_0402_1%
R1
1K_0402_1%
1 2
R5 39.2_0402_1%R5 39.2_0402_1%
1 2
R2
1K_0402_1%
R2
1K_0402_1%
1 2
T1PAD T1PAD
C588
10U_0805_10V4Z
@
C588
10U_0805_10V4Z
@1
2
R4 39.2_0402_1%R4 39.2_0402_1%
1 2
MEM:DATA
JCPU1C
FOX_PZ6382A-284S-41F_Champlian
CONN@
MEM:DATA
JCPU1C
FOX_PZ6382A-284S-41F_Champlian
CONN@
MB_DATA63
AD11 MB_DATA62
AF11 MB_DATA61
AF14 MB_DATA60
AE14 MB_DATA59
Y11 MB_DATA58
AB11 MB_DATA57
AC12 MB_DATA56
AF13 MB_DATA55
AF15 MB_DATA54
AF16 MB_DATA53
AC18 MB_DATA52
AF19 MB_DATA51
AD14 MB_DATA50
AC14 MB_DATA49
AE18 MB_DATA48
AD18 MB_DATA47
AD20 MB_DATA46
AC20 MB_DATA45
AF23 MB_DATA44
AF24 MB_DATA43
AF20 MB_DATA42
AE20 MB_DATA41
AD22 MB_DATA40
AC22 MB_DATA39
AE25 MB_DATA38
AD26 MB_DATA37
AA25 MB_DATA36
AA26 MB_DATA35
AE24 MB_DATA34
AD24 MB_DATA33
AA23 MB_DATA32
AA24 MB_DATA31
G24 MB_DATA30
G23 MB_DATA29
D26 MB_DATA28
C26 MB_DATA27
G26 MB_DATA26
G25 MB_DATA25
E24 MB_DATA24
E23 MB_DATA23
C24 MB_DATA22
B24 MB_DATA21
C20 MB_DATA20
B20 MB_DATA19
C25 MB_DATA18
D24 MB_DATA17
A21 MB_DATA16
D20 MB_DATA15
D18 MB_DATA14
C18 MB_DATA13
D14 MB_DATA12
C14 MB_DATA11
A20 MB_DATA10
A19 MB_DATA9
A16 MB_DATA8
A15 MB_DATA7
A13 MB_DATA6
D12 MB_DATA5
E11 MB_DATA4
G11 MB_DATA3
B14 MB_DATA2
A14 MB_DATA1
A11 MB_DATA0
C11
MA_DATA63 AA12
MA_DATA62 AB12
MA_DATA61 AA14
MA_DATA60 AB14
MA_DATA59 W11
MA_DATA58 Y12
MA_DATA57 AD13
MA_DATA56 AB13
MA_DATA55 AD15
MA_DATA54 AB15
MA_DATA53 AB17
MA_DATA52 Y17
MA_DATA51 Y14
MA_DATA50 W14
MA_DATA49 W16
MA_DATA48 AD17
MA_DATA47 Y18
MA_DATA46 AD19
MA_DATA45 AD21
MA_DATA44 AB21
MA_DATA43 AB18
MA_DATA42 AA18
MA_DATA41 AA20
MA_DATA40 Y20
MA_DATA39 AA22
MA_DATA38 Y22
MA_DATA37 W21
MA_DATA36 W22
MA_DATA35 AA21
MA_DATA34 AB22
MA_DATA33 AB24
MA_DATA32 Y24
MA_DATA31 H22
MA_DATA30 H20
MA_DATA29 E22
MA_DATA28 E21
MA_DATA27 J19
MA_DATA26 H24
MA_DATA25 F22
MA_DATA24 F20
MA_DATA23 C23
MA_DATA22 B22
MA_DATA21 F18
MA_DATA20 E18
MA_DATA19 E20
MA_DATA18 D22
MA_DATA17 C19
MA_DATA16 G18
MA_DATA15 G17
MA_DATA14 C17
MA_DATA13 F14
MA_DATA12 E14
MA_DATA11 H17
MA_DATA10 E17
MA_DATA9 E15
MA_DATA8 H15
MA_DATA7 E13
MA_DATA6 C13
MA_DATA5 H12
MA_DATA4 H11
MA_DATA3 G14
MA_DATA2 H14
MA_DATA1 F12
MA_DATA0 G12
MB_DM7
AD12 MB_DM6
AC16 MB_DM5
AE22 MB_DM4
AB26 MB_DM3
E25 MB_DM2
A22 MB_DM1
B16 MB_DM0
A12
MB_DQS_H7
AF12 MB_DQS_L7
AE12
MB_DQS_H6
AE16 MB_DQS_L6
AD16
MB_DQS_H5
AF21 MB_DQS_L5
AF22
MB_DQS_H4
AC25 MB_DQS_L4
AC26
MB_DQS_H3
F26 MB_DQS_L3
E26
MB_DQS_H2
A24 MB_DQS_L2
A23
MB_DQS_H1
D16 MB_DQS_L1
C16
MB_DQS_H0
C12 MB_DQS_L0
B12
MA_DM7 Y13
MA_DM6 AB16
MA_DM5 Y19
MA_DM4 AC24
MA_DM3 F24
MA_DM2 E19
MA_DM1 C15
MA_DM0 E12
MA_DQS_H7 W12
MA_DQS_L7 W13
MA_DQS_H6 Y15
MA_DQS_L6 W15
MA_DQS_H5 AB19
MA_DQS_L5 AB20
MA_DQS_H4 AD23
MA_DQS_L4 AC23
MA_DQS_H3 G22
MA_DQS_L3 G21
MA_DQS_H2 C22
MA_DQS_L2 C21
MA_DQS_H1 G16
MA_DQS_L1 G15
MA_DQS_H0 G13
MA_DQS_L0 H13
R368
0_0402_5%
R368
0_0402_5%
1 2
C9
0.01U_0402_25V7K
C9
0.01U_0402_25V7K
1
2

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_TDO
CPU_HTREF0
CPU_HTREF1
CPU_DBRDY
CPU_TMS
CPU_TEST19
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD
LDT_STOP#
LDT_STOP#
CPU_SID
CPU_SIC
CPU_CLKIN_SC_N
CPU_TDI
CPU_TRST#
CPU_TCK CPU_DBREQ#
CPU_TDO
CPU_SVC
CPU_SVD
CPU_TEST20
CPU_TEST21
CPU_TEST24
CPU_TEST22
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST17
CPU_TEST16
CPU_TEST14
CPU_TEST15
LDT_RST#
H_PWRGD
LDT_RST#
CPU_SVC
CPU_SVD
CPU_TEST27
H_PROCHOT#
THERMDA_CPU
THERMDC_CPU
EC_SMB_CK2
EC_SMB_DA2
CPU_VDDNB_FB_H
CPU_VDDNB_FB_L
CPU_VDD0_FB_H
CPU_VDD0_FB_L
CPU_TEST18
HDT_RST#
CPU_TEST12
CPU_TEST25H
CPU_TEST25L
CPU_TEST20
CPU_TEST21
CPU_TRST#
CPU_TDI
CPU_TMS
CPU_TCK
CPU_DBRDY
THERMDA_CPU
THERMDC_CPU
H_PROCHOT#
CPU_TEST22
CPU_TEST24
CPU_SID
CPU_SIC
SB_SID
SB_SIC
EC_SMB_DA
EC_SMB_CK
EC_SMB_DA2
EC_SMB_CK2
CPU_DBREQ#
CPU_TEST25H
CPU_TEST25L
CPU_THERMTRIP#_R
CPU_TEST19
CPU_TEST18
CPU_TEST12
CPU_TEST27
CPU_VDD1_FB_L
CPU_VDD1_FB_H
CPU_TEST23
CPU_TEST23
H_PWRGD<26>
LDT_STOP#<13,26>
LDT_RST#<26>
SB_PWRGD <13,27,36>
CPU_VDDNB_FB_H <52>
CPU_VDDNB_FB_L <52>
CPU_VDD0_FB_H<52> CPU_VDD0_FB_L<52>
CLK_CPU_BCLK<22>
CLK_CPU_BCLK#<22>
EC_SMB_DA2 <16,36>
EC_SMB_CK2 <16,36>
CPU_SVD <52>
CPU_SVC <52>
H_PROCHOT_R# <26>
H_THERMTRIP# <27>
SB_SID <27>
SB_SIC <27>
MAINPWON <44,45,49>
CPU_VDD1_FB_H<52> CPU_VDD1_FB_L<52>
+1.1VS
+2.5VDDA
+2.5VS
+3VS
+1.5V
+1.5VS
+1.5VS
+1.5VS
+3VS
+1.5V
+1.5V
+1.5V
+1.5V
+1.5V
+3VS
+1.5V
+1.5V
+1.5V
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
855Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
855Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
855Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
VDDA=0.25A
Address
1001 100X b
CPU internal thermal sensor
FDV301N, the Vgs is:
min = 0.65V
Typ = 0.85V
Max = 1.5V
2.09V for Gate
Champlain: C1E
C1E: LDT_REQ# no connect
CLMC: LDT_REQ# connect to NB
LDT_RES# / MEMHOT#
no support in S1g4
T0 SB
T0 SB
TO EC
TO EC
PROCHOT:
Input: For HTC Function
Output: Over Temperature Condition
For SCAN connect use
change to SGA00002N80
C20
0.1U_0402_16V4Z
C20
0.1U_0402_16V4Z
1
2
R6
10K_0402_5%
R6
10K_0402_5%
12
R27 510_0402_5%R27 510_0402_5%
1 2
R30 1K_0402_5%R30 1K_0402_5%
1 2
R35 1K_0402_5%R35 1K_0402_5%
1 2
C14
0.22U_0603_16V4Z
C14
0.22U_0603_16V4Z
1
2
C16 3900P_0402_50V7K C16 3900P_0402_50V7K
1 2
G
D S
Q3
BSH111 1N_SOT23-3
G
D S
Q3
BSH111 1N_SOT23-3
2
13
R21
300_0402_5%
R21
300_0402_5%
1 2
R29 1K_0402_5%R29 1K_0402_5%
1 2
R14 1K_0402_5%R14 1K_0402_5%
1 2
R34 1K_0402_5%R34 1K_0402_5%
1 2
R16 44.2_0402_1%R16 44.2_0402_1%
1 2
R41
31.6K_0402_1%
R41
31.6K_0402_1%
12
R22 510_0402_5%R22 510_0402_5%
1 2
JCPU1D
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1D
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDDA1
F8 VDDA2
F9
RESET_L
B7 PWROK
A7 LDTSTOP_L
F10
SIC
AF4 SID
AF5
HT_REF1
P6 HT_REF0
R6
VDD0_FB_H
F6 VDD0_FB_L
E6 VDDIO_FB_H W9
VDDIO_FB_L Y9
THERMTRIP_L AF6
PROCHOT_L AC7
RSVD2
A5
LDTREQ_L
C6
SVC A6
SVD A4
RSVD6 C5
RSVD4
B5
RSVD1
A3
CLKIN_H
A9 CLKIN_L
A8
DBRDY
G10 TMS
AA9 TCK
AC9 TRST_L
AD9 TDI
AF9
DBREQ_L E10
TDO AE9
TEST25_H
E9 TEST25_L
E8
TEST19
G9 TEST18
H10
RSVD8 AA7
TEST9
C2
TEST17 D7
TEST16 E7
TEST15 F7
TEST14 C7
TEST12
AC8
TEST7 C3
TEST6
AA6
THERMDC W7
THERMDA W8
VDD1_FB_H
Y6 VDD1_FB_L
AB6
TEST29_H C9
TEST29_L C8
TEST24
AE7
TEST23
AD7
TEST22
AE8
TEST21
AB8 TEST20
AF7
TEST28_H J7
TEST28_L H8
TEST27
AF8
ALERT_L
AE6
TEST10 K8
TEST8 C4
RSVD3
B3
RSVD5
C1
VDDNB_FB_H H6
VDDNB_FB_L G6
RSVD7 D5
RSVD11 W18
MEMHOT_L AA8
RSVD10 H18
RSVD9 H19
VSS M11
T2 PADT2 PAD
R19 1K_0402_5%R19 1K_0402_5%
1 2
C21
100P_0402_50V8J
@
C21
100P_0402_50V8J
@
1 2
R10
169_0402_1%
R10
169_0402_1%
12
U2
NC7SZ08P5X_NL_SC70-5
U2
NC7SZ08P5X_NL_SC70-5
B2
A1
Y
4
P5
G
3
T8PAD T8PAD
T5PAD T5PAD
R45 0_0402_5%R45 0_0402_5%
1 2
R265 1K_0402_5%R265 1K_0402_5%
1 2
R9 0_0402_5%@R9 0_0402_5%@
1 2
C17
0.01U_0402_25V4Z
@
C17
0.01U_0402_25V4Z
@
1
2
C15 3900P_0402_50V7KC15 3900P_0402_50V7K
1 2
R18
300_0402_5%
R18
300_0402_5%
1 2
R47 0_0402_5%R47 0_0402_5%
1 2
R37220_0402_5%
@
R37220_0402_5%
@
12
C22 0.1U_0402_16V4ZC22 0.1U_0402_16V4Z
1 2
R40300_0402_5% R40300_0402_5%
1 2
C19
0.01U_0402_25V4Z
@
C19
0.01U_0402_25V4Z
@
1
2
R32 1K_0402_5%R32 1K_0402_5%
1 2
R39300_0402_5%
@
R39300_0402_5%
@
12
R13 0_0402_5%R13 0_0402_5%
1 2
R8 0_0402_5%R8 0_0402_5%
1 2
L1
FBMA-L11-201209-221LMA30T_0805
L1
FBMA-L11-201209-221LMA30T_0805
1 2
C124.7U_0805_10V4Z C124.7U_0805_10V4Z
1
2
R20 1K_0402_5%R20 1K_0402_5%
1 2
R11 300_0402_5%R11 300_0402_5%
1 2
G
D S
Q2
BSH111 1N_SOT23-3
G
D S
Q2
BSH111 1N_SOT23-3
2
13
R38220_0402_5%
@
R38220_0402_5%
@
12
R23 510_0402_5%@R23 510_0402_5%@
1 2
R44 0_0402_5%
@
R44 0_0402_5%
@
1 2
R46 0_0402_5%
@
R46 0_0402_5%
@
1 2
T7PAD T7PAD
R12 1K_0402_5%R12 1K_0402_5%
1 2
U1
ADM1032ARMZ_MSOP8
@U1
ADM1032ARMZ_MSOP8
@
VDD
1
ALERT# 6
THERM#
4GND 5
D+
2
D-
3
SCLK 8
SDATA 7
R43 0_0402_5%@ R43 0_0402_5%@
1 2
T3PAD T3PAD
R26 510_0402_5%@R26 510_0402_5%@
1 2
C13
3300P_0402_50V7K
C13
3300P_0402_50V7K
1
2
R17
300_0402_5%
R17
300_0402_5%
1 2
R15 44.2_0402_1%R15 44.2_0402_1%
1 2
E
B
C
Q1
MMBT3904_NL_SOT23-3
E
B
C
Q1
MMBT3904_NL_SOT23-3
2
3 1
R42
30K_0402_1%
R42
30K_0402_1%
12
R28 1K_0402_5%R28 1K_0402_5%
1 2
R25 80.6_0402_1%R25 80.6_0402_1%
12
SAMTEC_ASP-68200-07
JP2
CONN@ SAMTEC_ASP-68200-07
JP2
CONN@
2
4
6
8
10
12
14
16
18
20
22
2423
21
19
17
15
13
11
9
7
5
3
1
26
R36220_0402_5%
@
R36220_0402_5%
@
12
R24 0_0402_5%R24 0_0402_5%
1 2
+
C11
150U_B_6.3VM_R40M
+
C11
150U_B_6.3VM_R40M
1
2R7
1K_0402_5%
R7
1K_0402_5%
1 2
T6PAD T6PAD
C18
0.01U_0402_25V4Z
@
C18
0.01U_0402_25V4Z
@
1
2
R31 1K_0402_5%R31 1K_0402_5%
1 2
R33 1K_0402_5%R33 1K_0402_5%
1 2

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE
+CPU_VDDR
+CPU_CORE
+CPU_CORE
+CPU_CORE
+1.5V
+1.5V
+1.5V
+1.5V +1.5V
+CPU_VDDR
+CPU_VDDR
+CPU_CORE_NB
+1.5V
+1.5V
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE_NB
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
955Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
955Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
955Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Between CPU Socket and DIMM
180PF Qt'y follow the distance between
CPU socket and DIMM0. <2.5inch>
Under CPU Socket
Athlon 64 S1
Processor Socket
Near CPU Socket
VDDR decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling. +CPU_CORE_NB decoupling.
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1
Processor Socket
4A
36A
TBD
change to SGA00002N80
JCPU1E
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1E
FOX_PZ6382A-284S-41F_Champlian
CONN@
VDD1_25 AC4
VDD1_26 AD2
VDD0_1
G4 VDD0_2
H2 VDD0_3
J9 VDD0_4
J11 VDD0_5
J13
VDD0_7
K6 VDD0_8
K10 VDD0_9
K12 VDD0_10
K14 VDD0_11
L4 VDD0_12
L7 VDD0_13
L9 VDD0_14
L11 VDD0_15
L13
VDD0_17
M2 VDD0_18
M6 VDD0_19
M8 VDD0_20
M10 VDD0_21
N7 VDD0_22
N9 VDD0_23
N11
VDD1_1 P8
VDD1_2 P10
VDD1_3 R4
VDD1_4 R7
VDD1_5 R9
VDD1_6 R11
VDD1_7 T2
VDD1_8 T6
VDD1_9 T8
VDD1_10 T10
VDD1_11 T12
VDD1_12 T14
VDD1_13 U7
VDD1_14 U9
VDD1_15 U11
VDD1_16 U13
VDD1_18 V6
VDD1_19 V8
VDD1_20 V10
VDD1_21 V12
VDD1_22 V14
VDD1_23 W4
VDD1_24 Y2
VDD0_6
J15
VDDNB_1
K16
VDD0_16
L15
VDDNB_2
M16 VDDNB_3
P16 VDDNB_4
T16
VDD1_17 U15
VDDNB_5
V16
VDDIO1
H25 VDDIO2
J17 VDDIO3
K18 VDDIO4
K21 VDDIO5
K23 VDDIO6
K25 VDDIO7
L17 VDDIO8
M18 VDDIO9
M21 VDDIO10
M23 VDDIO11
M25 VDDIO12
N17 VDDIO13 P18
VDDIO14 P21
VDDIO15 P23
VDDIO16 P25
VDDIO17 R17
VDDIO18 T18
VDDIO19 T21
VDDIO20 T23
VDDIO21 T25
VDDIO22 U17
VDDIO23 V18
VDDIO24 V21
VDDIO25 V23
VDDIO26 V25
VDDIO27 Y25
C41
180P_0402_50V8J
C41
180P_0402_50V8J
1
2
C46
0.22U_0603_16V4Z
C46
0.22U_0603_16V4Z
1
2
C51
0.22U_0603_16V4Z
C51
0.22U_0603_16V4Z
1
2
C61
1000P_0402_50V7K
C61
1000P_0402_50V7K
1
2
C78
0.22U_0603_16V4Z
C78
0.22U_0603_16V4Z
1
2
C65
0.01U_0402_25V4Z
C65
0.01U_0402_25V4Z
1
2
C58
4.7U_0805_10V4Z
C58
4.7U_0805_10V4Z
1
2
C32
22U_0805_6.3V6M
C32
22U_0805_6.3V6M
1
2
C28
22U_0805_6.3V6M
C28
22U_0805_6.3V6M
1
2
C355
0.22U_0603_16V4Z
C355
0.22U_0603_16V4Z
1
2
C49
22U_0805_6.3V6M
C49
22U_0805_6.3V6M
1
2
C79
0.22U_0603_16V4Z
C79
0.22U_0603_16V4Z
1
2
+
C25
330U_X_2VM_R6M
+
C25
330U_X_2VM_R6M
1
2
C34
22U_0805_6.3V6M
C34
22U_0805_6.3V6M
1
2
C66
0.1U_0402_16V7K
C66
0.1U_0402_16V7K
1
2
C354
0.22U_0603_16V4Z
C354
0.22U_0603_16V4Z
1
2
C72
4.7U_0805_10V4Z
C72
4.7U_0805_10V4Z
1
2
+
C56
150U_B_6.3VM_R40M
+
C56
150U_B_6.3VM_R40M
1
2
C60
0.22U_0603_16V4Z
C60
0.22U_0603_16V4Z
1
2
+
C24
330U_X_2VM_R6M
+
C24
330U_X_2VM_R6M
1
2
C29
22U_0805_6.3V6M
C29
22U_0805_6.3V6M
1
2
C59
0.22U_0603_16V4Z
C59
0.22U_0603_16V4Z
1
2
C73
4.7U_0805_10V4Z
C73
4.7U_0805_10V4Z
1
2
C33
22U_0805_6.3V6M
C33
22U_0805_6.3V6M
1
2
C67
0.1U_0402_16V7K
C67
0.1U_0402_16V7K
1
2
C55
22U_0805_6.3V6M
C55
22U_0805_6.3V6M
1
2
C76
4.7U_0805_10V4Z
C76
4.7U_0805_10V4Z
1
2
C77
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
1
2
C38
180P_0402_50V8J
C38
180P_0402_50V8J
1
2
C54
0.22U_0603_16V4Z
C54
0.22U_0603_16V4Z
1
2
C80
1000P_0402_50V7K
C80
1000P_0402_50V7K
1
2
C64
0.01U_0402_25V4Z
C64
0.01U_0402_25V4Z
1
2
C39
0.22U_0603_16V4Z
C39
0.22U_0603_16V4Z
1
2
C63
180P_0402_50V8J
C63
180P_0402_50V8J
1
2
C69
180P_0402_50V8J
C69
180P_0402_50V8J
1
2
C35
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
1
2
C57
4.7U_0805_10V4Z
C57
4.7U_0805_10V4Z
1
2
C48
180P_0402_50V8J
C48
180P_0402_50V8J
1
2
C68
180P_0402_50V8J
C68
180P_0402_50V8J
1
2
+
C27
330U_X_2VM_R6M
@
+
C27
330U_X_2VM_R6M
@
1
2
C70
180P_0402_50V8J
C70
180P_0402_50V8J
1
2
C52
0.22U_0603_16V4Z
C52
0.22U_0603_16V4Z
1
2
C30
22U_0805_6.3V6M
C30
22U_0805_6.3V6M
1
2
+
C75
330U_X_2VM_R6M
+
C75
330U_X_2VM_R6M
1
2
C43
22U_0805_6.3V6M
C43
22U_0805_6.3V6M
1
2
C42
22U_0805_6.3V6M
C42
22U_0805_6.3V6M
1
2
C37
0.01U_0402_25V4Z
C37
0.01U_0402_25V4Z
1
2
C36
0.22U_0603_16V4Z
C36
0.22U_0603_16V4Z
1
2
C31
22U_0805_6.3V6M
C31
22U_0805_6.3V6M
1
2
C53
0.22U_0603_16V4Z
C53
0.22U_0603_16V4Z
1
2
C82
180P_0402_50V8J
C82
180P_0402_50V8J
1
2
C83
180P_0402_50V8J
C83
180P_0402_50V8J
1
2
C47
0.22U_0603_16V4Z
C47
0.22U_0603_16V4Z
1
2
C62
1000P_0402_50V7K
C62
1000P_0402_50V7K
1
2
+
C23
330U_X_2VM_R6M
+
C23
330U_X_2VM_R6M
1
2
C44
22U_0805_6.3V6M
C44
22U_0805_6.3V6M
1
2
+
C26
330U_X_2VM_R6M
+
C26
330U_X_2VM_R6M
1
2
C45
22U_0805_6.3V6M
C45
22U_0805_6.3V6M
1
2
JCPU1F
FOX_PZ6382A-284S-41F_Champlian
CONN@
JCPU1F
FOX_PZ6382A-284S-41F_Champlian
CONN@
VSS1
AA4 VSS2
AA11 VSS3
AA13 VSS4
AA15 VSS5
AA17 VSS6
AA19 VSS7
AB2 VSS8
AB7 VSS9
AB9 VSS10
AB23 VSS11
AB25 VSS12
AC11 VSS13
AC13 VSS14
AC15 VSS15
AC17 VSS16
AC19 VSS17
AC21 VSS18
AD6 VSS19
AD8 VSS20
AD25 VSS21
AE11 VSS22
AE13 VSS23
AE15 VSS24
AE17 VSS25
AE19 VSS26
AE21 VSS27
AE23 VSS28
B4 VSS29
B6 VSS30
B8 VSS31
B9 VSS32
B11 VSS33
B13 VSS34
B15 VSS35
B17 VSS36
B19 VSS37
B21 VSS38
B23 VSS39
B25 VSS40
D6 VSS41
D8 VSS42
D9 VSS43
D11 VSS44
D13 VSS45
D15 VSS46
D17 VSS47
D19 VSS48
D21 VSS49
D23 VSS50
D25 VSS51
E4 VSS52
F2 VSS53
F11 VSS54
F13 VSS55
F15 VSS56
F17 VSS57
F19 VSS58
F21 VSS59
F23 VSS60
F25 VSS61
H7 VSS62
H9 VSS63
H21 VSS64
H23 VSS65
J4
VSS66 J6
VSS67 J8
VSS68 J10
VSS69 J12
VSS70 J14
VSS71 J16
VSS72 J18
VSS73 K2
VSS74 K7
VSS75 K9
VSS76 K11
VSS77 K13
VSS78 K15
VSS79 K17
VSS80 L6
VSS81 L8
VSS82 L10
VSS83 L12
VSS84 L14
VSS85 L16
VSS86 L18
VSS87 M7
VSS88 M9
VSS89 AC6
VSS90 M17
VSS91 N4
VSS92 N8
VSS93 N10
VSS94 N16
VSS95 N18
VSS96 P2
VSS97 P7
VSS98 P9
VSS99 P11
VSS100 P17
VSS101 R8
VSS102 R10
VSS103 R16
VSS104 R18
VSS105 T7
VSS106 T9
VSS107 T11
VSS108 T13
VSS109 T15
VSS110 T17
VSS111 U4
VSS112 U6
VSS113 U8
VSS114 U10
VSS115 U12
VSS116 U14
VSS117 U16
VSS118 U18
VSS119 V2
VSS120 V7
VSS121 V9
VSS122 V11
VSS123 V13
VSS124 V15
VSS125 V17
VSS126 W6
VSS127 Y21
VSS128 Y23
VSS129 N6
C81
1000P_0402_50V7K
C81
1000P_0402_50V7K
1
2
C74
4.7U_0805_10V4Z
C74
4.7U_0805_10V4Z
1
2
C50
180P_0402_50V8J
C50
180P_0402_50V8J
1
2
C40
0.01U_0402_25V4Z
C40
0.01U_0402_25V4Z
1
2
C71
4.7U_0805_10V4Z
C71
4.7U_0805_10V4Z
1
2

A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRA_SDQ[0..63]
DDRA_SMA[0..15]
DDRA_SDM[0..7]
DDRA_SDQ36
DDRA_SDQ63
DDRA_SDQ26
DDRA_SDQS6
DDRA_SDQ2
DDRA_SDQ5
DDRA_SDQ22
DDRA_SDQ25
DDRA_SDQ35
DDRA_SMA12
DDRA_SDQ14
DDRA_SDQS0#
DDRA_SDQS4
DDRA_SDM6
DDRA_SDQ42
DDRA_CKE1
DDRA_SDQ27
DDRA_SMA15
DDRA_SDQ31
DDRA_CKE0
DDRA_SDQ12
DDRA_SDQ59
DDRA_SMA3
DDRA_SDQ6
DDRA_SCS1#
DDRA_SDQ39
DDRA_SBS1#
DDRA_SWE#
DDRA_SMA7
DDRA_SDQS0
DDRA_SMA0
DDRA_SDM2
DDRA_SDQS7
DDRA_SDM1
DDRA_SDQ57
DDRA_SDQ46
DDRA_SDQ0
DDRA_SDQ28
DDRA_SDM0
DDRA_SDQS5#
DDRA_SDQ51
DDRA_SDQ19
DDRA_SDM4
DDRA_SDQ4
DDRA_SDQ30
DDRA_SDQS2
DDRA_SDQ44
DDRA_SRAS#
DDRA_SDQ33
DDRA_SDQ58
DDRA_SDM5
DDRA_SDQS3
DDRA_SMA8
DDRA_SCS0#
DDRA_SDQ10
DDRA_SMA6
DDRA_SMA10
DDRA_SDQ3
MEM_MA_RST#
DDRA_SDQS7#
DDRA_SDQS6#
DDRA_SDQ1
DDRA_SDQ40
DDRA_SMA9
DDRA_SDQ16
DDRA_SDQ29
DDRA_SDQS4#
DDRA_SDQ52
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ54
DDRA_SDQ49
DDRA_SBS2#
DDRA_SDQ45
DDRA_SDQ9
DDRA_SDM7
DDRA_SMA1
DDRA_SDQ7
DDRA_SDQ13
DDRA_SDQ20
DDRA_SDQ60
DDRA_SBS0#
DDRA_SCAS# DDRA_ODT0
DDRA_SDQ37
DDRA_SMA5
DDRA_SDQS1#
DDRA_SMA14
DDRA_SDQ55
DDRA_SMA4
DDRA_SDQ21
DDRA_SDQ62
DDRA_SDQ24
DDRA_SDQ15
DDRA_SDQ56
DDRA_SDQ23
DDRA_SDQ53
DDRA_SDQ47
DDRA_ODT1
DDRA_SDQ18
DDRA_SDQ43
DDRA_SDQ34
DDRA_CLK1
DDRA_CLK1#
DDRA_SDQ48
DDRA_SDQS2#
DDRA_SDQ11
DDRA_SDQ38
DDRA_CLK0
DDRA_CLK0#
DDRA_SDQ32
DDRA_SDQS3#
DDRA_SMA13
DDRA_SMA11
DDRA_SDQ50
DDRA_SDQ8
DDRA_SDQS1
DDRA_SDQ61
DDRA_SMA2
DDRA_SDQ41
DDRA_SDQ17
+VREF_DQ +VREF_CA
DDRA_SMA[0..15] <7>
DDRA_SDQ[0..63] <7>
DDRA_SDM[0..7] <7>
DDRA_CKE0<7>
DDRA_SCS1#<7>
DDRA_SBS1# <7>
DDRA_SWE#<7>
DDRA_SRAS# <7>
DDRA_SCS0# <7>
MEM_MA_RST# <7>
DDRA_SBS2#<7>
DDRA_SBS0#<7>
DDRA_SCAS#<7> DDRA_ODT0 <7>
DDRA_ODT1 <7>
DDRA_CLK1# <7>
DDRA_CLK1 <7>
DDRA_CLK0<7> DDRA_CLK0#<7>
DDRA_CKE1 <7>
SB_SMDAT0 <11,22,27,34>
SB_SMCLK0 <11,22,27,34>
DDRA_SDQS3 <7>
DDRA_SDQS0 <7>
DDRA_SDQS3# <7>
DDRA_SDQS0# <7>
DDRA_SDQS5 <7>
DDRA_SDQS5# <7>
DDRA_SDQS7 <7>
DDRA_SDQS7# <7>
DDRA_SDQS1#<7> DDRA_SDQS1<7>
DDRA_SDQS2#<7> DDRA_SDQS2<7>
DDRA_SDQS4#<7> DDRA_SDQS4<7>
DDRA_SDQS6#<7> DDRA_SDQS6<7>
+1.5V
+0.75VS
+3VS
+1.5V +1.5V
+3VS
+VREF_DQ
+VREF_DQ
+VREF_CA
+1.5V
+0.75VS
+1.5V+VREF_CA
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
10 55Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
10 55Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification
Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Deciphered Date
401827
D
SCHEMATIC, MB A5911
Custom
10 55Tuesday, September 14, 2010
2008/10/06 2010/03/12
Compal Electronics, Inc.
DIMM_A STD H:8mm
<Address: 00>
Place near DIMM1
C10
1000P_0402_50V7K
C10
1000P_0402_50V7K
1
2
R51
10K_0402_5%
R51
10K_0402_5%
12
R50 10K_0402_5% R50 10K_0402_5%
1 2
C961
4.7U_0603_6.3V6K
C961
4.7U_0603_6.3V6K
1
2
C643
0.1U_0402_16V4Z
C643
0.1U_0402_16V4Z
1
2
C644
0.1U_0402_16V4Z
C644
0.1U_0402_16V4Z
1
2
C84
4.7U_0805_10V4Z
@
C84
4.7U_0805_10V4Z
@
1
2
C91
0.1U_0402_16V4Z
C91
0.1U_0402_16V4Z
1
2
C645
0.1U_0402_16V4Z
C645
0.1U_0402_16V4Z
1
2
C85
0.01U_0402_25V7K
C85
0.01U_0402_25V7K
1
2C680
1000P_0402_50V7K
C680
1000P_0402_50V7K
1
2
T9PAD T9PAD
C235
4.7U_0805_10V4Z
@
C235
4.7U_0805_10V4Z
@
1
2
C89
1000P_0402_50V7K
C89
1000P_0402_50V7K
1
2
R310
1K_0402_1%
R310
1K_0402_1%
1 2
C88
0.1U_0402_16V4Z
C88
0.1U_0402_16V4Z
1
2
C646
0.1U_0402_16V4Z
C646
0.1U_0402_16V4Z
1
2
R49
1K_0402_1%
R49
1K_0402_1%
1 2
C640
0.1U_0402_16V4Z
C640
0.1U_0402_16V4Z
1
2
R48
1K_0402_1%
R48
1K_0402_1%
1 2
C90
2.2U_0603_6.3V4Z
C90
2.2U_0603_6.3V4Z
1
2
C647
0.1U_0402_16V4Z
C647
0.1U_0402_16V4Z
1
2
C641
0.1U_0402_16V4Z
C641
0.1U_0402_16V4Z
1
2
C664
0.1U_0402_16V4Z
C664
0.1U_0402_16V4Z
1
2
C351
0.01U_0402_25V7K
C351
0.01U_0402_25V7K
1
2
R315
1K_0402_1%
R315
1K_0402_1%
1 2
C87
0.1U_0402_16V4Z
C87
0.1U_0402_16V4Z
1
2
C642
0.1U_0402_16V4Z
C642
0.1U_0402_16V4Z
1
2
JDIMM1
FOX_AS0A626-U8SN-7F
CONN@
JDIMM1
FOX_AS0A626-U8SN-7F
CONN@
VREF_DQ
1VSS1 2
VSS2
3DQ4 4
DQ0
5DQ5 6
DQ1
7VSS3 8
VSS4
9DQS#0 10
DM0
11 DQS0 12
VSS5
13 VSS6 14
DQ2
15 DQ6 16
DQ3
17 DQ7 18
VSS7
19 VSS8 20
DQ8
21 DQ12 22
DQ9
23 DQ13 24
VSS9
25 VSS10 26
DQS#1
27 DM1 28
DQS1
29 RESET# 30
VSS11
31 VSS12 32
DQ10
33 DQ14 34
DQ11
35 DQ15 36
VSS13
37 VSS14 38
DQ16
39 DQ20 40
DQ17
41 DQ21 42
VSS15
43 VSS16 44
DQS#2
45 DM2 46
DQS2
47 VSS17 48
VSS18
49 DQ22 50
DQ18
51 DQ23 52
DQ19
53 VSS19 54
VSS20
55 DQ28 56
DQ24
57 DQ29 58
DQ25
59 VSS21 60
VSS22
61 DQS#3 62
DM3
63 DQS3 64
VSS23
65 VSS24 66
DQ26
67 DQ30 68
DQ27
69 DQ31 70
VSS25
71 VSS26 72
A12/BC#
83 A11 84
A9
85 A7 86
VDD5
87 VDD6 88
A8
89 A6 90
CKE0
73 CKE1 74
VDD1
75 VDD2 76
NC1
77 A15 78
BA2
79 A14 80
VDD3
81 VDD4 82
A5
91 A4 92
VDD7
93 VDD8 94
A3
95 A2 96
A1
97 A0 98
VDD9
99 VDD10 100
CK0
101 CK1 102
CK0#
103 CK1# 104
VDD11
105 VDD12 106
A10/AP
107 BA1 108
BA0
109 RAS# 110
VDD13
111 VDD14 112
WE#
113 S0# 114
CAS#
115 ODT0 116
VDD15
117 VDD16 118
A13
119 ODT1 120
S1#
121 NC2 122
VDD17
123 VDD18 124
NCTEST
125 VREF_CA 126
VSS27
127 VSS28 128
DQ32
129 DQ36 130
DQ33
131 DQ37 132
VSS29
133 VSS30 134
DQS#4
135 DM4 136
DQS4
137 VSS31 138
VSS32
139 DQ38 140
DQ34
141 DQ39 142
DQ35
143 VSS33 144
VSS34
145 DQ44 146
DQ40
147 DQ45 148
DQ41
149 VSS35 150
VSS36
151 DQS#5 152
DM5
153 DQS5 154
VSS37
155 VSS38 156
DQ42
157 DQ46 158
DQ43
159 DQ47 160
VSS39
161 VSS40 162
DQ48
163 DQ52 164
DQ49
165 DQ53 166
VSS41
167 VSS42 168
DQS#6
169 DM6 170
DQS6
171 VSS43 172
VSS44
173 DQ54 174
DQ50
175 DQ55 176
DQ51
177 VSS45 178
VSS46
179 DQ60 180
DQ56
181 DQ61 182
DQ57
183 VSS47 184
VSS48
185 DQS#7 186
DM7
187 DQS7 188
VSS49
189 VSS50 190
DQ58
191 DQ62 192
DQ59
193 DQ63 194
VSS51
195 VSS52 196
SA0
197 EVENT# 198
VDDSPD
199 SDA 200
SA1
201 SCL 202
VTT1
203 VTT2 204
G1
205 G2 206
C665
0.1U_0402_16V4Z
C665
0.1U_0402_16V4Z
1
2