CompuPro RAM 24A User manual

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8261-0477
Ap
ri
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19
88

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RAM
24A
Technical Manual
High
Speed
Static
Memory
for
the
IEEE
696
Bus
RAM
24A
Technical
Manual
• 82
61
·0477
i

.
'
t
RAM
24A
Technical
Manual
477
Cop}
'
right
1988
Viasyn
Corporation
Hay~
·
ard,
CA
94545
Part
No:
8261-0477
File
name:
RAM24A.MAN
DISCLAIMER
-
Viasyn
Corporation
makes
no
representations
or
warra
·
nties
with
respect
to
the
contents
hereof
9nd
specifically
disclaims
any
implied
warranties
of
merchantability
or
fitness
for
any
particular
purpose.
Further
1 VI.A.SYN
reserves
the
right
to
revise
this
publication
and
to
make
any
changes
from
time
to
time
in
the
content
here
·
of
without
obljgation
of
VIASYN
to
notify
any
person
of
such
revision
or
changes.
AlJ
rights
reserved.
No
part
of
this
publication
may
be
reproduced
or
transmitted
in
any
form~
or
by
any
means,
without
the
written
permission
of
VIASYN.
Printed
and
assembled
in
the
United
States
of
America.
Trademarks:
RAM
24A,
CPU
286,
CPU
68K,
CPU
8085
/
88,
CPU
8086,
DISK
3,
SPI86,
SPUZ,
the
CompuPro
logo;
Vias)
·n
Corporation.
R~M
24A
Te c~
nical
Manual •
8261·0477
i i
1
'
I
r
I
I
'
I
Contents
Pref
ace
Overall
Description
•
TM
Installing
the
RAM
24A
Jumper
Summary
Jumpers
J
l-J4
-
Memory
Address
Select
Jumper
JS
-
SPIO
™
Window
Select
Positions
A
through
E: Size
Positions
F
through
L:
Location
SPIO
without
SPUZ""
or
SPl86"'
SPIO
with
SPUZ(s)
and
without
SPI
86
SPIO
with
SP186(s)
and
without
SPUZ
SPIO
with
both
SPUZ
and
SP186
Jumper
J5
Summary
Jumper
J6
Jumper
J7
System
Configuration
Jumper
Summary
Locating
RAM
ICs
by
Address
and
Byte
Specifications
Schematics
1
I
2
s
5
6
6
7
7
7
7
7
8
8
8
9
IJ
12
13
RAM
24A
Technical
Manual • 8261·0477
i i i

..
I
Preface
This
manual
de
s
cribes
the
features
and
functi
ons
of
the
RAM
24A
board
.
This
is a
referen
ce manu31
for
hardware
engineers,
programmers
and
anyone
el
se
who
needs to
understand
how
the
RAM
24A
functions
in
a
CompuPro
computer
system
.
It
is
neither
a
troubleshooting
guide
nor
a
repair
manual
.
This
manual
begins
with
an
overall
de
s
cription
of
the
board
and
a
detailed
account
of
the
jumper
settings.
Specifications
and
schematics
are
also
included
.
Overall Description
CompuPro's
RAM
24A
board
is a
high
speed
CMOS
Static
RAM
board
for
S-JOO
Computers
.
The
RAM
24A
uses 32
high
performance
32K
by
8-bit
CMOS
RAM
chips
to
provide
a total
of
1
Mb
or
5I
2K
words
of
storage.
The
board
works
in
"word wide"
mode
in
16-bit
applications,
as
well as in "byte
wide"
mode
in
8-bit
applications.
Supported
by
CompuPro's
Concurrent
DOS
8-16
™
multi-user,
multi-taskjng
operating systems,
the
RAM
24A
is
designed
to
work
with
our
12
MHz,
two
-
cycle
CPU
286
TM
•
In
addition,
the
RAM
24A has
jumper
selectable
windows
that
can
be
blocked
out
for
use
in
systems
with
SPIO, SP186
and
/
or
SPUZ
boards
that
overlap
the
RAM
24A
memory
space,
thus
eliminating
the
use
of
the
S-100
PHANTOM•
signal.
(
co111i11ued)
RAH
24A
Techni
cal
Menual • 8261·0477
1

Note:
The
RAM
24A
was
designed
to
run
with
the
12
MHz.
two-cycle
CPU
286""
and
may
not
work
with
older
processors.
SIOO
pins 3 and
21
are
grounded
on
the
RAM
24A.
Pin
3
is
XRDY
and
pin
21
is
an
NDEF
pin.
previously
used
by
CompuPro
as
Q>disable.
Pins
3
and
2I are
inputs
on
the
CPU
8085/88ru ,
CPU
80861M •
Pin
3
is
an
input
on
DISK
3tm boards
earlier
than
Rev. J.
On
the
CPU
68K
n..
•
pin
21
is
a
jumperable
input
(J
11)
and
pin
3 is
used
only
on
boards
earlier
t.han
Rev.
H.
To
modify
these
boards
for
use
with
the
RA~1
24A,
disconnect
pins
3
and
21
from
the
IC
inputs
to
which
they
go
(or
remo"e
jumpers)
and
pull
the
disconnected
inputs
on
the
1c·s
on
the
board
up
to
+5V.
(This
is
not
required
if
a
jumper
is
present.)
See
the
specific
board
technical manual
for
location
of
IC's and
jumpers.
Installing
the
RAM
24A
ST
A
TIC
WARNING:
Please
observe
these precautions:
•
Store
only
in
anti-static
materials. Do
not
use
non-conductive
Styrofoam
or
plastic trays
or
bags.
•
Observe
proper
static
discharge
techniques
when
handling
boards.
• K.
eep
fa
bric
and
other
static-generating
materials
away
from
boards
and
circuits.
•
Turn
off
power
when
inserting
or
removing
boards.
Leave
all
power
supplies
off
for
several
minutes
to
be
certain
no
voltage is
present.
(
co11ti11ued)
RAM
Z4A
Technical
Manual • 8261·0477
z
•
Installing
the
RAM
24A
Basic Installation
Step
J.
Unpack the
RA!tf
14A Board.
Along
with
the
board,
you
\\'ill
find
two
card
extractors
in
the
anti-static
plastic bag.
PEG
HOLE
CARD
EXTRACTOR /
Step 2. Install
Card
Extractors.
J. Hold
the
board
with
the
component
side
toward
you.
2. Insert
the
peg
on
the
card
extractor
into
the
hoJe in
the
right
corner
of
the
board.
Fold
the
extractor
over
the
board's
edge
until the
extractor's
hole
snaps
over
the
peg.
NOTE;
Make
sure
the
Jong
edge
of
the
extractor
is aJong
the
top
edge
of
the board.
3.
Repeat
for
the
left
extractor.
Slep 3. Cl1eck Jumper
Setti11gs
For
standard
jumper
settings
for
use
with
a
CompuPro
operating
system.
check
your
Operati11g
SJ•stem
!11s1alla1;011
a11d
Cus1omizaiio11
G1,ide
Co11curre111
DOS 8-16. Jun1pers
are
described jn
detail
under
the
Jumper
Summary
section.
(
co11ti1111ed)
RAM
24A
Technical
Menual
• 8261·0477
3

I
•
.
'
t
Installing
the
RAM
24A
Step
4.
/11serJ
1he
RA.M 24A
i11to
1he
bus.
The
power
to
the
system
must
be
off.
Place
the
board
into
a slot
near
the
CPU.
The
edge
connector
is
offset~
so
the
RAM
24A
will
fit
only
one
way. Push down
GENTLY
until
the
board
is
firmly
installed.
Caution:
The
RAM
24A
without
regulators
is
designed
for
use
in
systems
\\
'
ith
regulated
po"
·
er
supplies
(boards
with
SV
stickers).
Do
not
atte
.
mpt
to
adapt
the
board
for
use
in
systen1s
with
unregulated
power
surf"l1ies.
Do
not
install
.•.
a
5-volt
regulator
(7805) face up
in
l !47. L!
47
requires
an
optional
heat
sink
/
regulator
adJpr~r.
available
from
CompuPro
(part
numt)er
l455-00..S9).
...
"L-t,
,..
i '
'"
-..rr
A '
.
....
To
install this
adapter.
use this
illustration
as
a guide:
STEP t
on•
OUI
l l1ol1• -
l«I
~6&!
"'°'
~
-
STEP
1
!la-
1.5
111ic10
-,_8CI c..,_.•ICi<
"'C•
"'
9
..
• •
--
I
!JI
7t
'k;
I h
;t
....
'
-·-
....
'
-·
-..
-
..
.....
_
.-
STEP 3 Attach
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RAM
24A
Technical
Manual -
6261·0477
4
•
'
Jumper
Summary
•
JUMPERS
JJ -
J4
-
Memory
Address
Select
Jumpers
J l -
J4
are
used
to
select
the
memory
address
bits
A20-23.
The
address
is
set
in a
binary
fashion
with
each
jumper
position
representing
an
address
bit.
JI
represents
A23.
12
represents
A20.
JJ
represents
A22
and
J4
represents
A2
l.
A
jumper
connected
to
ground
(B-
C)
represents
a
..
zero" and a
jumper
connected
to
+S
Volts
(A-C)
represents
a
..
one."
These
jumpers
are
connected
via
traces
(B-C)
on
the
board
to
ground
selecting
the
lowest allowable 1 l\1b
boundary
for
memory
(the
starting
address
of
the
memory
is
OOOOOOh
and
the
ending
address
is
OFFFFF).
To
address
the
board
at
any
other
boundary.
these traces must
be
cut
and
jumper
wires
connected
between
A
and
C.
For
example,
to
set
the
memory
to
start
at
400000h,
cut
the
trace
on
J3
(B-C)
and
install a
jumper
wire
from
A-C
on
J3.
NOTE:
The
following
jumpers
(J5-J7)
are
used
to
disable
areas
of
the
RAM
24A
memory space.
These
jumper
selectable
"windows"
are
used
in
systems
with
SPIO, SPUZ
and
/
or
SP186
boards
that
overlap
the
RAM
24A
memory
space,
thus
eliminating
the
need
for
the
S-100
PHANTOM*
signal.
In
CompuPro
standard
configurations,
the
SPIO
memory
space
(4
Kbytes
per
SPIO) is
set
at
the
top
of
pages
ODh,
OEh
or
OFh.
The
SP186
memory
space
is all
of
OFh
and
the
SPUZ
memory
space
is all
of
OEh.
The
RAM
24A windows
appear
in these pages
only.
If
the
SPIO, SP186
and
SPUZ
are
used
at
other
memory
locations.
it
is
recommended
that
they
be
used
without
underlying
system memory.
RAM
24A
Technical
Manual · 8261·0477
5
•

Jumper
Summary
JUMPER
JS
-SPIO Window Select
Jumper
JS
is
used
to
block
out
sections
of
the
RAM
24A
memory so it
doesn't
overlap
the
SPIO
memory
space.
This
jumper
has
positions
A
through
L and is located
in
the
lower
center
of
the
board.
Positions
A
through
E are
set
according
to
the
number
of
SPIOs in
the
system
and
positions
F
through
L are set according to
the
system
configuration
in
which
the
R
.
A\~1
24A
will
reside.
A
detailed
discussion
of
positions
A
through
E and F
through
L
follo~·s.
Note:
This
..
position does not have an I jumper.
JUMPER
JS
OL
AO
0 0 0 0 0 0 0 0 0
BC
0
EFG
HJ
K
J5:
PositiOJlS.
A
throu
gh
£:
SPIO
u··
i1rdO\V
Si=e Select
Each
SPIO
employs
a
4K
block
of
memory
space
and
standard
CornpuPro
software
supports
up
to
two
SPIOs.
Positions
A
thru
E
of
this
jumper
allow
a
4
or
SK
window
(or
no
~
·
indow)
to
be
blocked
out
of
the
RAM
24A
memory.
For
a
system
with
a
RAt\-1
24A
and
without
a SPIO (so
no
4
or
8K
window
need
s to
be
blocked
out),
place
a
shunt
from
C
to
D.
If
there
is
one
SPIO
in
the
S}!Stem
(and,
therefore
, ·a
4K
window
mu
st be
blocked
out),
shunt
A-B
and
D-E.
If
there
are
two
SPIOs
in
the
system
(8K
block
needed).
shunt
B-C
and
D-E.
The
following
table
summarizes
the
se
options.
Number
of
.
SPIOs
in
System
0
1
2
RAM
~4A
Technical
Manual • 8261-0477
6
Shunt
C-0
A-Band
D-E
B-C
and 0 -E
Jumper
Summary
J5
Posi1io11s
F tlirc1ugh
l:
SPIO
it
'
i11dow
Location
SeleC'I
Positions
F
through
L
of
Jumper
S
select
in
which
page
of
memory
(ODh,
OEh
or
Ofh)
the
4
or
8K
window
will
appear.
The
location
of
the
window
depends
on
the system
configuration.
For
instance,
if
there
are
SP
l86 boards in
the
system,
they
occupy
page
OFh
(the
full
64K)
of
the
memory
space.
When
an
SPl86
is
present,
(and
without
a
SPUZ
present)
the
SPJO
resides
in
the
upper
4K
(upper
8K
if
two
SPlOs)
of
page O'Eh.
(See
also
J6.)
In
tJ1is
configuration,
the
SPIO
window
must
appear
in
page
OEh. A
description
of
the
possible
configurations
and
the
appropriate
jumper
setting
follows
.
SPIO
wit/Joui a
SPUZ
or
an
SP
186
Jn
systems
with
a
SPIO
and
without
an
SPI
86
or
a
SPUZ,
the
SPJO
resides
in
the
upper
4K
(or
8K)
of
OFh.
Therefore,
the
SPIO
window
must
be
set
in
page
Ofh.
To
do
this,
shunt
G-H
and
J-K.
SPIO
with
J-15
SPUZs
mid
withouJ
a11
SPJ86
In
systems
with
SPIO
and
SPUZ(s)
but
without
an
SP186,
the
SPIO
resides
in
page
OFh
and
the
SPUZ
in
OEh.
Therefore,
the
SPIO
window
must
be
set
in
page OFh. To
do
this, shunt
G-H
and
J-K.
SPIO
with
1-15
SPJ86s
bul •vithoui a
SPUZ
In
systems
with
SPIO
and
SP186(s)
and
without
a
SPUZ,
the
SPIO
window
must
appear
in
page
OEh
since
the
SP
l
86s
reside
in
page
OFh. To do
this,
shunt
G-H
and
K-L.
SPIO
)Vitlr both
SPUZ
a1td
SP
186
In
systems
with
SPIO
and
both
SP
186
and
SPUZ
boards.
the
SPIO
window
must
appear
in
page
ODh.
To
do
this
shunt
F-G
and
J-K.
RAM
24A
Technical
Manuel • 8261·0477
1

t
-
•
t;
•
"
•
"
Jumper
Summary
To s11mmarize:
System
Configuration:
SPl0
/SP186/
SPUZ
SPIO/SP186
SPIO
alone
or
SPIO/
SPUZ
JUMPER
J6:
SPl86
Window Select
SPIO Page:
ODh
OEh
OFh
Jumper:
F-G,
J-K
G-H,
K -L
G-H,
J-K
•
Jumper
J6
must
have
a
shunt
to
window
out
the
RAf\1
space
for
the
SPl
86(s).
The
SPl
86"s
mt>n1
ory
space
is in
page
OFh
(the
~
'
hole
6-tK). In
s\
·
stems
\\'ith
•
I
to
J5 SPl86s,
place
a
shunt
in
this
jumper
so
the
RAM24A
and
the
SP186(s) \\till
not
ha\'e
overlapping memory.
JUMPER
J7:
SPUZ
Window
Select
Jumper
17 must
have
a
shunt
in
it
to
\\·indow
out
the
RAM
space for the SPUZs.
The
SPUZ's
memory
space
is
in
page
OEh (
the
\\·hole
64K).
In
S)
'S
tems
with
I
to
IS
SPUZs,
pla
ce a shunt in
this
jumper
so
the
RAM
2
4A
and
the
SPUZ
(s) will
not
ha
ve
overlapping
memory.
RAH
24A
Techni
cal
Manual -8261·0477
8
System
Configuration
Jumper
Summary:
#of
SP
I
Os
0
0
I
J
2
2
0
0
1
#
of
SPJ86s
0
1-15
0
1-
15
0
1-15
•
0
1-15
0
(
co11r
i11ued)
#of
SPUZs
0
0
0
0
0
0
1-
15
1-15
1-15
15
C-D
C-D
A-B
D-E
G-H
J-K
A-8
D-E
G-H
K-L
B-C
D-E
G-H
J-K
B-C
D-E
G-H
K-L
C-D
C-D
A-8
D-E
G-H
J-K
J6
no
s
hunt
shunt
no
shunt
shunt
no
shunt
shunt
no
shunt
shunt
no shunt
J7
no shunt
no
shunt
no shunt
no
shunt
no
shunt
no shunt
shunt
shunt
shunt
RAH
24A
Technical
Manual · 8261
·04
77
9

I
I
I
i
I
•
•
(
.
I
[
~
-
' •
.
-
~
System
Configuration
Jumper
Summary
-continued
#of
#
of
#of
15
SPJOs
SPJ86s SPUZs
1 1-15
1-15
A-8
D-E
F-G
J-K
2 0
1-15
B-C
D- E
G-H
J-K
2 1-15 1-15 B-C
D- E
F-G
J-K
RAM
24A
Technical
Manual •
8261-0477
10
J6
J7
shunt shunt
no shunt shun:
shunt shunt
•
l
• !
•
•
•
•
••
••
••
••
••
••
••
••
••
••
••
••
Locating
RAM ICs
by
Address
and
Byte
The
Component
Layout
below may
be
used as a map
to locate
specific
RAM
lCs
by
address
and
byte
array.
The
following table lists
the
address
within
the
board
and
what
RAM
chip
corresponds
to
that
address.
ADDRESS
OOOOOh-OFFFFh
lOOOOh-1
FFFFh
20000h-2FFFFh
30000h-3
FFFFh
40000h-4FFFFh
50000h-5FFFFh
60000h-6FFFFh
70000h-7FFFFh
80000h-8FFFFh
90000h-9FFFFh
AOOOOh-AFFFFh
BOOOOh-BFFFFh
COOOOh-CFFFFh
DOOOOh-DFFFFh
EOOO-Oh-EFFFFh
FOOOOh-FFFFFh
••
••
••
••
••
••
••
••
••
••
••
••
••
••
••
••
•• ••
••
••
••
••
••
••
••
••
••
••
••
••
EVEN
BYTE
••
••
••
••
••
••
OA
IA
2A
3A
4A
SA
6A
7A
8A
9A
JOA
I
IA
12A
13A
14A
ISA
••
••
••
••
••
••
,
••
••
••
••
••
••
••
••
••
••
••
••
ODD
BYTE
OB
IB
28
38
48
SB
68
78
88
98
108
I
18
128
138
148
158
::
, : e
•• •
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•
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•
1,
:,
•
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::
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~-~
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.....
,
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RAM
24A
Technical
Manual ·
8261·0477
11
•
•

I
I
'
•
'
l
I
'
Specifications
Size:
Weight:
Length
Depth
Height
Timing:
Memory:
S-100
Address
Space:
Power
Consumption:
RAM
24A
Technical
Manual •
8261·0477
12
253
mm
(10
in)
13
mm
(0.S in)
127 mm (S in)
308
g (10.8 oz.)
Meets
IEEE
696
timing
including
systems
beyond
6
~1Hz.
Meets
requirements
for two-
cycle
oper3tion
up
to
12
MHz
"·ith
CompuPro
CPU
286.
I
t-tb
(32,
3:'.!K
by
8 Static
RA~!)
.
Factor~·
set
at
lo\\·est I
~1b
boundary.
~-fay
be
set
in
the
field
to
any
other
I
~tb
boundary
o,
·
er
the
16
~1b
range
.
758
mA
t~
·
pical
at
SV
875
mA
maximum.
-
.
!
•
.
.
.'
.
•
.
I
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-
'
.
•
•
I
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