Computer Automation NAKED MINI LSI Series User manual

10077-00AO
~~3
NAKED MINI LSI/ALPHA LSI
PROGRAMMING REFERENCE MANUAL
~
COMPUTER AUTOMATION, INC.
the NAKED MINI company
18651 Von Korman. Irvine, Calif. 926611
lel.71l1-833-8830 TWX 9JO.59S.I767
COPYRIGHT 1973. COMPUTER AUTOMATION. INC.

Section
~
1.1
1.1.1
1.1.2
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
1.5
1.5.1
1.5.1.1
1.5.1.2
1.5.1.3
1.5.1.4
1.5.1.5
1.5.2
1.5.2.1
1.5.2.2
1.5.2.3
1.5.2.4
1.5.3
1.5.3.1
1.5.3.2
1.5.3.3
COMPUTER AUTOMATION, INC. ~
TABLE OF CONTENTS
Page
Section 1. GENERAL DESCRIPTION
INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
Upward Compatibility .........................•..•..• 1-1
General Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
THE NAKED MINI 16 LSI CONCEPT. ... . ..... ... ...... ...... 1-1
THE ALPHA 16 LSI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
Processor............................................ 1-2
Instruction Set .... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1- 2
Memory Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
I/O Structure......................................... 1-5
Processor Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
Plug-In Options .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
Peripheral Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
DATA HANDLING CHARACTERISTICS. ..... ................. 1-7
Data Word Format..................................... 1-7
Bit Identification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
Bit Values '0' • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • 1-8
Signed Numbers. . . . . . . • . . . ... . . . . . . . . . . . . . . . . . . . . . 1-8
Positive Numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1- 8
Negative Numbers.................... ............ 1-8
Data Byte Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1- 9
Byte Mode Processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
Register Load. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
Arithmetic Operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 .... 10
Data Packing .......................... t.. • • • • • • • • • 1-10
Memory Address Formats. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
Word Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
Byte Addressing. . . . . . . . . . . . . . . . . . . . . . . • . . . • . . . . . . 1-12
Indirect Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-13
iii

~
Section
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.5
3.1
3.1.1
3.1.2
3.1.3
3.1.3.1
3.1.3.2
3.1.3.3
3.1.3.4
3.1.4
3.1.5
3.2
3.2.1
3.2.1.1
3.2.1.2
3.2.1.3
COMPUTER AUTOMATION, INC. ~
TABLE OF CONTENTS (Cont'd)
Page
Section 2. CONSOLE
INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
SWITCHES AND INDICATORS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
MACHINE MODES. . . . . . . . . . . . . . . . . . . • . . . •. . • • . . . . . . . . . . . . . . 2- 6
Stop Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . •. . . •••• •• 2-6
Step Mode. . . . . . . . . . . . . . . . . . . . . . . . •. . . . . . . . . •. • . • . •. •. 2-7
Run Enable Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . •. . . . . . . 2-7
Run Mode............................................. 2-7
CONSOLE OPERATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Console Preparation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
Console Data Entry Procedure. . . . . . . . . . . . . . . . . . . . . . . . . . 2- 8
Console Display Procedure. , . . . . . . ••. . . . . . . •. . . . . . . . . . . 2- 9
Program Execution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
UNATTENDED OPERATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
Section 3. INSTRUCTIONS AND DIRECTIVES
INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Instruction and Directive Classes. . . . . . . . . . . . . . . . . . •. . . . 3-1
Symbolic Notation ...... , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Assembler Source Statement Fields. . . . . . . . . . . . . . . . . . . . . 3-2
Label Field. . . . . . . . • •••. •. . •. •. •. . . . . . . . . . . . . . . . . . 3- 2
Op Code Field. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3- 2
Operand Field .......................... '. . •. . . . . . .. 3- 3
Comments Field. . . . . . . . . . . . . . . . . . . . . . . •. . . . . . . . . . . 3-4
Arithmetic Operations and Overflow. . . . . . . . . . . . . . . . . . . . 3-4
Relocatability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3- 5
MEMORY REFERENCE INSTRUCTIONS. . . . . . . . . . . . . . . . . . . . . .. 3-6
Word Mode Operations and Instruction Format. . . . . . . . . . . 3- 6
Word Mode Direct Addressing. . . . . . . . . . . . . . . . . . . . . . 3-6
Word Mode Indirect Addressing. . . . . . . . . . . . . . . . . . . . 3-7
Word Mode Direct Indexed Addressing. . . . . . . . . . . . . . 3-7
iv

Section
3.2.1.4
3.2.1.5
3.2.2
3.2.2.1
3.2.2.2
3.2.2.3
3.2.2.4
3.2.2.5
3.2.3
3.2.4
3.2.5
3.2.6
3.3
3.3.1
3.3.2
3.4
3.4.1
3.4.2
3.5
3.5.1
3.5.2
3.5.3
3.5.4
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
3.6.6
3.7
3.7.1
3.7.2
3.7.3
COMPUTER AUTOMATION,INC. ~.
TABLE OF CONTENTS (Cont'd)
Section 3. INSTRUCTIONS AND DIRECTIVES (Cont'd)
Word Mode Indirect Post-Indexed Addressing ....•...
Word Mode Summary ..........•.....•..............
Byte Mode Operations and Instruction Format ........... .
Byte Mode Direct Addressing ...•...................
Byte Mode Indirect Addressing .......•..•....•.....
Byte Mode Direct Indexed Addressing .............. .
Byte Mode Indirect Post-Indexed Addressing ....... .
Byte Mode Summary ............................... .
Arithmetic Memory Reference Instructions .............. .
Logical Memory Reference Instructions ......•...........
Data Transfer Memory Reference Instructions ........... .
Program Transfer Memory Reference Instructions ••••••.•
DOUBLE-WORD MEMORY REFERENCE INSTRUCTIONS .....••.
Format .............................................. .
Instructions .......................................... .
IMMEDIATE INSTRUCTIONS .....•.....•........•.......•...
Format ............................................... .
Instructions .......................................... .
CONDITIONAL JUMP INSTRUCTIONS ....................•...
Format ............................................... .
Microcoding. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Arithmetic Conditional Jump Instructions .............•..
Control Conditional Jump Instructions .................. .
SHIFT INSTRUCTIONS .................••....... ' ........... .
Operand Restrictions and Instruction Format .......•.•...
Arithmetic Shift Instructions ......•.•.........•.........
Logical Shift Instructions .........•.•••..•.•..•.•..••...
Rotate S hilt Instructions ............................... .
Double Register (Long) Rotate Shift Instructions ....•....
Double Register (Long) Shift Instructions •...............
REGISTER CHANGE INSTRUCTIONS ........... It ••••••••••••
Format ............................................... .
A Register Change Instructions ........................ .
X
Register Change Instructions ...............•.........
v
Page
3-7
3-8
3-8
3-9
3-9
3-10
3-10
3-10
3-10
3-11
3-12
3-12
3-14
3-14
3-14
3-17
3-17
3-17
3-18
3-18
3-18
3-20
3-20
3-21
3-21
3-21
3-22
3-23
3-24
3-24
3-25
3-25
3-25
3-26

Section
3.7.4
3.7.5
3.7.6
3.8
3.8.1
3.8.2
3.8.3
3.8.4
3.8.5
v3.9
3.9.1
3.9.1.1
3.9.1.2
3.9.2
3.9.2.1
3.9.2.2
3.9.3
3.9.3.1
3.9.3.2
3.9.4
L
L-
3.9.5
3.10
3.10.1
3.10.2
3.11
3.11.1
3.11.2
3.12
3.12.1
3.12.2
3.13
3.14
3.15
COMPUTER AUTOMATION,INC. ~
TABLE OF .CONTENTS, (Cont'd)
Page
OV Register Change Instructions. . . . . . . . . . . . . . . . . . . . . . . 3- 26
Multi-Register Change Instructions ....... 0 ••• 0 •• 0 • • • • • • 3-26
Console Register Instructions. . . . . . . . . . . . • . . . . • . . . . . . . . 3-28
CONTROL INSTRUCTIONS ...... 0 ••••••••••••••••••• 0 0 • • • • • • 3-28
Format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 3- 28
Processor Control Instructions. . . . . . . . . . • . . . . . . . . . . . . . .. 3-r29
Mode Control Instructions 0 0 0 ••• 0 •• 0 0 • 0 •••• 0 ••• 0 •••• 0 ••••. 3" 29
Status Control Instructions. . . . . . . . . . . . . . . . •. . . . . . . . . . . . 3-29
Interrupt Control Instruction ........... 0 •••••• 0 • • • • • • • • 3- 30
INPUT /OUTPUT INSTRUCTIONS ....................... 0 ... 0 3-31
Control Input/Output Instructions. 0 •••••••••••• 0 0 •••• 0 0 3- 32
Sense Instructions 0 0 ••••• 0 •••••• 0 ••••••••• 0 •• 0 •• 0 • 3- 32
Select Instructions .. 0 • 0 • 0 •• 0 ••••••••• 0 ••••• 0 • 0 • • • • 3-32
Word Input/Output Instructions ................... 0 • • • • 3-33
Unconditional Word Input/Output Instructions. 0 •• 0 • 0 3-33
Conditional Word Input/Output Instructions. . . . . . . . . 3- 34
Byte Input Instructions. 0 •••••• 0 0 0 • 0 • • • • • • • • • • • • • • • • • • • 3- 35
Unconditional Byte Input Instructions. . . . •. . . . . . . . . . 3-35
Conditional Byte Input Instructions 0 ••••••••••••• 0 • • 3-35'
Block Input/Output Instructions ........ 0 • • • • • • • • • • • • • • • 3-36
Automatic Input/Output Instructions .............. 0 • • • • • 3-38
ASSEMBLER CONTROL DIRECTIVES. . . . . . . . . . . . . . . . . . . . . . . . 3-41
Conditional Assembly Controls. . . . . . . . . . . . . . . . . . . . . . . . . 3- 41
Program Location Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3- 42
DATA AND SYMBOL DEFINITION DIRECTIVES. . . . . . . . . . . . . . . 3-43
Formats .................................... ' . . . . . . . . . . 3- 43
Directives. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-43
PROGRAM LINKAGE DIRECTIVES. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-44
Formats. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-44
Directives. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-45
SUBROUTINE DEFINITION DIRECTIVES. . . . . . . . . . . . . . . . . . . . . 3-45
LISTING FORMAT AND ASSEMBLER INPUT CONTROLS. . . . . . . 3-46
USER-DEFINED OPERATION CODE DIRECTIVE.... ... ... ... .. 3-47
vi

Section
4.1
4.1.1
4.1.1.1
4.1.1.2
4.1.1.3
4.1.2
4.1.2.1
4.1.2.2
4.1.2.3
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.3
4.3.1
4.3.2
4.3.3
4.4
4.4.1
4.4.2
5.1
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.2
5.2.1
5.2.2
COMPUTER AUTOMATION. INC. ~
TABLE OF CONTENTS (Cont'd)
t/ Section 4. INPUT/OUTPUT AND INTERRUPT OPERATION
INTRODUCTION
.......................................... .
Discussion of Input/Output Operations ...•.......•......
Control .......................................... .
Sense ........................................... .
Data Transmission .......•.••..••••••.••.•••••.••••
Interrupt Operations ..........•........................
Non-Input/Output ................................ .
Input/Output ..................................... .
Word and Block Interrupts .......................•.
NON-INTERRUPT INPUT /OUTPUT EXAMPLES ............... .
Control Instructions ........•...........•...........•..
Unconditional Instructions ............................ .
Conditional Instructions ...................•...........
Block Transfer Instructions ........................... .
Automatic Transfer Instructions ...•....................
Page
4-1
4-1
4-1
4-2
4-2
4-5
4-5
4-6
4-6
4-6
4-9
4-9
4-10
4-10
4-11
INTERRUPT STRUCTURE EXAMPLES. . . . . . . . . . . . . . . . . . . . . • . . 4-11
General Interrupt Handling. . . . . . . . . . . . . • . . . . . . . . . . . . . .. 4-11
Examples of Initialization and Enabling Sequences. . . . . . .. 4-12
Examples of Interrupt Instructions. . . . . . . . . . . . . . . . . . . . . . 4-13
INTERRUPT LATENCY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Interrupt Service. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Priority Resolution. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Section 5. PROCESSOR OPTIONS
TELETYPE. . . . . . . . . . . . . . . . . •. . . . . . . . . . . . . . . . • . . . . . . . . . . . . . 5-1
General Discussion .......... '. . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
Half- Duplex Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
Table of Half-Duplex Teletype Instructions. • . . . . . . . . . . . . 5-3
Full- Duplex Usage. • . • • •• • • • • . • • • •• • • • •• • •• • • • •• • • • • •. 5- 6
Table of Full-Duplex Teletype Instructions. . . . .. . . . . . . . 5-8
REAL-TIME CLOCK. . . . . . . . . . . • . . • . . •• •. . . . . . . . • . . . . . . . . . . . 5-11
Discussion of Usage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
Summary Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
vii

COMPUTER AUTOMATION,INC. ~
TABLE OF CONTENTS (Cont'd)
Section
Page
5.3 AUTOLOAD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-13
5.4 POWER FAIL/RESTART. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-14
5.4.1 General.............................................. 5-14
5.4.2 Power Fail........................................... 5-14
5.4.3 Restart.............................................. 5-14
5.4.4 Interrupt Control Option. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-15
5. 4. 5 Programming Examples. . . . . . . . . . . • . . . . . . . . . . . . . . . . . . . 5-15
Appendix A. HEXADECIMAL TABLES
Appendix B. RECOMMENDED DEVICE AND INTERRUPT ADDRESSES
F .1
F .2
F.3
F .3.1
F .3.2
F.3.3
F.3.4
F.3.5
F.3.S
F.3.7
F.3.8
F.3.9
F.3.10
F. 3.11
Appendix C. INSTRUCTION SET IN ALPHABETICAL ORDER
Appendix D. INSTRUCTION SET IN NUMBERICAL ORDER
Appendix E. ALPHA LSI EXECUTION TIMES
Appendix F. SOFTWARE SUMMARY
INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . .
F-l
BOOTSTRAP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . . . F-2
SOFTWARE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . • . . . . . . . . . . . •. . . F-2
Autoload. . . . . . . . . . . . . . . . . . •. . . . . . . . . . . . . . . . . . . . . . . . . . F- 2
Binary Load (BLD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-3
Binary Dump IV erify (BDP lVER) . . . . . . . • . . . . . . . . . . . . . . F- 3
Object Load ......................................... F-4
BETA-4Assembler... ........ ............ ............ F-4
BETA- 8 Assembler. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F- 4
OMEGA Conversational Assembler. . . . . . . . . . . . . . . . . . . . . F-5
Source Tape Preparation Program. . . . . . . . . . . . . . . • . •. . . F-S
Debug (DBG). . . . . . . . . . . . . . . . . . . • . • . . . . . . . . . . . . . . . . . . . F-7
Concordance (CONe)....... . . . . . . . . . . . . . . . . . . . . . . . . . . F-8
OS Command Summary. . . . . . . . •. . . . . . . . . . . . . . . . . . . . . . . F-8
viii

Figure
1-1
1-2
1-3
1-4
1-5
1-6
1-7
2-1
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
3-14
3-15
3-16
3-17
3-18
3-19
3-20
3-21
3-22
3-23
3-24
3-25
3-26
3-27
3-28
3-29
3-30
3-31
3-32
3-33
3-34
COMPUTER AUTOMATION,INC. ~
LIST OF ILLUSTRATIONS
Data Word Bit Identification .................................. .
Byte Storage, Two Bytes Per Word ........................... .
Data in Memory, One Byte Per Word .......................... .
Data in Memory, Two Bytes Per Word ......................... .
Basic Word Address Format .................................. .
Byte Address Format ........................................ .
Indirect Address Pointer Format ............................. .
ALPHA 16
LSI Console ........................ " ............... .
Instruction and Directive Classes ............................ .
Source Statement Format .................................... .
Arithmetic Overflow ........................................ .
Word Mode Memory Reference Instruction Format ............. .
Word Mode Addressing Summary ............................ .
Byte Mode Memory Reference Instruction Format .............. .
Byte Mode Addressing Summary ............................. .
Double Word Memory Reference Format. ...................... .
Divide ..................................................... .
Multiply and Add ........................................... .
NRM Shift Path ............................................. .
Immediate Instruction Format ................................ .
JOC Jump On Condition Format .............................. .
JOC Microcode Bit Functions ................................ .
Conditional Jump Format .................................... .
Single Register Shift Format. ................................ .
Double Register (Long) Shift Format. ........................ .
Arithmetic Right Shift ....................................... .
Arithmetic Left Shift ......................................... .
Logical Right Shift .......................................... .
Logical Left Shift ............................................ .
Rotate Right ................................................ .
Rotate Left .................................................... .
Long Left Shift .............................................. .
Long Right Shift ............................................ .
Long Rotate Right ........................................... .
Long Rotate Left ............................................. .
Register Change Format ...................................... .
Control Format .............................................. .
Computer Status Word Format ................................. .
Single Word Input/Output Instruction Format ................... .
Block Input/Output Instruction Format ......................... .
Automatic Input/Output Instruction Format ..................... .
In-line Auto I/O Instruction Sequence .......................... .
ix
Page
1-9
1-9
1-11
1-12
1-13
1-13
1-13
2-3
3-1
3-2
3-5
3-6
3-8
3-9
3-11
3-14
3-15
3-16
3-16
3-17
3-18
3-19
3-19
3-21
3-21
3-21
3-21
3-22
3-22
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Figure
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4-1
4-2
4-3
4-4
4-5
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5-1
5-2
5-3
5-4
C.l
C.2
C.3
C.4
C.5
C.6
C.7
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D.l
D.2
D.3
D.4
D.5
D.6
D.7
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D.lO
D.11
COMPUTER AUTOMATION,INC. ~
LIST OF ILLUSTRATIONS (Cont'd)
Interrupt Location Auto I/O Instruction Sequence .............. .
Begin Conditional Assembly Directives Format ................. .
End Conditional Assembly Directive Format .................... .
Location
Control Directive Format ............................. .
Data
and Symbol Definition Directive Format ................... .
Program Linkage Directive Formats ........................... .
Subroutine Definition Directive Formats ....................... .
Title Directive Format ....................................... .
Initialization and Unconditional Output to Line Printer .......... .
Unconditional Character Read from Teletype Paper Tape Reader ..
Initialization and Conditional Control of Line Printer ............ .
Conditional
Input from Teletype Keyboard with Auto-Echo ....... .
Uninterruptable Block Output to Line Printer ................... .
Automatic Byte
Input from Card Reader ........................ .
Line
Printer Interrupt Initialization Sequence .................. .
Real-Time Clock
Interrupt Initialization Sequence .............. .
Line
Printer Interrupt Instructions ............ ; ............... .
Real-Time Clock
Interrupt Instructions ........................ .
Standard Interrupt Priorities .................................. .
Program-Controlled Data Output to Half-Duplex Teletype ........ .
Program-Controlled Data Input from TTY Paper Tape Reader .... .
Program-Controlled Data Input from Full-Duplex Teletype ....... .
Automatic
Interrupt Data Input from Full-Duplex Teletype ....... .
Class 1 - Single-Word Memory Reference Instruction Format ..... .
Class 2 - Double.i:Word Memory Reference Instruction Format ..... .
Class 3 - Byte Immediate Instruction Format .................... .
Class 4 - Conditional Jump Instruction Format .................. .
Class 5 - Register Shift Instruction Format ..................... .
Class 6 - Nonvariable Instruction Format ....................... .
Class 7 - Input/Output Instruction Format ...................... .
Class 8 - JOC Jump-On-Condition Instruction Format ............ .
Single-Word Memory Reference Instruction Machine Code Format..
Double-Word Memory Reference Instruction Machine Code Format ..
Byte Immediate Instruction Machine Code Format ................ .
Conditional
Jump Instruction Machine Code Format .............. .
Single-Register Shift Instruction Machine Code Format .......... .
Double- Register Shift Instruction Machine Code Format .......... .
Register Change Instruction Machine Code Format .............. .
Control Instruction Machine Code Format ....................... .
Input/Output Instruction Machine Code Format .................. .
Automatic
Input/Output Instruction Machine Code Format ........ .
Block
Input/Output Instruction Machine Code Format ............ .
x
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C-1
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C-1
C-2
C-2
C-2
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D-1
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D-3
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D-4

COMPUTER AUTOMATION, INC. f3!:1
LIST OF TABLES
Table
Page
2-1 Console Switches and Indicators. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
A-1 Hexadecimal-Decimal Conversions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-2
A-2 ASCII Teletype Codes ............. I I I I I I I I • I ••• I I • I I I I I I I II I I I I A-3
B-1 Recommended Device Addresses ... I •• I •••••• I • I •••••• I •••••• I • I B-2
B-2 Scratchpad/Page 0 Recommended Interrupt Address Map I I ••• I • I I B-3
E-1 Standard Core Memory Algorithm Variables .... I ••••••••••••••••• E-1
E-2 Execution Time Algorithms ................ I • I I I • I I I • I •• I • I I • • •• E-2
F-1 Assembler Directives ............ I •••••••••• I •• I ••••• I •••• I • • • • F-1
xi