Connect Tech Xtreme I/O Express ADC-DAC User manual

Connect Tech Xtreme I/O Express ADC-DAC User Manual
Xtreme I/O Express ADC-DAC
Connect Tech Inc. Tel: [phone]
42 Arrow Road Toll: 800-426-8979 (North America only)
Guelph, Ontario Fax: [phone]
N1K 1S6 Email: [e-mail]
www.connecttech.com [e-mail]
CTIM-00435 Revision 0.08 2016-11-18

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Preface
Disclaimer
The information contained within this user’s guide, including but not limited to any product
specification, is subject to change without notice.
Connect Tech assumes no liability for any damages incurred directly or indirectly from any technical
or typographical errors or omissions contained herein or for discrepancies between the product and the
user’s guide.
Customer Support Overview
If you experience difficulties after reading the manual and/or using the product, contact the Connect
Tech reseller from which you purchased the product. In most cases the reseller can help you with
product installation and difficulties.
In the event that the reseller is unable to resolve your problem, our highly qualified support staff can
assist you. Our support section is available 24 hours a day, 7 days a week on our website at:
www.connecttech.com/sub/support/support.asp.See the contact information section below for
more information on how to contact us directly. Our technical support is always free.
Contact Information
Mail/Courier
Connect Tech Inc.
Technical Support
42 Arrow Road
Guelph, Ontario
Canada N1K 1S6
Email/Internet
[email protected]
[e-mail]
www.connecttech.com
Note:
Please go to the Download Zone or the Knowledge Database in the Support Center on the
Connect Tech website for product manuals, installation guides, device driver software and technical
tips.
Submit your technical support questions to our customer support engineers via the Support Center
on the Connect Tech website.
Telephone/Facsimile
Technical Support representatives are ready to answer your call Monday through Friday, from 8:30
a.m. to 5:00 p.m. Eastern Standard Time. Our numbers for calls are:
Toll Free: 800-426-8979 (North America only)
Telephone: [phone] (Live assistance available 8:30 a.m. to 5:00 p.m. EST,
Monday to Friday)
Facsimile: 519-836-4878 (on-line 24 hours)

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Limited Product Warranty
Connect Tech Inc. provides a 2 year Warranty for this product. Should this product, in Connect Tech
Inc.'s opinion, fail to be in good working order during the warranty period, Connect Tech Inc. will, at
its option, repair or replace this product at no charge, provided that the product has not been subjected
to abuse, misuse, accident, disaster or non-Connect Tech Inc. authorized modification or repair.
You may obtain warranty service by delivering this product to an authorized Connect Tech Inc.
business partner or to Connect Tech Inc. along with proof of purchase. Product returned to Connect
Tech Inc. must be pre-authorized by Connect Tech Inc. with an RMA (Return Material Authorization)
number marked on the outside of the package and sent prepaid, insured and packaged for safe
shipment. Connect Tech Inc. will return this product by prepaid ground shipment service.
The Connect Tech Inc. Limited Warranty is only valid over the serviceable life of the product. This is
defined as the period during which all components are available. Should the product prove to be
irreparable, Connect Tech Inc. reserves the right to substitute an equivalent product if available or to
retract the Warranty if no replacement is available.
The above warranty is the only warranty authorized by Connect Tech Inc. Under no circumstances
will Connect Tech Inc. be liable in any way for any damages, including any lost profits, lost savings
or other incidental or consequential damages arising out of the use of, or inability to use, such product.

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Copyright Notice
The information contained in this document is subject to change without notice. Connect Tech Inc.
shall not be liable for errors contained herein or for incidental consequential damages in connection
with the furnishing, performance, or use of this material. This document contains proprietary
information that is protected by copyright. All rights are reserved. No part of this document may be
photocopied, reproduced, or translated to another language without the prior written consent of
Connect Tech, Inc.
Copyright

2016 by Connect Tech, Inc.
Trademark Acknowledgment
Connect Tech, Inc. acknowledges all trademarks, registered trademarks and/or copyrights referred to
in this document as the property of their respective owners. Not listing all possible trademarks or
copyright acknowledgments does not constitute a lack of acknowledgment to the rightful owners of
the trademarks and copyrights mentioned in this document.
ESD Warning
Electronic components and circuits are sensitive to
ElectroStatic Discharge (ESD). When handling any
circuit board assemblies including Connect Tech
COM Express carrier assemblies, it is recommended
that ESD safety precautions be observed. ESD safe
best practices include, but are not limited to:
Leaving circuit boards in their antistatic
packaging until they are ready to be installed.
Using a grounded wrist strap when handling
circuit boards, at a minimum you should touch a
grounded metal object to dissipate any static
charge that may be present on you.
Only handling circuit boards in ESD safe areas,
which may include ESD floor and table mats,
wrist strap stations and ESD safe lab coats.
Avoiding handling circuit boards in carpeted
areas.
Try to handle the board by the edges, avoiding
contact with components.

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Revision History
Revision
Date
Change(s)
0.01
2015-10-02
Initial Manual Revision Created
0.02
2015-02-19
Updated with Core Content
0.03
2015-05-14
Updated to reflect new firmware revision
0.04
2015-05-19
Finished Signal Gen Section
0.05
2015-05-25
Finished PWM Section
0.06
2016-06-22
Updated photos and warranty policy
0.07
2016-07-18
Updated overall manual format and organization
Revised information on PWM controller, interrupt
controller, common board features
Add C code examples, and header file
0.08
2016-11-18
Minor updates

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Table of Contents
Preface................................................................................................................................................. 2
Disclaimer......................................................................................................................................................2
Customer Support Overview.......................................................................................................................2
Contact Information......................................................................................................................................2
Limited Product Warranty............................................................................................................................3
Copyright Notice ...........................................................................................................................................4
Trademark Acknowledgment......................................................................................................................4
ESD Warning.................................................................................................................................................4
Revision History ................................................................................................................................. 5
Table of Contents............................................................................................................................... 6
Introduction......................................................................................................................................... 8
Product Features & Specifications.............................................................................................................8
Part Numbers / Ordering Information ........................................................................................................8
Product Overview............................................................................................................................. 10
Block Diagram.............................................................................................................................................10
Connector Summary & Locations ............................................................................................................11
Jumper Summary & Locations .................................................................................................................11
Detailed Feature Description........................................................................................................... 12
General Board Operation..........................................................................................................................12
Analog Inputs (ADC’s) ...............................................................................................................................13
Overview ...........................................................................................................................................13
Connectors & Jumpers ...................................................................................................................13
Operation ..........................................................................................................................................14
Memory Map.....................................................................................................................................15
Register Details................................................................................................................................16
CONTROL_CONFIG (ADC# Offset 0x0000 : Read/Write)....................................................................... 16
INPUT_RANGE_SELECT (ADC# Offset 0x0010 : Read/Write) .............................................................. 16
CHx_LAST_SAMPLE (Offset 0x0014 : Read Only)................................................................................... 16
MEM_WRITE_CONTROL (ADC# Offset 0x0024 : Read/Write(Partial).................................................. 18
Application Examples......................................................................................................................18
Example A –ADC Operation with same input range................................................................................. 18
Example B –ADC Operation with different input range............................................................................ 19
Analog Outputs (DAC’s) ............................................................................................................................20
Overview ...........................................................................................................................................20
Connectors & Jumpers ...................................................................................................................20
Operation ..........................................................................................................................................20
Direct Write Mode ........................................................................................................................................... 20
Signal Gen Mode ............................................................................................................................................ 20
PWM Mode...................................................................................................................................................... 21
Transfer Functions.......................................................................................................................................... 22
Memory Map.....................................................................................................................................24
Register Details................................................................................................................................24
DCONTROL_CONFIG (Offset 0x0000 : Read/Write)................................................................................ 24
CH0_DATA / CH1_DATA (Offset 0x0004 : Read/Write)........................................................................... 24
CH2_DATA / CH3_DATA (Offset 0x0008 : Read/Write)........................................................................... 25
CH0_ZERO / CH0_GAIN (Offset 0x000C : Read/Write)........................................................................... 25

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CH1_ZERO / CH1_GAIN (Offset 0x0010 : Read/Write)............................................................................ 25
CH2_ZERO / CH2_GAIN (Offset 0x0014 : Read/Write)............................................................................ 26
CH3_ZERO / CH3_GAIN (Offset 0x0018 : Read/Write)............................................................................ 26
IO_PINS_CONTROL (Offset 0x001C : Read/Write).................................................................................. 26
CMD_PASSTHRU (Offset 0x0020 : Read/Write)....................................................................................... 26
TRG_SIGGEN_PWM (Offset 0x0024 : Read/Write).................................................................................. 28
SIG_GEN_RD_CTRL (Offset 0x0028 : Read/Write).................................................................................. 28
PWM_LOW_COUNT / PWM_HIGH_COUNT (Offset 0x002C : Read/Write)........................................ 28
PWM CONTROL/FREQ (Offset 0x0030 : Read/Write).............................................................................. 28
PWM_HIGH_VAL / PWM_LOW_VAL (Offset 0x0034 : Read/Write)..................................................... 29
Application Examples......................................................................................................................30
Example A: Simple DAC outputs.................................................................................................................. 30
Example B: PWM Setup................................................................................................................................. 30
Example C: Sine wave generation ............................................................................................................... 32
GPIO (Digital I/O) .......................................................................................................................................34
Overview ...........................................................................................................................................34
Connectors & Jumpers ...................................................................................................................34
Operation ..........................................................................................................................................35
Memory Map.....................................................................................................................................35
Register Details................................................................................................................................35
GPIO_INPUT (Offset 0x0000 : Read Only)................................................................................................. 35
GPIO_OUTPUT (Offset 0x0004 : Read/Write)........................................................................................... 36
GPIO_CMD (Offset 0x0008 : Read/Write)................................................................................................... 36
Application Examples......................................................................................................................36
Example A –Walking 1’s and 0’s ................................................................................................................. 36
Flash Controller...........................................................................................................................................38
Overview ...........................................................................................................................................38
Operation ..........................................................................................................................................38
Memory Map.....................................................................................................................................38
Register Details................................................................................................................................38
Common Features......................................................................................................................................39
Memory Map.....................................................................................................................................39
Register Details................................................................................................................................39
IRQ_ STATUS (COMMON_BASE+0x0C : Read/Write)........................................................................... 39
SCRATCHPAD_REG_1 (COMMON_BASE +0x18 : Read/Write)........................................................... 39
SCRATCHPAD_REG_2 (COMMON_BASE +0x1C : Read/Write).......................................................... 39
IRQ_MSTR_STATUS (IRQ_BASE +0x40 : Read Only).......................................................................... 40
IRQ_MSTR_ENABLE (IRQ_BASE +0x50 : Read/Write Only)................................................................ 41
RELEASE (ID_BASE +0x0 : Read Only).................................................................................................... 41
TIMESTAMP (ID_BASE +0x4 : Read Only)................................................................................................ 41
Application Examples......................................................................................................................41
Example A –writing/reading from scratch pad........................................................................................... 41
Example B –reading ID registers................................................................................................................. 42
PCIE-104 Interface.....................................................................................................................................43
Typical Installation ........................................................................................................................... 45
Appendix –A Header File................................................................................................................ 46

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Introduction
Connect Tech’s Xtreme I/O Express ADC-DAC is an analog and digital peripheral board for the PCI-
104 small form factor embedded marketplace. This product is ideal for data acquisition, measurement
and control applications.
Product Features & Specifications
Specification
Details
Form Factor
PCIe/104 or PCI/104-Express
Analog Inputs
Channels: 32 Single Ended
Resolution:16-bit
Sampling Rate: 500ksps
Protection: ±20V
Input Ranges:
Bipolar: ±10.24V, ±5.12V and ±2.56V
Unipolar: 0 - 10.24V and 0 - 5.12V
Accuracy: ±2.5 LSB INL, ±1.5 LSB DNL
Signal-to-Noise Ratio: 91 dB @ ±10.24V
Analog Outputs
Channels: 4
Resolution: 16-bit
Output Ranges: Six Programmable Output Ranges
Unipolar: 0V to 5V, 0V to 10V
Bipolar: ±5V, ±10V, ±2.5V, –2.5V to 7.5V
Accuracy: 1LSB INL and DNL
Settling Time: 6µs
Outputs Drive: ±3mA
Digital I/O
Channels: 16-bit bidirectional I/O
Input/Output Ranges: Hardware selectable +3.3V or +5V(TTL/CMOS)
Output Drive: High Current 24mA
Controller
FPGA Register Controlled Device (No jumpers needed)
Custom logic available upon request
Operating
Temperature
-40 to +85 Degrees Celsius
Dimensions
3.775” x 3.550” (PC/104 Compliant)
Host Interface Bus
PCI Express Gen 1.0/2.0 bus compliant (PCIe/104)
(PCI-104) connector can be optionally installed as a pass-through connector
Power Details
+5VDC only operation (all on-board voltages are made from the +5V rail)
Current Consumption (800mA peak, 500mA typical)
Software
Compatibility
Custom CTI Device Drivers for QNX, Linux, Windows
Device can also be controlled directly from a memory mapped register set in
any operating system
Warranty and Support
Limited Two-Year Warranty
Free Technical Support
Part Numbers / Ordering Information
Part Number
Description
DAG103
Analog Inputs : 16-bit 32 SE

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Analog Outputs : 16-bit 4 Channels
GPIO : 16-bits
DAG104
Analog Inputs : 16-bit 32 SE
Analog Outputs : none
GPIO : 16-bits
DAG106
Analog Inputs : 16-bit 32 SE
Analog Outputs : 16-bit 4 Channels
GPIO : 16-bits
Humiseal 1B31 Conformal Coating
To order any of these part numbers or to inquire about the other available ordering options please
contact [e-mail] for further information.

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Product Overview
The Xtreme I/O Express ADC-DAC is based on a custom FPGA controller, SPI ADCs and DAC’s. The
following block diagram shows the connection between the interfaces. Each SPI bus is independent, and
managed by separate control block. Connection to analog signals are provided by two standard
connectors.
Block Diagram

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Connector Summary & Locations
Designator
Description
P1
JTAG Programming
P2/P5
PCIe/104 Connector
P3
General Purpose Inputs and Outputs
P4
Analog Inputs
P5
JTAG programming
P7
Analog Outputs
P8
PCI-104 Connector
Jumper Summary & Locations
Designator
Description
J2
General Purpose Input and Output Voltage Level

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Detailed Feature Description
General Board Operation
All board features are controlled through a simple memory mapped register based interface. Each
analog to digital controller block (ADC) is controlled from a separate base address location; however
the registers within those blocks have identical functionality. There are separate memory/registers
blocks for each ADC controller, DAC controller, GPIO controller, interrupt controller, on board flash
programming controller, and board identification.
Offset
Identifier
Description
0x0000
COMMON_BASE
General Board control
0x1000
ADC0
Analog to Digital Controller 0
0x4000
ADC1
Analog to Digital Controller 1
0x7000
ADC2
Analog to Digital Controller 2
0xA000
ADC3
Analog to Digital Controller 3
0xD000
DAC
Digital to Analog Controller
0x10000
GPIO_BASE
GPIO controller
0x20000
IRQ_BASE
Board level Interrupt Controller
0x24000
FLASH_BASE
Flash Controller
0x24210
ID_BASE
Board Identification
The following sections describe the operation of each controller, list the pinouts of associated
connectors and jumpers, provide memory map, list of registers, and software examples using Connect
Tech’s UFD (universal FPGA Driver).

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Analog Inputs (ADC’s)
Overview
The Xtreme I/O Express ADC-DAC uses four Texas Instruments ADS8688, each having an 8-channel
multiplexer that allows for the sampling of 8 single ended analog signals. The SPI interface of each
ADS8688 is connected to the FPGA controller, while the analog side is connected to right angle
header connector.
The ADC IC datasheet can be found here: http://www.ti.com/lit/gpn/ads8688
Connectors & Jumpers
Function
Analog Inputs
Location
P4
Type
Samtec HTSW-120-08-L-D-RA
2x20, 0.100” pitch
Mate
Any 0.100” cable
Pinout
Pin
Description
Pin
Description
1
ADC0 CH-0
2
ADC0 CH-1
3
ADC0 CH-2
4
ADC0 CH-3
5
ADC0 CH-4
6
ADC0 CH-5
7
ADC0 CH-6
8
ADC0 CH-7
9
GND
10
GND
11
ADC1 CH-0
12
ADC1 CH-1
13
ADC1 CH-2
14
ADC1 CH-3
15
ADC1 CH-4
16
ADC1 CH-5
17
ADC1 CH-6
18
ADC1 CH-7
19
GND
20
GND
21
ADC2 CH-0
22
ADC2 CH-1
23
ADC2 CH-2
24
ADC2 CH-3
25
ADC2 CH-4
26
ADC2 CH-5
27
ADC2 CH-6
28
ADC2 CH-7
29
GND
30
GND
31
ADC3 CH-0
32
ADC3 CH-1
33
ADC3 CH-2
34
ADC3 CH-3
35
ADC3 CH-4
36
ADC3 CH-5
37
ADC3 CH-6
38
ADC3 CH-7
39
GND
40
GND

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Operation
The ADCs are controlled and have their data stored in four controller blocks. The mode of capture
can be set to either Continuous Sampling Mode or Waveform Capture Mode. The input range for
each of the 4 ADCs can be changed via the INPUT_RANGE_SELECT register.
Each ADC block can be set to capture up to 8 channels in a looping sequential order. For example, if
all eight channels were enabled in ADC0 (writing 0xFF to CONTROL_CONFIG) then the following
shows the process it would go through in obtaining the requested samples:
By default sample collection occurs at the maximum sampling rate of the ADC IC which is 500ksps,
so if, in continuing the previous example, all 8 channels were to be enabled then the actual sampling
rate per ADC Channel would be 500ksps/8=62.5ksps.
Continuous Sampling Mode
Each ADC channel’s code is captured and stored into their CHX-LAST_SAMPLE register. This
CHX-LAST_SAMPLE register is then constantly updated/overwritten with a latest/newest code
received.
Waveform Capture Mode (FIFO Mode)
This mode is supplementary to the Continuous Sampling Mode in that the ADC blocks will continue
to update their CHX-LAST_SAMPLE registers while also storing data in their associated sample
FIFOs.
An ADC block operating in this mode will signal that its FIFO memory is almost full via a PCIe
interrupt; the sample count at which this notification is made can be adjusted to any value within the
sample depth range supported by the sample FIFOs (2046). Each sample is stored in the FIFOs is
saved along with two additional bookkeeping data fields: the channel number and the sample number.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
11-bit "Timestamp"/Sample Num
R
Channel ID
16-bit CODE from ADC
For example to set up an ADC block to capture data in its sample FIFO and provide a notification
once it has stored 1023 of these values, one would write 0x3FF to the first ten bits of its
MEM_WRITE_CONTROL register and then set the MEM Store flag in its CONTROL_CONFIG
register.
Variable Sampling Rate
As already touched upon the default sampling rate of the ADC blocks is 500ksps or the maximum rate
supported by the ADC peripherals. If slower sampling rates are required, then each block can be
individually set to subdivide this maximum rate by way of a counter roll over value stored in the
CLK_DIV_CNTR register.
C
H
C
H
C
H
C
H
C
H
C
H
C
H

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Essentially, if sample rate division is enabled with bit number nine in the control register of an ADC
block then an internal counter is incremented to the value stored in CLK_DIV_CNTR and then reset,
continuously, at the maximum sampling rate. The actual subdividing of the sample rate then is, in this
sense, achieved by storing new values only when the counter is equal to zero.
Memory Map
The following register offsets are from each ADC# block offset. Example ADC1 +
CONTROL_CONFIG.
Offset
(Hex)
0x03
0x02
0x01
0x00
setup/config
0x0000
CONTROL_CONFIG
0x0004
STATUS
0x0008
CLK_DIV
0x000C
CLK_DIV_CNTR
0x0010
INPUT_RANGE_SELECT
last samples
0x0014
CH1-LAST_SAMPLE
CH0-LAST_SAMPLE
0x0018
CH3-LAST_SAMPLE
CH2-LAST_SAMPLE
0x001C
CH5-LAST_SAMPLE
CH4-LAST_SAMPLE
0x0020
CH7-LAST_SAMPLE
CH6-LAST_SAMPLE
M
0x0024
MEM_WRITE_CONTROL
mem block
0x1000
CHANNEL_ID/TIMESTAMP_0
MEM_SAMPLE_0
0x1004
CHANNEL_ID/TIMESTAMP_1
MEM_SAMPLE_1
0x1008
CHANNEL_ID/TIMESTAMP_2
MEM_SAMPLE_2
…
…
…
0x2FFC
CHANNEL_ID/TIMESTAMP_4k
MEM_SAMPLE_2k

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Register Details
CONTROL_CONFIG (ADC# Offset 0x0000 : Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved / Future Use
S
T
O
P
-
R
S
T
D
I
V
S
T
O
R
S
C
H
0
S
C
H
1
S
C
H
2
S
C
H
3
S
C
H
4
S
C
H
5
S
C
H
6
S
C
H
7
This register contains several control bits/flags
STOP 0=normal operation, 1=stop sampling
RST 0=normal operation, 1=reset ICs and regs
DIV 0=maximum rate, 1=divide
STOR 1=store samples in memory, 0=don't store
SCHx Enable Sample of CHANx (0..7)
INPUT_RANGE_SELECT (ADC# Offset 0x0010 : Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
CH7
Range
CH6
Range
CH5
Range
CH4
Range
CH3
Range
CH2
Range
CH1
Range
CH0
Range
This register contains all of the channel input range values which are described below.
CHx
Range [2:0]
Postive
Full Scale (V)
Negative
Full Scale (V)
Full-Scale
Range (V)
LSB (µV)
000
10.24
-10.24
20.48
312.5
001
5.12
-5.12
10.24
156.25
010
2.56
-2.56
5.12
78.125
101
10.24
0
10.24
156.25
110
5.12
0
5.12
78.125
CHx_LAST_SAMPLE (Offset 0x0014 : Read Only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CHx 16-bit CODE
This register contains the last sampled 16-bit code for the specific channel. Bit-15 is the MSB of the
CODE and Bit-0 is the LSB for the CODE.
All samples are in a binary format for both bipolar and unipolar input ranges. The full-scale range
(FSR) for each input signal is equal to the difference between the positive full-scale (PFS) input
voltage and the negative full-scale (NFS) input voltage. The LSB size is equal to FSR / 65536 because
the resolution of the ADC is 16 bits.

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Date: 2016-11-18
Code translation examples:
Code
CHx
Range[2:0]
FSR
Actual
Voltage
Graph
0x0000
000
20.48V
-10.24V
0x8000
000
20.48V
0.00V
0xffff
000
20.48V
10.24V
0x0000
001
10.24V
-5.12V
0x8000
001
10.24V
0.00V
0xffff
001
10.24V
5.12V
0x0000
110
5.12V
0.00V
0x8000
110
5.12V
2.56V
0xffff
110
5.12V
5.12V

Xtreme I/O Express ADC-DAC
Users Guide
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Document: CTIM-00435
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Date: 2016-11-18
MEM_WRITE_CONTROL (ADC# Offset 0x0024 : Read/Write(Partial)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved / Future Use
Current FIFO Write Count
Trigger IRQ at FIFO Count
This register contains the current FIFO capacity, and the interrupt trigger.
Current FIFO Write Count Shows the current position in the FIFO memory (Read Only)
Trigger IRQ at FIFO Count Sets the position in the FIFO memory at which the almost full IRQ is
triggered (value must be greater than zero to fire)
0x2046 is the maximum trigger level; in order to prevent counter rollover.
Application Examples
These application examples leverage the Connect Tech’s Universal FPGA Driver (UFD) and API
Example A –ADC Operation with same input range
In this example we will set the 2 ADC IC’s to enable sampling, and set the input range for each of the
ADCs to be +/-10.24V. Then we will read back all the channels.
printf("ADC0&1: enabling chan0-7 and setting input range\n");
control_config = 0xFF;
CTIFPGAWrWord(pbrd, BarIndex, ADC0+CONTROL_CONFIG, control_config);
CTIFPGAWrWord(pbrd, BarIndex, ADC1+CONTROL_CONFIG, control_config);
input_range = 0x0;
CTIFPGAWrDword(pbrd, BarIndex, ADC0+INPUT_RANGE_SELECT, input_range);
CTIFPGAWrDword(pbrd, BarIndex, ADC1+INPUT_RANGE_SELECT, input_range);
printf("\nReading ADC Voltages...\n");
for(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC0+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC0votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC0 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i,
ADC0+CH0_LAST_SAMPLE+(i*2),testreg, ADC0votlage);
}
for(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC1+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC1votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC1 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i,
ADC1+CH0_LAST_SAMPLE+(i*2),testreg, ADC1votlage);
}

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Date: 2016-11-18
Example B –ADC Operation with different input range
In this example we will set:
-ADC0 to take a readings from CH0 with an input voltage range of +/-10.24V
-ADC1 to take a readings from CH0 with an input voltage range of +10.24V
printf("ADC0&1: enabling chan0 and setting input range\n");
control_config = 0x80;
CTIFPGAWrWord(pbrd, BarIndex, ADC0+CONTROL_CONFIG, control_config);
CTIFPGAWrWord(pbrd, BarIndex, ADC1+CONTROL_CONFIG, control_config);
input_range = 0x0;
CTIFPGAWrDword(pbrd, BarIndex, ADC0+INPUT_RANGE_SELECT, input_range);
input_range = 0x0;
for(ch=0;ch<8;ch++)
{
input_range|= (0x5 << (3*ch));
}
CTIFPGAWrDword(pbrd, BarIndex, ADC1+INPUT_RANGE_SELECT, input_range);
printf("\nReading ADC Voltages...\n");
i=0;
CTIFPGARdWord(pbrd, BarIndex, ADC0+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC0votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC0 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i,
ADC0+CH0_LAST_SAMPLE+(i*2),testreg, ADC0votlage);
i=0;
CTIFPGARdWord(pbrd, BarIndex, ADC1+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC1votlage = testreg * (20.48/0x10000);
printf("ADC1 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i,
ADC1+CH0_LAST_SAMPLE+(i*2),testreg, ADC1votlage);

Xtreme I/O Express ADC-DAC
Users Guide
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Document: CTIM-00435
Revision: 0.08
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Date: 2016-11-18
Analog Outputs (DAC’s)
Overview
The Xtreme I/O Express ADC-DAC uses a 16-bit 4-channel DAC IC which is interfaced to the on-
board FPGA. The DAC IC datasheet can be found here: http://www.ti.com/lit/gpn/dac8734
Connectors & Jumpers
Function
Analog Inputs
Location
P7
Type
Samtec TSW-105-08-L-D-RA
2x5, 0.100” pitch
Mate
Any 0.100” cable
Pinout
Pin
Description
Pin
Description
1
DAC_OUTA
2
GND
3
DAC_OUTB
4
GND
5
DAC_OUTC
6
GND
7
DAC_OUTD
8
GND
9
GND
10
GND
Operation
The DAC8734 IC has 4 DAC outputs Channel 0,1,2 and 3. The DAC block can be configured to
drive the DAC peripheral from one of three sources, direct software writes (Direct Write Mode),
block ram stored sequences (Signal Gen Mode) or a built in PWM (PWM Mode). On power on the
DAC defaults to the first mode but can easily be switched to one of the other two by writing to the
appropriate bits in the TRG_SIGGEN_PWM register.
Direct Write Mode
In this mode the DAC controller responds to writes to the CH0_DATA, CH1_DATA, CH2_DATA,
CH3_DATA registers and then immediately sends the contents of one or the other if it detects a write
has been made. A write to CH0_DATA will trigger the transmission of the new values to channel 0
and 1 and a write to address CH2_DATA will trigger the transmission of the new values to channel 2
and channel 3.
While the controller will always send in two channel values at a time, one can use byte enables to
write just 16 bits to either the upper or lower portion of one of the Direct Write Mode data registers.
When the transmission to the peripheral is then triggered the old value in the other channel slot will be
rewritten with the same thing.
Signal Gen Mode
The purpose of this mode is to allow the board to generate arbitrary, user-defined signals through the
DAC peripheral independent of any active software management. When operating in this capacity,
the board will persistently source its outputs to the DAC peripheral from values stored in its
associated block memory in a manner as dictated by the fields within the SIG_GEN_RD_CTRL