CSS Laboratories SB-6862 Use and care manual

iSB-6862
Technical Reference
SB-6862
Dual Pentium® Pro Single Board Computer
with Natoma Chipset
1641 McGaw Avenue
Irvine, California 92614

ii SB-6862

iiiSB-6862
Features
 Intel Pentium® Pro processor, upgradeable through 180 or
200 MHz; and dual Pentium® Pro upgrade
 Intel Natoma chipset
 Basic connectors provided for speakers, hard disk LED,
reset/turbo LED, keylock, PS/2 mouse and CMOS
battery
 System memory upgradeable to 1 GB using x 64 or
x 72 dual inline memory modules (DIMM)
 Processor facilitated error correcting memory (ECC)
using x 72 DIMM
Processor-based cache: 256 KB or 512 KB on-board
On-board E-IDE controller with seperate master/slave
IDE mode support for up to 4 IDE drives and support for
up to 2 floppy drives
On-board I/O: 2 serial, 2 universal serial bus (USB) and
1 parallel ports
PS/2 keyboard mini-DIN connector; extra on-board PS/2
mouse connector

iv SB-6862
FCC Standards
The FCC (Federal Communications Commission) restricts
the amount of radiation and radio frequency emissions
coming from computing equipment.
Note: This equipment has been tested and found to comply
with the limits for a Class B digital device pursuant to Part
15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference in a
residential installation. This equipment generates, uses, and
can radiate radio frequency energy and, if not installed and
used in accordance with the instructions, may cause harmful
interference to radio communications. However, there is no
guarantee that interference will not occur in a particular
installation. If this equipment does cause harmful interference
to radioor television reception, which can be determined by
turning the equipment off and on, the use is encouraged to try
to correct the interference by one or more of the following
measures:
 Reorient or relocate the receiving antenna.
 Increase the separation between the equipment and
receiver.
 Connect the equipment into an outlet on a circuit
different from that to which the receiver is connected.
 Consult the dealer or an experienced radio/TV technician
for help.
CSS Labs is not responsible for any radio or television
interference caused by unauthorized modifications to this
equipment. Operation with non-certified peripherals is likely
to result in interference to radio and TV reception.

vSB-6862
To ensure compliance to FCC non-interference regulations,
peripherals attached to this device require shielded I/O cables.
NOTICE: The use of a non-shielded I/O cable with this
device is in violation of U.S. Federal law and will not allow
the device to meet the maximum emission limits.
CAUTION: Any changes or modifications not expressly
approved by the grantee of this device could void the users
authority to operate the equipment.
Note: If you have purchased the miniature tower system,
please note the following...
WARNING: The system is to be installed on desk or table
tops only. The unit will become unstable if operated as a floor
standing unit and unintentional force is applied to the top of
the unit.
Turn the unit off and unplug the power cord before you
open the cover to install any cards or peripheral devices.

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WARNING
CAUTION: THERE IS A DANGER OF EXPLOSION IF
THE BATTERY IS INCORRECTLY REPLACED.
REPLACE ONLY WITH THE SAME OR EQUIVALENT
TYPE RECOMMENDED BY THE MANUFACTURER.
DISCARD USED BATTERIES ACCORDING TO THE
MANUFACTURERS INSTRUCTIONS.
ATTENTION:IL Y A DANGER DEXPLOSION SIL Y A
REMPLACEMENT INCORRECT DE LA BATTERRIE.
REMPLACER UNIQUEMENT AVEC UNE BATTERI DU
MEME TYPE OU DUN TYPE RECOMMENDE PAR LE
CONSTRUCTEUR. ETTERAU REBUT LES
BATTERRIES USAGEES CONFORMEMANT AUX
INSTRUCTIONS DU FABRICATANT.

viiSB-6862
NOTICE
The information within this manual is subject to change
without notice.
CSS Laboratories, Incorporated shall not be held liable for
technical or editorial errors or omissions contained in herein;
nor for incidental or consequential damages resulting from the
furnishing, performance or use of this material.
All rights reserved. No part of this publication may be
reproduced, stored in a retrieval system, or transmitted, in
any form or by any means, mechanical, photocopying,
recording or otherwise, without the prior written permission
of CSS Laboratories, Inc.
Product names mentioned herein are for identification
purposes only, and may be trademarks and/or registered
trademarks of their respective companies.
© 1997 CSS Laboratories, Inc. All rights reserved.
P/N MS-SBC-6862-DOC Revision 1 August, 1997

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ixSB-6862
Table of Contents
Overview ............................................................................... 1
The Microprocessor .............................................................. 2
The Board ............................................................................. 3
Voltage Regulator..................................................... 4
Board Connectors ................................................................. 5
Keyboard Connector K1 ......................................... 5
Primary IDE Drive Header J11 ............................... 5
Secondary IDE Drive Header J12 ........................... 6
Parallel Port DB1 ................................................... 6
Serial Port 1 Connector J98 .................................... 6
Serial Port 2 Connector J97 .................................... 6
Floppy Drive Connector J8 ..................................... 6
Universal Serial Bus Connectors J3, J4 .................. 6
Fan Connectors JP18, JP45 .................................... 7
Jumpers ................................................................................. 8
Processor Bus Clock Speed JP4, JP3 ..................... 8
Processor Bus Frequency JP26, JP27 .................... 9
Processor Speed Ratio JP32, JP31, JP30, JP29 .... 10
System Memory ...................................................................11
Installing and Removing DIMM ..........................................11
System Memory Configuration ........................................... 12
System Memory Map .......................................................... 15
Timers...................................................................15
System Interrupts ................................................................ 16
Direct Memory Access ........................................................ 17
The I/O Address Map ......................................................... 18
Configuration Utilities ........................................................ 19
Overview ................................................................ 19
Standard Setup ....................................................... 21
Advanced Setup ..................................................... 22
Advanced Chipset Setup ........................................ 23
Power Management Setup ..................................... 24
PCI/PnP Setup ....................................................... 25
Peripheral Setup ..................................................... 26

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1SB-6862
Overview
This document describes the technical features of the
board. The topics include:
 The Microprocessor - description of the features of
the Pentium® Pro microprocessor
 Board - illustration and brief description of the
board
 Connectors - description of connector locations and
functions on the board
 Jumpers - detailed description of the jumpers used
to the board
 System Memory - detailed description of system
memory how to add memory
 System Memory Map - listing of traditional address
assignments for system memory
 Configuration Utilities - a description and
instructions for the boards BIOS

2SB-6862
The Microprocessor
The Pentium Pro microprocessor contains all the features
of the Pentium and 80486 processors, and is 100%
compatible with 8086/88, 80286, and 80386 DX and SX
microprocessors. In addition, the Pentium features:
 64-bit Data Bus
 Superscalar Architecture
 Capability for executing two instructions in parallel
 Pipelined Floating-Point Unit
 Separate 8 KB Code and 8 KB Data Caches (total 16
L1 cache)
 256 KB or 512 KB internal L2 cache
 Bus Cycle Pipelining
 Writeback MESI Protocol in the Data Cache
 Internal Parity Checking
It is available in a variety of speeds, from 180 MHz through
200 MHz.
For additional information, talk to your authorized CSS
Laboratories representative.

3SB-6862
The Board
Figure 1: The Board
VOLTAGE
REGULATORS
1
1
Processor
Dual
Processor
1
1 1
DIMM
1
1
1 11
1 1
11 1 1
11 11
11 1
1
1
1
1 1
1
1 1
1
FLASH
U57
U58
U59
U60
JP45
JP26
JP27
JP32
JP31
JP30
JP29
JP46JP47
JP15
JP43 JP16
JP42
J3 J4
JP1
JP2
JP7
JP6
J97
JP24
J67
J68
J12
J11
J8 FLOPPY
IDE-PRI IDE-SEC
SERIAL 2
SERIAL 1
K1
PARALLEL
J99 J100
VRM VRM
KEYBOARD
J47
JP4 JP3 JP18 J98
J70 J69
DIMM 1
DIMM 2
DIMM 3
DIMM 4
DB1

4SB-6862
Voltage Regulator Module
A voltage regulator module installed on the board ensures
that the correct voltage is provided to the particular processor
installed.
When up grading to the faster grade of Pentium processor,
make sure to have the appropriate voltage regulator installed.

5SB-6862
Board Connectors
Keyboard Connector K1
Keyboard plugs are keyed for proper installation.
Primary IDE Drive Header J11
J11 is the connector for the primary on-board PCI IDE
drive controller. Pin 1 is marked. When connecting your
hard drive, orient the cables pin one with pin 1 of J11.
Pin Assignment Pin Assignment
1 Clock 4 Ground
2 Data 5 +5 Vdc
3 Not used
Connector Description
K1 Keyboard
J3, J4 Universal Serial Bus (USB)
J8 Floppy drive
J11 Primary IDE
J12 Secondary IDE
J98 Serial 1
J97 Serial 2
DB1 Parallel
JP18, JP45 12 volt CPU fans

6SB-6862
Secondary IDE Drive Header J12
J10 is the connector for the secondary on-board PCI IDE
hard drive controller. Pin 1 is marked. Use this to cable
your IDE hard drive. When connecting your hard drive,
orient the ribbons pin one with pin 1 of J71.
Parallel Port DB1
DB1 provides the connection for the boards parallel port.
Serial Port 1 Connector J98
J98 provides the connection for serial port 1 (COM 1).
Serial Port 2 Connector J97
J97 provides the connection for the boards serial port 2
(COM 2).
Floppy Drive Connector J8
J8 connects the floppy drive to the controller provided on
the board.
Universal Serial Bus Connectors J3, J4
The motherboard provides two 4-pin universal serial bus
(USB) connectors.

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Fan Connectors JP18, JP45
These fans provide cooling for the powerful Pentium Pro
processors. JP45 connects to the primary processors fan.
JP18 connects to the dual processor fan.
Pin Assignment
1 12 volt
2 Ground

8SB-6862
Jumpers
The boards jumpers are pre-configured at the factory.
Read the following section carefully, before configuring
your system.
The board has the following jumpers:
Processor Bus Clock Speed JP4, JP3
Pentium Pro processors are designed with one of two bus
clock speeds. The bus clock speed is always a fraction of
the processors internal speed.
Bus Clock JP4 JP3
Speed
60 MHz IN OUT
66 MHz OUT IN
Jumper Description
JP4 Processor bus clock speed
JP26, JP27 Processor bus frequency
JP32, JP31 Processor speed ratio
JP30, JP29
JP69, JP24 Test pins (jumper closed)
JP1, JP2, J70
J47, JP47, JP46 Test pins (jumper open)

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Processor Bus Frequency JP26, JP27
JP26 and JP27 synchronize the processor bus frequency with
the processors speed.
Processor Speed Ratio JP32, JP31, JP30, JP29
The Pentium Pro uses a clock multiplier to run at a
speed faster than the processor bus.
These jumpers match the installed processors speed with
single board computers defined processor speed.
When upgrading processors, you may need to adjust these
jumpers.
Processor Bus JP26 JP27
Frequency
60 MHz IN OUT
66 MHz OUT IN
Processor JP32 JP31 JP30 JP29
Speed Ratio
2x ON ON ON ON
2.5x ON ON ON OFF
3x ON ON OFF ON
4x ON OFF ON ON
4.5x ON OFF ON OFF

10 SB-6862
The following table matches processor speed, processor clock
and the boards processor bus speed:
Processor Clock Ratio Processor
Type/Speed Bus Speed
180 MHz 3x 60 MHz
200 MHz 3x 66 MHz