CTI MPG401 User manual

Mini PCIe ADC
Connect Tech Inc. Tel: [phone]
42 Arrow Road Toll: 800-426-8979 (North America only)
Guelph, Ontario Fax: [phone]
N1K 1S6 Email: [e-mail]
www.connecttech.com [e-mail]
CTIM-00149 Revision 0.02 2018-10-25

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Table of Contents
Table of Contents...................................................................................................................................2
Preface...................................................................................................................................................4
Disclaimer .......................................................................................................................................................4
Customer Support Overview...........................................................................................................................4
Contact Information ........................................................................................................................................4
Limited Product Warranty...............................................................................................................................5
Copyright Notice.............................................................................................................................................5
Trademark Acknowledgment..........................................................................................................................5
ESD Warning ..................................................................................................................................................6
Revision History ....................................................................................................................................6
Introduction...........................................................................................................................................7
Product Features and Specifications................................................................................................................7
Part Numbers / Ordering Information .............................................................................................................7
Product Overview..................................................................................................................................8
Block Diagram ................................................................................................................................................8
Connector Summary & Locations...................................................................................................................8
Jumper Summary & Locations........................................................................................................................8
Detailed Feature Description..................................................................................................................9
General Board Operation.................................................................................................................................9
Interfacing Convention.........................................................................................................................9
Memory Map.......................................................................................................................................................................9
Analog Inputs (ADCs)...................................................................................................................................10
Overview ............................................................................................................................................10
Connectors & Jumpers........................................................................................................................10
Operation............................................................................................................................................10
Continuous Sampling Mode .............................................................................................................................................. 11
Waveform Capture Mode (FIFO Mode)............................................................................................................................ 11
Variable Sampling Rate..................................................................................................................................................... 11
Memory Map......................................................................................................................................12
Register Details ..................................................................................................................................12
CONTROL_CONFIG (ADC# Offset 0x0000 - Read/Write) ............................................................................................12
INPUT_RANGE_SELECT (ADC# Offset 0x0010 –Read/Write) ...................................................................................12
CHx_LAST_SAMPLE (Offset 0x0014, Read Only).........................................................................................................13
MEM_WRITE_CONTROL (ADC# Offset 0x0024)......................................................................................................... 14
Application Examples.........................................................................................................................14
Example A –ADC Operation with same input range........................................................................................................ 14
Example B –ADC Operation with different input range...................................................................................................15
Flash Controller.............................................................................................................................................16
Overview ............................................................................................................................................16
Operation............................................................................................................................................16
Memory Map......................................................................................................................................16
Register Details ..................................................................................................................................16
Common Features .........................................................................................................................................17
Memory Map......................................................................................................................................17
Register Details ..................................................................................................................................17
IRQ_ STATUS (COMMON_BASE +0x0C –Read/Write) ............................................................................................17
SCRATCHPAD_REG_1 (COMMON_BASE +0x18 –Read/Write)................................................................................ 17

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SCRATCHPAD_REG_2 (COMMON_BASE +0x1C –Read/Write)...............................................................................17
IRQ_MSTR_STATUS (IRQ_BASE +0x40 –Read Only)............................................................................................... 18
IRQ_MSTR_ENABLE (IRQ_BASE +0x50 –Read/Write Only)....................................................................................18
RELEASE (ID_BASE +0x0 –Read Only)....................................................................................................................... 18
TIMESTAMP (ID_BASE +0x4 –Read Only)..................................................................................................................18
Application Examples.........................................................................................................................19
Example A –writing/reading from scratch pad.................................................................................................................19
Example B –reading ID registers...................................................................................................................................... 19
Software Installation............................................................................................................................20
Typical Installation..............................................................................................................................20
Appendix –A Header File....................................................................................................................21

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Preface
Disclaimer
The information contained within this user’s guide, including but not limited to any product specification, is
subject to change without notice.
Connect Tech assumes no liability for any damages incurred directly or indirectly from any technical or
typographical errors or omissions contained herein or for discrepancies between the product and the user’s
guide.
Customer Support Overview
If you experience difficulties after reading the manual and/or using the product, contact the Connect Tech
reseller from which you purchased the product. In most cases the reseller can help you with product installation
and difficulties.
In the event that the reseller is unable to resolve your problem, our highly qualified support staff can assist you.
Our support section is available 24 hours a day, 7 days a week on our website at:
www.connecttech.com/sub/support/support.asp. See the contact information section below for more
information on how to contact us directly. Our technical support is always free.
Contact Information
Mail/Courier
Connect Tech Inc.
Technical Support
42 Arrow Road
Guelph, Ontario
Canada N1K 1S6
Email/Internet
[email protected]m
[email protected]m
www.connecttech.com
Note:
Please go to the Download Zone or the Knowledge Database in the Support Center on the Connect Tech
website for product manuals, installation guides, device driver software and technical tips.
Submit your technical support questions to our customer support engineers via the Support Center on the
Connect Tech website.
Telephone/Facsimile
Technical Support representatives are ready to answer your call Monday through Friday, from 8:30 a.m. to
5:00 p.m. Eastern Standard Time. Our numbers for calls are:
Toll Free: 800-426-8979 (North America only)
Telephone: [phone] (Live assistance available 8:30 a.m. to 5:00 p.m. EST,
Monday to Friday)
Facsimile: 519-836-4878 (on-line 24 hours)

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Limited Product Warranty
Connect Tech Inc. provides a 2 year Warranty for this product. Should this product, in Connect Tech Inc.'s
opinion, fail to be in good working order during the warranty period, Connect Tech Inc. will, at its option,
repair or replace this product at no charge, provided that the product has not been subjected to abuse, misuse,
accident, disaster or non-Connect Tech Inc. authorized modification or repair.
You may obtain warranty service by delivering this product to an authorized Connect Tech Inc. business
partner or to Connect Tech Inc. along with proof of purchase. Product returned to Connect Tech Inc. must be
pre-authorized by Connect Tech Inc. with an RMA (Return Material Authorization) number marked on the
outside of the package and sent prepaid, insured and packaged for safe shipment. Connect Tech Inc. will
return this product by prepaid ground shipment service.
The Connect Tech Inc. Limited Warranty is only valid over the serviceable life of the product. This is defined
as the period during which all components are available. Should the product prove to be irreparable, Connect
Tech Inc. reserves the right to substitute an equivalent product if available or to retract the Warranty if no
replacement is available.
The above warranty is the only warranty authorized by Connect Tech Inc. Under no circumstances will
Connect Tech Inc. be liable in any way for any damages, including any lost profits, lost savings or other
incidental or consequential damages arising out of the use of, or inability to use, such product.
Copyright Notice
The information contained in this document is subject to change without notice. Connect Tech Inc. shall not
be liable for errors contained herein or for incidental consequential damages in connection with the furnishing,
performance, or use of this material. This document contains proprietary information that is protected by
copyright. All rights are reserved. No part of this document may be photocopied, reproduced, or translated to
another language without the prior written consent of Connect Tech, Inc.
Copyright

2016 by Connect Tech, Inc.
Trademark Acknowledgment
Connect Tech, Inc. acknowledges all trademarks, registered trademarks and/or copyrights referred to in this
document as the property of their respective owners. Not listing all possible trademarks or copyright
acknowledgments does not constitute a lack of acknowledgment to the rightful owners of the trademarks and
copyrights mentioned in this document.

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ESD Warning
Electronic components and circuits are sensitive to
ElectroStatic Discharge (ESD). When handling any circuit
board assemblies including Connect Tech COM Express
carrier assemblies, it is recommended that ESD safety
precautions be observed. ESD safe best practices include,
but are not limited to:
Leaving circuit boards in their antistatic packaging
until they are ready to be installed.
Using a grounded wrist strap when handling circuit
boards, at a minimum you should touch a grounded
metal object to dissipate any static charge that may be
present on you.
Only handling circuit boards in ESD safe areas, which
may include ESD floor and table mats, wrist strap
stations and ESD safe lab coats.
Avoiding handling circuit boards in carpeted areas.
Try to handle the board by the edges, avoiding contact
with components.
Revision History
Revision
Date
Changes
0.00
04/07/2016
Preliminary Release
0.01
08/12/2016
Added Info on Power Requirements and Driver Support
0.02
2018-10-25
Updated Connector Pins

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Introduction
Connect Tech’s Mini PCIe ADC is an analog to digital board for the mini PCI Express small form factor
embedded marketplace. This product is ideal for data acquisition and measurement applications.
Product Features and Specifications
Specifications
Details
Form Factor
Mini PCI Express Full sized
Host Interface Bus
PCI Express Gen 1.0
Analog Inputs
Channels: 16 Single Ended
Resolution: 16-bit
Sampling Rate: 500ksps
Protection: ±20V
Input Ranges:
Bipolar: ±10.24V, ±5.12V and ±2.56V
Unipolar: 0 - 10.24V and 0 - 5.12V
Accuracy: ±2.5 LSB INL, ±1.5 LSB DNL
Signal-to-Noise Ratio: 91 dB @ ±10.24V
Operating Temperature
-40 to +85 Degrees Celsius
Dimensions
50.95mm x 30mm Mini PCIe "Full"
Power Consumption
+3.3VDC @ 0.350A
Software Compatibility
Linux, Windows
Warranty and Support
2 year Warranty
Free Technical Support
Part Numbers / Ordering Information
Part Number
Description
MPG401
Mini PCIe 16 ADC input channels 16-bit resolution, 500kSPS, -40°C to +85°C
RoHS compliant

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Product Overview
The Mini PCIe ADC is based on a custom FPGA controller and SPI ADCs. The following block diagram shows the
connection between the interfaces. Each SPI bus is independent, and managed by separate control block.
Connection to analog signals is provided by single high density latching connector.
Block Diagram
Connector Summary & Locations
Designator
Description
P1
Analog Inputs
P5
JTAG programming
Jumper Summary & Locations
This board is completely jumper-less, all options are configured through software.
Altera Cyclone IV GX
FPGA
TI 16 Bit ADC
ADS6888
TI 16 Bit ADC
ADS6888
Mini PCIe Bus
SPI Flash
SPI
SPI
PCI Express
Analog Inputs
JTAG

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Detailed Feature Description
General Board Operation
Interfacing Convention
All board features are controlled through a simple memory mapped register based interface. Each analog to
digital controller block (ADC) is controlled from a separate base address location; however the registers within
those blocks have identical functionality. There are separate memory blocks for the interrupt controller, on
board flash programming controller, and board identification.
Memory Map
The following table shows the overall memory map.
Offset
Identifier
Description
0x0000
COMMON_BASE
General Board control
0x1000
ADC0
Analog to Digital Controller 0
0x4000
ADC1
Analog to Digital Controller 0
0x20000
IRQ_BASE
Board level Interrupt Controller
0x24000
FLASH_BASE
Flash Controller
0x24210
ID_BASE
Board Identification

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Analog Inputs (ADCs)
Overview
The Mini PCIe ADC uses two Texas Instruments ADS8688, each having an 8-channel multiplexer that allows
for the sampling of 8 single ended analog signals. The SPI interface of each ADS8688 is connected to the
FPGA controller, while the analog side is connected to the high density latching connector.
The ADC IC datasheet can be found here: http://www.ti.com/lit/gpn/ads8688
Connectors & Jumpers
Function
Analog Inputs
Location
P1
Type
Molex 501190-2017 (Pico-clasp 2x10)
Mate
Molex 501189-2010 with 501193-3000
Pinout
Pin
Description
Pin
Description
1
ADC0_CH0
2
ADC0_CH1
3
ADC0_CH2
4
ADC0_CH3
5
GND
6
GND
7
ADC0_CH4
8
ADC0_CH5
9
ADC0_CH6
10
ADC0_CH7
11
ADC1_CH0
12
ADC1_CH1
13
ADC1_CH2
14
ADC1_CH3
15
ADC1_CH4
16
ADC1_CH5
17
GND
18
GND
19
ADC1_CH6
20
ADC1_CH7
Operation
The ADCs are controlled and have their data stored in two controller blocks. The mode of capture can be set
to either Continuous Sampling Mode or Waveform Capture Mode. The input range for each of the 4 ADCs
can be changed via the INPUT_RANGE_SELECT register.
Each ADC block can be set to capture up to 8 channels in a looping sequential order. For example, if all eight
channels were enabled in ADC0 (writing 0xFF to CONTROL_CONFIG register) then the following shows the
process it would go through in obtaining the requested samples:
By default, sample collection occurs at the maximum sampling rate of the ADC IC which is 500ksps, so if, in
continuing the previous example, all 8 channels were to be enabled then the actual sampling rate per ADC
Channel would be 500ksps/8=62.5ksps.
20
2
1
19
C
H
C
H
C
H
C
H
C
H
C
H
C
H

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Continuous Sampling Mode
Each ADC channel’s code is captured and stored into their CHx-LAST_SAMPLE register. This CHx-
LAST_SAMPLE register is then constantly updated/overwritten with a latest/newest code received.
Waveform Capture Mode (FIFO Mode)
This mode is supplementary to the Continuous Sampling Mode in that the ADC blocks will continue to update
their CHX-LAST_SAMPLE registers while also storing data in their associated sample FIFOs.
An ADC block operating in this mode will signal that its FIFO memory is almost full via a PCIe interrupt; the
sample count at which this notification is made can be adjusted to any value within the sample depth range
supported by the sample FIFOs (2047). Each sample is stored in the FIFOs is saved along with two additional
bookkeeping data fields: the channel number and the sample number.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
11-bit "Timestamp"/Sample Num
R
Channel ID
16-bit CODE from ADC
For example to set up an ADC block to capture data in its sample FIFO and provide a notification once it has
stored 1023 of these values, one would write 0x3FF to the first ten bits of its MEM_WRITE_CONTROL
register and then set the MEM Store flag in its CONTROL_CONFIG register.
Variable Sampling Rate
As already touched upon the default sampling rate of the ADC blocks is 500ksps or the maximum rate
supported by the ADC peripherals. If slower sampling rates are required, then each block can be individually
set to subdivide this maximum rate by way of a counter roll over value stored in the CLK_DIV_CNTR
register.
Essentially, if sample rate division is enabled with bit number nine in the control register of an ADC block then
an internal counter is incremented to the value stored in CLK_DIV_CNTR and then reset, continuously, at the
maximum sampling rate. The actual subdividing of the sample rate then is, in this sense, achieved by storing
new values only when the counter is equal to zero.

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Memory Map
Offset
(Hex)
0x03
0x02
0x01
0x00
setup/config
0x0000
CONTROL_CONFIG
0x0004
STATUS
0x0008
CLK_DIV
0x000C
CLK_DIV_CNTR
0x0010
INPUT_RANGE_SELECT
last samples
0x0014
CH1-LAST_SAMPLE
CH0-LAST_SAMPLE
0x0018
CH3-LAST_SAMPLE
CH2-LAST_SAMPLE
0x001C
CH5-LAST_SAMPLE
CH4-LAST_SAMPLE
0x0020
CH7-LAST_SAMPLE
CH6-LAST_SAMPLE
M
0x0024
MEM_WRITE_CONTROL
mem block
0x1000
CHANNEL_ID/TIMESTAMP_0
MEM_SAMPLE_0
0x1004
CHANNEL_ID/TIMESTAMP_1
MEM_SAMPLE_1
0x1008
CHANNEL_ID/TIMESTAMP_2
MEM_SAMPLE_2
…
…
…
0x2FFC
CHANNEL_ID/TIMESTAMP_4k
MEM_SAMPLE_2k
Register Details
CONTROL_CONFIG (ADC# Offset 0x0000 - Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved / Future Use
S
T
O
P
-
R
S
T
D
I
V
S
T
O
R
S
C
H
0
S
C
H
1
S
C
H
2
S
C
H
3
S
C
H
4
S
C
H
5
S
C
H
6
S
C
H
7
This register contains several control bits/flags
STOP 0=normal operation, 1=stop sampling
RST 0=normal operation, 1=reset ICs and regs
DIV 0=maximum rate, 1=divide
STOR 1=store samples in memory, 0=don't store
SCHx Enable Sample of CHANx (0..7)
INPUT_RANGE_SELECT (ADC# Offset 0x0010 –Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
CH7
Range
CH6
Range
CH5
Range
CH4
Range
CH3
Range
CH2
Range
CH1
Range
CH0
Range

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This register contains all of the channel input range values which are described below.
CHx Range [2:0]
Postive Full Scale (V)
Negative Full Scale (V)
Full-Scale Range (V)
LSB (µV)
000
10.24
-10.24
20.48
312.5
001
5.12
-5.12
10.24
156.25
010
2.56
-2.56
5.12
78.125
101
10.24
0
10.24
156.25
110
5.12
0
5.12
78.125
CHx_LAST_SAMPLE (Offset 0x0014, Read Only)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CHx 16-bit CODE
This register contains the last sampled 16-bit code for the specific channel. Bit-15 is the MSB of the CODE
and Bit-0 is the LSB for the CODE.
All samples are in a binary format for both bipolar and unipolar input ranges. The full-scale range (FSR) for
each input signal is equal to the difference between the positive full-scale (PFS) input voltage and the negative
full-scale (NFS) input voltage. The LSB size is equal to FSR / 65536 because the resolution of the ADC is 16
bits.
Code translation examples:
Code
CHx
Range[2:0]
FSR
Actual
Voltage
Graph
0x0000
000
20.48V
-10.24V
0x8000
000
20.48V
0.00V
0xffff
000
20.48V
10.24V
0x0000
001
10.24V
-5.12V
0x8000
001
10.24V
0.00V
0xffff
001
10.24V
5.12V
0x0000
110
5.12V
0.00V
0x8000
110
5.12V
2.56V
0xffff
110
5.12V
5.12V

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MEM_WRITE_CONTROL (ADC# Offset 0x0024)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved / Future Use
Current FIFO Write Count
Trigger IRQ at FIFO Count
This register contains the current FIFO capacity, and the interrupt trigger.
Current FIFO Write Count Shows the current position in the FIFO memory (Read Only)
Trigger IRQ at FIFO Count Sets the position in the FIFO memory at which the almost full IRQ is
triggered (value must be greater than zero to fire)
Application Examples
These application examples leverage the Connect Tech’s Universal FPGA Driver (UFD) and API
Example A –ADC Operation with same input range
In this example we will set the 2 ADC IC’s to enable sampling, and set the input range for each of the ADCs to
be +/-10.24V. Then we will read back all the channels.
printf("ADC0&1: enabling chan0-7 and setting input range\n");
control_config = 0xFF;
CTIFPGAWrWord(pbrd, BarIndex, ADC0+CONTROL_CONFIG, control_config);
CTIFPGAWrWord(pbrd, BarIndex, ADC1+CONTROL_CONFIG, control_config);
input_range = 0x0;
CTIFPGAWrDword(pbrd, BarIndex, ADC0+INPUT_RANGE_SELECT, input_range);
CTIFPGAWrDword(pbrd, BarIndex, ADC1+INPUT_RANGE_SELECT, input_range);
printf("\nReading ADC Voltages...\n");
for(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC0+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC0votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC0 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i, ADC0+CH0_LAST_SAMPLE+(i*2),testreg,
ADC0votlage);
}
for(i=0; i < 8; i++)
{
CTIFPGARdWord(pbrd, BarIndex, ADC1+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC1votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC1 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i, ADC1+CH0_LAST_SAMPLE+(i*2),testreg,
ADC1votlage);
}

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Example B –ADC Operation with different input range
In this example we will set:
-ADC0 to take a readings from CH0 with an input voltage range of +/-10.24V
-ADC1 to take a readings from CH0 with an input voltage range of +10.24V
printf("ADC0&1: enabling chan0 and setting input range\n");
control_config = 0x80;
CTIFPGAWrWord(pbrd, BarIndex, ADC0+CONTROL_CONFIG, control_config);
CTIFPGAWrWord(pbrd, BarIndex, ADC1+CONTROL_CONFIG, control_config);
input_range = 0x0;
CTIFPGAWrDword(pbrd, BarIndex, ADC0+INPUT_RANGE_SELECT, input_range);
input_range = 0x0;
for(ch=0;ch<8;ch++)
{
input_range|= (0x5 << (3*ch));
}
CTIFPGAWrDword(pbrd, BarIndex, ADC1+INPUT_RANGE_SELECT, input_range);
printf("\nReading ADC Voltages...\n");
i=0;
CTIFPGARdWord(pbrd, BarIndex, ADC0+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC0votlage = testreg * (20.48/0x10000) - 0x8000 * (20.48/0x10000);
printf("ADC0 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i, ADC0+CH0_LAST_SAMPLE+(i*2),testreg, ADC0votlage);
i=0;
CTIFPGARdWord(pbrd, BarIndex, ADC1+CH0_LAST_SAMPLE+(i*2), &testreg);
ADC1votlage = testreg * (20.48/0x10000);
printf("ADC1 Ch%d, Address %x, CODE=%04x Voltage=%08f\n", i, ADC1+CH0_LAST_SAMPLE+(i*2),testreg, ADC1votlage);

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Flash Controller
Overview
The Mini PCIe ADC has a built-in flash controller to facilitate remote updates over the Mini PCIe bus. There
are two usage modes –update flash and cold boot reconfig or update flash and live reconfiguration.
Update flash and cold boot –the flash is erased and a new configuration image is written then verified. The
FPGA is not update until the next power cycle.
Update flash and liver reconfiguration –the flash is erased and new configuration image is written then
verified. The PCIe configuration registers are then save, the a configuration cycle is initiated, and the PCIe
configuration registers are restored.
Operation
For futher details on the flash controller operation, contact suppo[email protected]m to obtain the necessary
software package.
Memory Map
Offset
(Hex)
0x03
0x02
0x01
0x00
0x0000
SPI_CMD
0x0004
SPI_PARAM
0x0008
SPI_STATUS
0x000C
SPI_RESULT
0x00100
SPI_PAGE_MEM
Register Details
For futher details on the flash controller operation, contact suppo[email protected]m to obtain the necessary
software package.

Mini PCIe ADC
Users Guide
www.connecttech.com
Document: CTIM-00149
Revision: 0.02
Page 17 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
Common Features
The following section describes several of the board level common features, including the interrupt controller
and ID register.
Memory Map
Block
Offset
(Hex)
0x03
0x02
0x01
0x00
COMMON_BASE
0xC
IRQ_STATUS
COMMON_BASE
0x18
SCRATCHPAD_REG_1
COMMON_BASE
0x1C
SCRATCHPAD_REG_2
ID_BASE
0x0
RELEASE
ID_BASE
0x4
TIMESTAMP
IRQ_BASE
0x40
IRQ_MSTR_STATUS
IRQ_BASE
0x50
IRQ_MSTR_ENABLE
Register Details
IRQ_ STATUS (COMMON_BASE +0x0C –Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Not used
A
D
C
1
A
D
C
0
ADC0 ADC controller block 0 has a FIFO over the trigger level
ADC1 ADC controller block 1 has a FIFO over the trigger level
The register must be written to in order to clear the flag. Currently there is only one interrupt source per ADC
block, which makes IRQ_MSTR_STATUS seem redundant.
SCRATCHPAD_REG_1 (COMMON_BASE +0x18 –Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Test value
A scratch pad register for software testing.
SCRATCHPAD_REG_2 (COMMON_BASE +0x1C –Read/Write)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Test value
A scratch pad register for software testing.

Mini PCIe ADC
Users Guide
www.connecttech.com
Document: CTIM-00149
Revision: 0.02
Page 18 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
IRQ_MSTR_STATUS (IRQ_BASE +0x40 –Read Only)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Not used
F
L
A
S
H
A
D
C
1
A
D
C
0
ADC0 ADC controller block 0 has a pending interrupt
ADC1 ADC controller block 1 has a pending interrupt
FLASH SPI Flash controller block has a pending interrupt
This is the overall interrupt status for each functional block.
IRQ_MSTR_ENABLE (IRQ_BASE +0x50 –Read/Write Only)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Not used
F
L
A
S
H
A
D
C
1
A
D
C
0
ADC0 ADC controller block 0 interrupt is enabled
ADC1 ADC controller block 1 interrupt is enabled
FLASH SPI Flash controller block interrupt is enabled
This is the overall interrupt enable for each functional block. To mask an interrupt, set the bit to 0.
RELEASE (ID_BASE +0x0 –Read Only)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Major Revision = 0x2
Minor Revision = 0x0
TIMESTAMP (ID_BASE +0x4 –Read Only)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Timestamp, see software application for conversions

Mini PCIe ADC
Users Guide
www.connecttech.com
Document: CTIM-00149
Revision: 0.02
Page 19 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
Application Examples
Example A –writing/reading from scratch pad
/**************************************************************/
printf("reading scratch pad registers\n");
/***************************************************************/
wrreg=0xABCDEF01;
ret = CTIFPGAWrDword(pbrd, BAR_MAIN, COMMON_BASE+SCRATCHPAD_REG_1, wrreg);
if(ret != CTI_STATUS_OK)
{
printf("Error write to SCRATCHPAD_REG_1\n"); result = FALSE;
}
ret = CTIFPGARdDword(pbrd, BAR_MAIN, COMMON_BASE+SCRATCHPAD_REG_1, &rdreg);
if(ret != CTI_STATUS_OK)
{
printf("Error read from FPGA mem"); result = FALSE;
}
else
{
printf ("rd reg = 0x%08x \n", rdreg);
}
if(wrreg !=rdreg)
{
printf("Expected %x, read %x\n", wrreg, rdreg);
}
Example B –reading ID registers
/**************************************************************/
printf("reading ID registers\n");
/***************************************************************/
time_t rawtime;
struct tm* timeinfo;
ret = CTIFPGARdDword(pbrd, BAR_MAIN, ID_BASE+0x0, &idreg);
if(ret != CTI_STATUS_OK)
{
printf("Error read from FPGA mem"); result = FALSE;
}
else
{
printf ("ID reg = 0x%08x \n", idreg);
}
ret = CTIFPGARdDword(pbrd, BAR_MAIN, ID_BASE+0x4, &tsreg);
if(ret != CTI_STATUS_OK)
{
printf("Error read from FPGA mem"); result = FALSE;
}
else
{
rawtime = tsreg;
timeinfo = localtime(&rawtime);
printf ("Timestamp reg = 0x%08x , %s\n", idreg, asctime(timeinfo));
}

Mini PCIe ADC
Users Guide
www.connecttech.com
Document: CTIM-00149
Revision: 0.02
Page 20 of 22
Connect Tech Inc. 800-426-8979 | 519-836-1291
Date: 2018-10-25
Software Installation
The Mini PCIe ADC is fully supported by Connect Tech’s Universal FPGA Driver(UFD). The UFD is
available for download from the ConnectTech’s download zone:
http://www.connecttech.com/asp/Support/DownloadZone_results.asp?Product=37
The UFD is available for multiple operating systems; refer to the website for availability and check back for
the latest releases.
Typical Installation
1) Ensure the target system is powered off.
2) Insert the Mini PCIe ADC into standard Mini PCIe full sized slot; clip or screw into place depending on
the available mounting hardware.
3) Attached the application cabling to the analog input connector P1.
4) Power on the system.
5) Under Linux, use lspci –vvt to verify the presence of the Mini PCIe ADC. The Vendor ID is 0x12C4,
Device ID is 0x1211.