Dialog DA1458 Series User manual

User Manual
DA1458x/DA1468x Production
Line Tool
UM-B-041
Abstract
This document describes the DA1458x/DA1468x Production Line Tool (PLT). The various software
applications, as well as the PLT hardware are explained in detail. The purpose of this document is to
help users to become familiar with the tool and help them use it in a short amount of time.

UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
2 of 180
© 2017 Dialog Semiconductor
Contents
Abstract................................................................................................................................................ 1
Contents............................................................................................................................................... 2
Figures.................................................................................................................................................. 5
Tables ................................................................................................................................................... 7
1Terms and Definitions................................................................................................................. 10
2References................................................................................................................................... 12
3New version features .................................................................................................................. 13
4Introduction.................................................................................................................................. 14
5Hardware...................................................................................................................................... 15
5.1 Hardware Block Diagram.................................................................................................... 15
5.2 Printed Circuit Board Layout............................................................................................... 16
5.3 PLT Power Supply .............................................................................................................. 16
5.4 DUT Connector ................................................................................................................... 17
5.5 Data Streaming ................................................................................................................... 18
5.6 Golden Unit ......................................................................................................................... 20
5.6.1 GU Reset............................................................................................................. 20
5.7 Current Measurements ....................................................................................................... 21
5.8 Jumper Settings .................................................................................................................. 21
5.8.1 J26 - Current Measurements............................................................................... 22
5.8.2 J42 - DA1458x OTP Burning Voltage.................................................................. 22
5.8.3 J47, J46 - GU Reset ............................................................................................ 23
5.8.4 J37 - GU Programming........................................................................................ 23
5.9 PLT Functional Blocks ........................................................................................................ 25
6Software ....................................................................................................................................... 26
6.1 Introduction ......................................................................................................................... 26
6.2 DA15100/1 support ............................................................................................................. 27
6.3 Software Package Contents ............................................................................................... 27
6.4 Prerequisites ....................................................................................................................... 29
6.5 System Requirements......................................................................................................... 30
6.6 Limitations........................................................................................................................... 30
6.7 Building the Code................................................................................................................ 31
6.8 Executing the Applications.................................................................................................. 32
6.9 Test Sequence.................................................................................................................... 36
6.9.1 DA1458x Test Sequence..................................................................................... 36
6.9.2 DA1468x Test Sequence..................................................................................... 40
6.10 VBAT/Reset Signals Operation........................................................................................... 44
6.10.1 VBAT Only........................................................................................................... 44
6.10.2 VBAT On with Reset............................................................................................ 45
6.10.3 VBAT as Reset .................................................................................................... 45
6.11 Custom Memory Data......................................................................................................... 46
6.11.1 Homekit Hash Setup Code.................................................................................. 46
6.11.2 Custom data CSV file format............................................................................... 48
6.12 Golden Unit Scan Test........................................................................................................ 49
6.13 Creating Firmware Files under “binaries” Folder ................................................................ 50

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
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© 2017 Dialog Semiconductor
7Applications................................................................................................................................. 55
7.1 Introduction ......................................................................................................................... 55
7.2 CFG PLT Application .......................................................................................................... 55
7.2.1 XML and XSD Files ............................................................................................. 56
7.2.2 Hardware Setup................................................................................................... 58
7.2.2.1 Station Identification ........................................................................ 59
7.2.2.2 Device IC ......................................................................................... 59
7.2.2.3 Active DUTs..................................................................................... 59
7.2.2.4 DUT COM Ports............................................................................... 60
7.2.2.5 Golden Unit Port Selection .............................................................. 60
7.2.2.6 VBAT/Reset Mode........................................................................... 61
7.2.3General................................................................................................................ 61
7.2.3.1 Statistics .......................................................................................... 61
7.2.3.2 Test Options .................................................................................... 62
7.2.4 BD Addresses...................................................................................................... 63
7.2.4.1 BD Address Assignment.................................................................. 63
7.2.5 UART (DA1458x)................................................................................................. 65
7.2.5.1 UART Boot Pins Setup.................................................................... 65
7.2.5.2 UART Baud Rate............................................................................. 66
7.2.5.3 UART Programming GPIOs Setup.................................................. 66
7.2.6 Test Settings (DA1458x)...................................................................................... 67
7.2.6.1 XTAL Trim........................................................................................ 67
7.2.6.2 RF Tests .......................................................................................... 68
7.2.6.3 Current Measurement Test.............................................................. 74
7.2.6.4 GPIO/LED Test................................................................................ 75
7.2.6.5 Audio Test........................................................................................ 76
7.2.6.6 Sensor Test ..................................................................................... 77
7.2.6.7 Custom Test .................................................................................... 78
7.2.6.8 Temperature Measurement Test..................................................... 78
7.2.6.9 Scan Test......................................................................................... 79
7.2.7 Memory Functions (DA1458x)............................................................................. 80
7.2.7.1 OTP Memory ................................................................................... 80
7.2.7.2 SPI Flash Memory........................................................................... 81
7.2.7.3 I2C EEPROM Memory..................................................................... 83
7.2.7.4 Memory read.................................................................................... 84
7.2.8 Memory Header (DA1458x)................................................................................. 85
7.2.8.1 General............................................................................................ 85
7.2.8.2 BD Address...................................................................................... 87
7.2.8.3 Custom Memory Data...................................................................... 88
7.2.9 UART (DA1468x)................................................................................................. 89
7.2.9.1 UART Boot Pins Setup.................................................................... 89
7.2.9.2 UART Baud Rate............................................................................. 89
7.2.10 Test Settings (DA1468x)...................................................................................... 90
7.2.10.1 XTAL Trim........................................................................................ 90
7.2.10.2 RF Tests .......................................................................................... 90
7.2.10.3 Current Measurement Test.............................................................. 97
7.2.10.4 GPIO/LED Test................................................................................ 99

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
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© 2017 Dialog Semiconductor
7.2.10.5 Sensor Test ................................................................................... 100
7.2.10.6 ADC Calibration (DA14681-00 AD only)........................................ 101
7.2.10.7 Custom Test .................................................................................. 102
7.2.10.8 Temperature Measurement Test................................................... 102
7.2.10.9 Scan Test....................................................................................... 103
7.2.11 Memory Functions (DA1468x)........................................................................... 104
7.2.11.1 OTP Memory ................................................................................. 104
7.2.11.2 QSPI Flash Memory ...................................................................... 105
7.2.11.3 Memory read.................................................................................. 106
7.2.12 Memory Header (DA1468x)............................................................................... 106
7.2.12.1 OTP Header................................................................................... 107
7.2.12.2 OTP Header - BD Address............................................................ 108
7.2.12.3 OTP Header - XTAL Trim.............................................................. 109
7.2.12.4 QSPI Header - BD Address........................................................... 110
7.2.12.5 QSPI Header - XTAL Trim............................................................. 110
7.2.12.6 Custom Memory Data.................................................................... 111
7.2.13 Debug Settings .................................................................................................. 112
7.2.14 Security.............................................................................................................. 113
7.3 GUI PLT Application.......................................................................................................... 113
7.3.1 GUI PLT Settings............................................................................................... 116
7.3.2Barcode Scanner Mode..................................................................................... 117
7.3.2.1 Homekit setup code scan example................................................ 119
7.3.3 Running the GUI PLT and Executing Tests....................................................... 124
7.3.4 Debug Console.................................................................................................. 126
7.3.5 DUT Log File...................................................................................................... 127
7.3.6 CSV File............................................................................................................. 128
7.4 CLI PLT Application .......................................................................................................... 129
7.4.1 CLI Introduction ................................................................................................. 129
7.4.2 CLI Commands.................................................................................................. 129
7.4.3 Running the CLI and Executing Tests............................................................... 131
7.4.4 Using CLI Commands as Arguments................................................................ 134
8Example Usage.......................................................................................................................... 135
Appendix A Top-view of PLT PCB Version D............................................................................... 142
Appendix B Electrical Schematics ................................................................................................ 143
Appendix C Hardware Modifications PLT Version D................................................................... 147
Appendix D Suggestions about Hardware and Cabling.............................................................. 149
Appendix E Hex2Bin ....................................................................................................................... 152
Appendix F Bin2Image.................................................................................................................... 154
Appendix G Automatic GU COM Port Find................................................................................... 155
Appendix H Improving Cabling between PLT and DUTs............................................................. 157
Appendix I Settings for DA14583 Internal SPI Flash Memory..................................................... 159
Appendix J Settings for DA14586 Internal SPI Flash Memory.................................................... 160
Appendix K Honeywell Xenon 1900 Barcode Scanner Setup..................................................... 161
Appendix L Program the Golden Unit SPI Flash Memory........................................................... 162

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
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Appendix M Connecting a Speaker to the Golden Unit for Audio Test ..................................... 163
Appendix N FTDI Driver Removal and Installation ...................................................................... 164
Appendix O DA1458x DK PRO Motherboard Connection........................................................... 165
Appendix P DA1468x DK PRO Motherboard Connection ........................................................... 166
Appendix Q Connecting DUT with Battery Supply ...................................................................... 167
Appendix R DUT Status Codes...................................................................................................... 168
Appendix S Golden Unit Status Codes ......................................................................................... 176
Revision History .............................................................................................................................. 179
Figures
Figure 1: Production Line Tool Hardware............................................................................................ 14
Figure 2: Production Line Tool Hardware Board Block Diagram ........................................................ 15
Figure 3: Top View of the PLT Hardware Board (Version C).............................................................. 16
Figure 4: PLT Hardware Power Connections...................................................................................... 16
Figure 5: Production Line Tool DUT Connections............................................................................... 17
Figure 6: CPLD UART Data Streams.................................................................................................. 18
Figure 7: CPLD XTAL Trim Pulse Data Stream.................................................................................. 19
Figure 8: CPLD UART Loopback Data Stream................................................................................... 19
Figure 9: Golden Unit .......................................................................................................................... 20
Figure 10: GU Reset Circuit ................................................................................................................ 21
Figure 11: VBAT DUT Current Measurement Setup........................................................................... 21
Figure 12: Connections for ‘Floating Current’ Measurements............................................................. 22
Figure 13: VPP Control Circuit Schematic .......................................................................................... 22
Figure 14: Location of the VPP Jumper J42........................................................................................ 23
Figure 15: Location of J46 Jumper...................................................................................................... 23
Figure 16: Location of J47 Jumper...................................................................................................... 23
Figure 17: J37 - GU Programming Jumper Schematics ..................................................................... 24
Figure 18: Location of J37 Jumper...................................................................................................... 24
Figure 19: PLT Functional Blocks ....................................................................................................... 25
Figure 20: Production Line Tool Software Block Diagram .................................................................. 26
Figure 21: DA1458x/DA1468x PLT Software Package Contents....................................................... 27
Figure 22: DA1458x Test Sequence ................................................................................................... 39
Figure 23: DA1468x Test Sequence ................................................................................................... 43
Figure 24: VBAT only .......................................................................................................................... 44
Figure 25: VBAT On with Reset .......................................................................................................... 45
Figure 26: VBAT as Reset................................................................................................................... 45
Figure 27: Custom Memory Data CSV File Example.......................................................................... 48
Figure 28: Golden Unit Scan Test....................................................................................................... 49
Figure 29: Golden Unit Scan Test Example Parameters .................................................................... 50
Figure 30: Binaries .............................................................................................................................. 51
Figure 31: “fw_files” Folder Contents .................................................................................................. 51
Figure 32: CFG PLT Startup Screen................................................................................................... 55
Figure 33: CFG PLT with Erroneous Configuration Parameter........................................................... 56
Figure 34: XSD Schema File Example................................................................................................ 58
Figure 35: Station Identification........................................................................................................... 59
Figure 36: Device IC............................................................................................................................ 59
Figure 37: Active DUTs ....................................................................................................................... 59
Figure 38: DUT COM Ports................................................................................................................. 60
Figure 39: Golden Unit COM Port ....................................................................................................... 60
Figure 40: VBAT/Reset Mode Selection.............................................................................................. 61
Figure 41: Statistics............................................................................................................................. 61
Figure 42: Test Options....................................................................................................................... 62
Figure 43: BD Address Assignment .................................................................................................... 63
Figure 44: Example for Load from File Mode...................................................................................... 64

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
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© 2017 Dialog Semiconductor
Figure 45: UART Boot Pins Setup - DA1458x..................................................................................... 65
Figure 46: UART Baud Rate - DA1458x ............................................................................................. 66
Figure 47: UART Programming GPIOs Setup - DA1458x .................................................................. 66
Figure 48: XTAL Trim - DA1458x........................................................................................................ 67
Figure 49: Golden Unit RF Tests - DA1458x....................................................................................... 68
Figure 50: BLE Tester General Settings - DA1458x ........................................................................... 69
Figure 51: BLE Tester TX Power - DA1458x ...................................................................................... 69
Figure 52: BLE Tester Frequency Offset - DA1458x .......................................................................... 70
Figure 53: BLE Tester Modulation Index - DA1458x........................................................................... 71
Figure 54: BLE Tester RX Sensitivity - DA1458x................................................................................ 72
Figure 55: Path Losses per DUT - DA1458x....................................................................................... 73
Figure 56: Current Measurement Tests - DA1458x ............................................................................ 74
Figure 57: GPIO/LED Tests - DA1458x .............................................................................................. 75
Figure 58: Audio Test.......................................................................................................................... 76
Figure 59: Sensor Test - DA1458x...................................................................................................... 77
Figure 60: Custom Test - DA1458x..................................................................................................... 78
Figure 61: Temperature Measurement Test - DA1458x ..................................................................... 78
Figure 62: Scan Test - DA1458x......................................................................................................... 79
Figure 63: OTP Memory - DA1458x.................................................................................................... 80
Figure 64: Different Image per DUT Folder Example.......................................................................... 81
Figure 65: SPI Flash Memory - DA1458x............................................................................................ 81
Figure 66: I2C EEPROM Memory - DA1458x..................................................................................... 83
Figure 67: Memory Read Test - DA1458x........................................................................................... 84
Figure 68: OTP Header - DA1458x..................................................................................................... 85
Figure 69: BD Address - DA1458x...................................................................................................... 87
Figure 70: Custom Memory Data - DA1458x...................................................................................... 88
Figure 71: UART Boot Pins Setup - DA1468x..................................................................................... 89
Figure 72: UART Baud Rate - DA1468x ............................................................................................. 89
Figure 73: XTAL Trim - DA1468x........................................................................................................ 90
Figure 74: Golden Unit RF Tests - DA1468x....................................................................................... 91
Figure 75: BLE Tester General Settings - DA1468x ........................................................................... 92
Figure 76: BLE Tester TX Power - DA1468x ...................................................................................... 93
Figure 77: BLE Tester Frequency Offset - DA1468x .......................................................................... 94
Figure 78: BLE Tester Modulation Index - DA1468x........................................................................... 95
Figure 79: BLE Tester RX Sensitivity - DA1468x................................................................................ 96
Figure 80: Path Losses per DUT - DA1468x....................................................................................... 97
Figure 81: Current Measurement Tests - DA1468x ............................................................................ 97
Figure 82: GPIO/LED Tests - DA1468x .............................................................................................. 99
Figure 83: Sensor Test - DA1468x.................................................................................................... 100
Figure 84: ADC Calibration - DA14681-00 (AD)................................................................................ 101
Figure 85: Custom Test - DA1468x................................................................................................... 102
Figure 86: Temperature Measurement Test - DA1468x ................................................................... 102
Figure 87: Scan Test - DA1468x....................................................................................................... 103
Figure 88: OTP Memory - DA1468x.................................................................................................. 104
Figure 89: QSPI Flash - DA1468x..................................................................................................... 105
Figure 90: Memory Read Test - DA1468x......................................................................................... 106
Figure 91: OTP Header - DA1468x................................................................................................... 107
Figure 92: OTP Header BD Address - DA1468x............................................................................... 108
Figure 93: OTP Header XTAL Trim - DA1468x................................................................................. 109
Figure 94: QSPI Header BD Address - DA1468x ............................................................................. 110
Figure 95: QSPI Header XTAL Trim - DA14681-00 only .................................................................. 110
Figure 96: Custom Memory Data - DA1468x.................................................................................... 111
Figure 97: Debug Settings................................................................................................................. 112
Figure 98: Security ............................................................................................................................ 113
Figure 99: GUI PLT Main Screen...................................................................................................... 114
Figure 100: GUI PLT Settings ........................................................................................................... 116
Figure 101: Barcode Scan Option in GUI PLT .................................................................................. 118
Figure 102: Barcode Scanner Controls............................................................................................. 118
Figure 103: Barcode Scan - BD Address Assignment ...................................................................... 118

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
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Figure 104: GUI PLT during Testing (1 of 2)..................................................................................... 124
Figure 105: GUI PLT During Testing (2 of 2) .................................................................................... 125
Figure 106: GUI PLT Tests Finished................................................................................................. 125
Figure 107: GUI PLT Retry Failed DUTs Message........................................................................... 126
Figure 108: Debug Console............................................................................................................... 126
Figure 109: DUT Log File.................................................................................................................. 127
Figure 110: CSV File......................................................................................................................... 128
Figure 111: CLI Software Start Screen ............................................................................................. 129
Figure 112: CLI PLT Print Settings (x Command)............................................................................. 131
Figure 113: CLI PLT DUT COM Port Enumeration ('p' Command)................................................... 132
Figure 114: CLI PLT Read and Compare BD Address in QSPI ('v' Command) ............................... 133
Figure 115: CLI PLT During Testing.................................................................................................. 133
Figure 116: CLI PLT Testing Finished............................................................................................... 133
Figure 117: CLI with Commands as Arguments................................................................................ 134
Figure 118: Top-view of PLT PCB Version D.................................................................................... 142
Figure 119: VBAT and VPP Control from CPLD............................................................................... 143
Figure 120: CPLD DUT UART Connections ..................................................................................... 143
Figure 121: CPLD FTDI and GU Control Connections ..................................................................... 144
Figure 122: FTDI Chip for USB UART to DUTs 1, 2, 3 and 4........................................................... 144
Figure 123: Quad USB HUB ............................................................................................................. 145
Figure 124: Golden Unit - Dedicated USB Port and FTDI Chip........................................................ 145
Figure 125: Golden Unit - GU LED and SPI Flash Memory.............................................................. 146
Figure 126: VBAT_DUT and VDDIO Supplies.................................................................................. 146
Figure 127: GU Supply and VPP Generation.................................................................................... 146
Figure 128: DA14580_RD_tester Version D ..................................................................................... 147
Figure 129: Jumper J47 Added Next to Golden Unit Socket ............................................................ 147
Figure 130: R365 (10 k) Added Next to Reset Button.................................................................... 147
Figure 131: R365, J47 and RESET Shown in Electrical Schematic ................................................. 148
Figure 132: Possible Solution of Antenna on Cable and Fixed Radius of DUTs to Antenna............ 149
Figure 133: Possible Solution of Antenna on Cable and DUTs Put in Line ...................................... 150
Figure 134: Example Locations and RSSI Readouts of Horizontal Antenna.................................... 150
Figure 135: Hex2Bin Example Directory with Files........................................................................... 152
Figure 136: Hex2Bin.exe Example.................................................................................................... 153
Figure 137: Bin2Image Example Directory with Files ....................................................................... 154
Figure 138: Bin2Image Example....................................................................................................... 154
Figure 139: Example of Twisted Pair Cable with 4 Pairs and Ferrite................................................ 157
Figure 140: Location of Pull-Down Resistors.................................................................................... 157
Figure 141: Anti-Ringing Solution...................................................................................................... 158
Figure 142: Pin Assignment of DA14583 - QFN40 ........................................................................... 159
Figure 143: Pin Assignment of DA14586 - QFN40 ........................................................................... 160
Figure 144: Speaker Connection for Audio Test............................................................................... 163
Tables
Table 1: DA1458x_DA1468x_PLT_v4.2 added features.................................................................... 13
Table 2: Power Supply Requirements................................................................................................. 17
Table 3: PLT Connections to Applications .......................................................................................... 17
Table 4: Jumpers................................................................................................................................. 21
Table 5: PLT User Interface Application Executables......................................................................... 26
Table 6: Executables Folder Description............................................................................................. 27
Table 7: Production Line Tool Prerequisites ....................................................................................... 29
Table 8: Minimum System Requirements ........................................................................................... 30
Table 9: Opening the PLT Visual Studio 2015 Express Source Code Solution.................................. 31
Table 10: DA1458x_DA1468x_CFG_PLT.exe Application Execution................................................ 32
Table 11: DA1458x_DA1468x_GUI_PLT.exe Application Execution ................................................. 35
Table 12: DA1458x_DA1468x_CLI_PLT.exe Application Execution.................................................. 36
Table 13: DA1458x Test Sequence .................................................................................................... 36
Table 14: DA1468x Test Sequence .................................................................................................... 40

UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
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Table 15: Custom Memory Data Input Modes..................................................................................... 46
Table 16: Homekit Setup Code Format............................................................................................... 47
Table 17: Homekit Setup Code Checksum Algorithm......................................................................... 47
Table 18: CFG PLT Main Menu Options............................................................................................. 56
Table 19: CFG PLT Bottom Strip Options........................................................................................... 56
Table 20: XML File Parts..................................................................................................................... 57
Table 21: Station Identification............................................................................................................ 59
Table 22: Device IC............................................................................................................................. 59
Table 23: Active DUTs......................................................................................................................... 59
Table 24: DUT COM Ports .................................................................................................................. 60
Table 25: Golden Unit COM Port ........................................................................................................ 60
Table 26: VBAT/Reset Mode............................................................................................................... 61
Table 27: Statistics .............................................................................................................................. 61
Table 28: Test Options........................................................................................................................ 62
Table 29: BD Address Assignment - Standard Mode ......................................................................... 64
Table 30: BD Address Assignment Options - Range Mode................................................................ 64
Table 31: BD Address Assignment Options - Load from File Mode.................................................... 65
Table 32: BD Address Assignment Options - Scan Mode .................................................................. 65
Table 33: UART TX-RX Pins - DA1458x............................................................................................. 66
Table 34: UART Baud Rate - DA1458x............................................................................................... 66
Table 35: UART Programming GPIOs Setup - DA1458x.................................................................... 67
Table 36: XTAL Trim - DA1458x ......................................................................................................... 67
Table 37: Golden Unit RF Tests - DA1458x........................................................................................ 68
Table 38: BLE Tester General Settings - DA1458x ............................................................................ 69
Table 39: BLE Tester TX Power - DA1458x........................................................................................ 70
Table 40: BLE Tester Frequency Offset - DA1458x............................................................................ 70
Table 41: BLE Tester Modulation Index - DA1458x............................................................................ 71
Table 42: BLE Tester RX Sensitivity - DA1458x................................................................................. 72
Table 43: Path Losses per DUT from RF Tests DA1458x Options..................................................... 73
Table 44: Current Measurement Tests - DA1458x ............................................................................. 74
Table 45: Current Measurement for each Sleep State........................................................................ 75
Table 46: GPIO/LED Tests - DA1458x................................................................................................ 76
Table 47: Audio Test ........................................................................................................................... 76
Table 48: Sensor Tests - DA1458x..................................................................................................... 77
Table 49: Custom Tests - DA1458x .................................................................................................... 78
Table 50: Temperature Measurement Test - DA1458x....................................................................... 78
Table 51: Scan Test DA1458x Options............................................................................................... 79
Table 52: OTP Memory - DA1458x..................................................................................................... 80
Table 53: SPI Pin Setup - DA1458x.................................................................................................... 81
Table 54: SPI Flash Erase - DA1458x ................................................................................................ 82
Table 55: SPI Flash Image Write - DA1458x ...................................................................................... 82
Table 56: I2C Pin Setup - DA1458x .................................................................................................... 83
Table 57: I2C EEPROM Image Write - DA1458x................................................................................ 83
Table 58: Memory Read Test - DA1458x............................................................................................ 84
Table 59: OTP Header - DA1458x ...................................................................................................... 85
Table 60: BD Address - DA1458x ....................................................................................................... 87
Table 61: Custom Memory Data - DA1458x ....................................................................................... 88
Table 62: UART TX-RX Pins - DA1468x............................................................................................. 89
Table 63: UART Baud Rate - DA1468x............................................................................................... 90
Table 64: XTAL Trim - DA1468x ......................................................................................................... 90
Table 65: Golden Unit RF Tests - DA1468x........................................................................................ 91
Table 66: BLE Tester General Settings - DA1468x ............................................................................ 92
Table 67: BLE Tester TX Power - DA1468x........................................................................................ 93
Table 68: BLE Tester Frequency Offset - DA1468x............................................................................ 94
Table 69: BLE Tester Modulation Index - DA1468x............................................................................ 95
Table 70: BLE Tester RX Sensitivity - DA1468x................................................................................. 96
Table 71: Path Losses per DUT from RF Tests DA1468x Options..................................................... 97
Table 72: Current Measurement Tests - DA1458x ............................................................................. 98
Table 73: Current Measurement for each Sleep State........................................................................ 98

UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
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Table 74: GPIO/LED Tests - DA1468x................................................................................................ 99
Table 75: Sensor Tests - DA1468x................................................................................................... 100
Table 76: ADC Calibration - DA14681-00 (AD)................................................................................. 101
Table 77: Custom Tests DA1468x Options....................................................................................... 102
Table 78: Temperature Measurement Test - DA1468x..................................................................... 102
Table 79: Scan Test DA1468x Options............................................................................................. 103
Table 80: OTP Memory - DA1468x................................................................................................... 104
Table 81: QSPI Flash Erase - DA1468x............................................................................................ 105
Table 82: QSPI Flash Image Write - DA1468x.................................................................................. 105
Table 83: Memory Read Test - DA1468x.......................................................................................... 106
Table 84: General - OTP Header DA1468x Options......................................................................... 107
Table 85: OTP Header BD Address - DA1468x................................................................................ 108
Table 86: OTP Header XTAL Trim - DA1468x.................................................................................. 109
Table 87: QSPI Header BD Address - DA1468x............................................................................... 110
Table 88: QSPI Header XTAL Trim - DA14681-00 only.................................................................... 110
Table 89: Custom Memory Data - DA1468x ..................................................................................... 111
Table 90: Debug Settings.................................................................................................................. 113
Table 91: Security Options................................................................................................................ 113
Table 92: GUI PLT Main Screen Description.................................................................................... 114
Table 93: GUI PLT Settings............................................................................................................... 116
Table 94: Homekit setup code scan example ................................................................................... 119
Table 95: CLI Commands.................................................................................................................. 129
Table 96: DA14580 PLT Example Usage ......................................................................................... 135
Table 97: RF Test RSSI Results ....................................................................................................... 150
Table 98: FTDI "DialogSemi" Serial Number .................................................................................... 155
Table 99: DA14583 Internal SPI Flash Connections......................................................................... 159
Table 100: DA14586 Internal SPI Flash Connections....................................................................... 160

UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
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1 Terms and Definitions
API Application Programming Interface
BD Bluetooth Device
.bin Firmware files in binary format
BLE Bluetooth low energy
CFG Configuration
CLI Command Line Interface
COM Communication port
CPLD Complex Programmable Logic Device
CSV Comma Separated Values
DLL Dynamic Link Library
DMA Direct Memory Access
DMM Digital Multimeter
DTM Direct Test Mode (as specified by the BLE Core standard)
DUT Device Under Test
DVM Digital Voltage Meter
EEPROM Electrically Erasable Programmable Read-Only Memory
.exe Executable file
FTDI Future Technology Devices International Ltd.
GPIO General Purpose Input-Output
GU Golden Unit
GUI Graphical User Interface
Hex Firmware file in ASCII format
HW hardware
IC Integrated Circuit
IDE Integrated Development Environment
I2C Inter-Integrated Circuit
JTAG Joint Test Action Group
OS Operating System
OTP One Time Programmable (memory)
PC Personal Computer
PCB Printed circuit board
PLT Production Line Tool
PLTD Production Line Tool DLL
RAM Random Access Memory
RCX Resistor Crystal Oscillator
RF Radio Frequency
RX Receive
SCPI Standard Commands for Programmable Instruments
SoC System on Chip
SDK Software Development Kit
SPI Serial Peripheral Interface
SW Software
TX Transmit
UART Universal Asynchronous Receiver/Transmitter
UI User Interface
USB Universal Serial Bus

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User Manual
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VISA Virtual Instrument Software Architecture
VPP Programming supply voltage (pin)
XML Extensible Markup Language
XTAL Crystal
XSD XML Schema Definition

UM-B-041
DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
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© 2017 Dialog Semiconductor
2 References
[1] UM-B-040, DA1458x/DA1468x Production Line Tool, User manual, Dialog Semiconductor.
[2] UM-B-014, DA1458x Bluetooth Smart Development Kit - Expert, User Manual, Dialog
Semiconductor
[3] FT4232H –Hi-Speed Quad USB UART IC, FTDI Chip.
[4] FT232 –USB UART IC, FTDI Chip
[5] Anritsu MT8852B, https://www.anritsu.com/en-US/test-measurement/products/mt8852b
[6] Keysight 34401A, http://www.keysight.com/en/pd-1000001295%3Aepsg%3Apro-pn-
34401A/digital-multimeter-6-digit?cc=US&lc=eng
[7] Keithley 2000, http://www.tek.com/tektronix-and-keithley-digital-multimeter/keithley-2000-series-
6%C2%BD-digit-multimeter-scanning
[8] Papouch TMU USB thermometer, https://www.papouch.com/en/shop/product/tmu-usb-
thermometer/
[9] NI USB TC-01, http://sine.ni.com/nips/cds/view/p/lang/en/nid/208177
[10] Honeywell Xenon 1900, https://www.honeywellaidc.com/products/barcode-scanners/general-
duty/xenon-1900g-1902g
[11] Zebra/Motorola LS2208, https://www.zebra.com/us/en/products/scanners/general-purpose-
scanners/handheld/ls2208.html
[12] AN-B-020, DA14580 End product testing and programming guidelines, Application Note, Dialog
Semiconductor
[13] Litepoint IQXel-M, http://www.litepoint.com/test-solutions-for-manufacturing/iqxel-m/
[14] NI USB-6009 DAQ, http://sine.ni.com/nips/cds/view/p/lang/en/nid/201987
[15] Keysight 34461A, http://www.keysight.com/en/pd-2270273-pn-34461A/digital-multimeter-6-digit-
34401a-replacement-truevolt-dmm?cc=GR&lc=eng

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DA1458x/DA1468x Production Line Tool
User Manual
Revision 4.2
10-Oct-2017
CFR0012
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© 2017 Dialog Semiconductor
3 New version features
This manual explains the usage of the 16 channel DA1458x/DA1468x Production Line Tool (PLT). It
refers to the DA1458x_DA1468x_PLT_v4.2 software release, which compared to
DA1458x_DA1468x_PLT_v4.1 has the added features illustrated in Table 1.
Table 1: DA1458x_DA1468x_PLT_v4.2 added features
#
Features
Description
1
DA14682/3, DA15100/1
are now supported.
Supports the new DA14682/3 and DA15100/1 chipset with all the memory
and production tests that the DA1681 (AE) supports (for the DA15100/1
devices only the BLE path is supported).
2
DA14585/586 audio
testing.
DA1485/6 devices now support audio testing.
3
Production test firmware
faster download time for
the DA14681/2/3 and
DA15100/1 devices.
DA14681/2/3 and DA15100/1 production test firmware can now be
downloaded through the uartboot.bin firmware in 1Mbaud and reduce the
total download time.
4
Improved current
measurements.
In case of failure, the PLT switches off the devices one by one until the
failed DUT is found.

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4 Introduction
By using the PLT it is possible to test, calibrate and load firmware for 16 different devices under test
(DUTs) in parallel.
The following are deliverable parts of the tool.
●Hardware
○Main board (Figure 1) together with a DA14580-QFN48 Golden Unit.
○Electrical schematics of the main board.
○Gerber files of the main board.
○Bill of Materials of the main board.
●Software
○Source code files organized in a Microsoft® Visual Studio Express 2015 solution.
○Application executables and required DLLs.
●Documents.
An example of a sequence of actions the tool performs is given below. All of the actions are
performed in parallel for up to 16 devices.
1. Download the production test firmware (e.g. prod_test_580.bin).
2. Perform automatic crystal (XTAL) trimming.
3. Perform RF RSSI test.
4. Download and burn the customer firmware (into OTP, SPI flash, QSPI flash or I2C EEPROM)
5. Burn the OTP header.
6. Perform Scan test. Reset the DUTs and set the GU to scan for the DUT BLE advertisements.
Figure 1: Production Line Tool Hardware

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5 Hardware
5.1 Hardware Block Diagram
The Production Line Tool hardware consists of various blocks, as illustrated in
Figure 2.These blocks are explained below.
●Blue blocks: USB-to-UART interfaces.
○Four FT4232 FTDI QUAD USB-to-UART interfaces are used for a 16 channel USB-to-UART
conversion.
○The GU is connected to the PC via an FT232 FTDI USB-to-UART interface.
●Red block: A CPLD that has the following purpose.
○Switch UART signals between the PC USB-UART and DUTs.
○Switch DUTs VBAT signal
○Switch DUTs VPP signal (only when VBAT is enabled).
○Produce Reset signal to the DUTs.
○Produce 500 ms XTAL calibration pulse.
●Orange block: A Golden Unit (GU) is mounted, which has the following functionality:
○CPLD control using custom commands.
○Transceiver for Bluetooth RF signals to and from the DUTs.
○Produce an audio tone using PWM, used for audio testing.
○Scan for device BLE advertisements, after the customer firmware has been programmed.
●Purple blocks: Sixteen (16) device connectors.
Figure 2: Production Line Tool Hardware Board Block Diagram
USB HUB
FT4232
FT4232 FT4232 FT4232
CPLD
Golden Unit
USB Cable 2
FT232
USB Cable 1
Production Line Tool Hardware
URX/UTX
URX/UTX
URX/UTX
URX/UTX
4x URX/UTX 4x URX/UTX
4x URX/UTX
4x URX/UTX
Control &
Commands
URX/UTX
DUT1 DUT2 DUT3 DUT16
VPP Enable
VBAT Enable
XTAL trim pulse

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5.2 Printed Circuit Board Layout
In Figure 3 the top view of the PLT board is illustrated. The important parts are pointed by the orange
boxes. The VPP jumper and the Current jumper are colored in blue.
The Golden Unit has a DA14580 QFN48-die soldered. Most of the 48 pins are basically used to
connect to the CPLD. The CPLD is programmed during the production of the PLT board via the
CPLD socket. No need for the users to use the CPLD socket.
The black banana sockets are all connected to the same ground (GND) plane.
Figure 3: Top View of the PLT Hardware Board (Version C)
5.3 PLT Power Supply
External power supply is needed for the PLT to run. This should be connected to the banana sockets
as shown in Figure 4.
Table 2 shows the voltage and current requirements for each power supply. The blue banana
sockets can be used for device current measurements.
Figure 4: PLT Hardware Power Connections
USB/UART
for DUTs
4xFTDI
USB/UART
VBAT
VDDIO
5V
USB/UART
for GU
GU JTAG
Golden
Unit
Antenna or
SMA cable
CPLD
GU reset
VPP
adjust
VPP
jumper
Current
jumper
16x DUTs
CPLD prog.
socket
CURRENT
CURRENT
GND
VBAT
GND
VDDIO
GND
VDD 5V

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Table 2: Power Supply Requirements
Power Supply
Voltage (V)
Current (mA)
Buck Mode
Boost Mode
VBAT
2.4 … 3.3
16 x 20
n.a.
VDDIO
2.4 … 3.3
70
n.a.
VDD 5V
4.75 … 5.25
~335
~335
VPP
6.6 … 6.8
16 x 2
16 x 2
5.4 DUT Connector
The BLE devices are connected to the PLT using the DUT1-16 connectors at the edge of the PLT
board. Figure 5 shows the pin-header connections from the Production Line Tool hardware board to
the DUTs. Table 3 describes the purpose of each pin.
Figure 5: Production Line Tool DUT Connections
Table 3: PLT Connections to Applications
Header Pin
Name
Description
1
VBAT
Depending on the VBAT/Reset Signals Operation mode this can be used as
Voltage supply for the DUT or as Reset signal. Due to this connection, no
external power supply is needed for the DUTs. This pin must be connected if
there is no other power supply (e.g. battery).
2
XTAL
Calibration
Pulse
This pin can be used as a reference pulse during the automatic crystal
calibration. More details are given in 7.2.6.1 for DA1458x devices and in 7.2.10.1
for DA1468x devices. The crystal trim pulse can also be supplied in the UART
RX device pin. This is the most common scenario. However, there may be
hardware limitations where the UART RX pin cannot be used. In such cases the
particular PLT header pin is used.
6
GND
Ground pin. This pin must be connected.
7
DUT TX
This is connected to the device UART TX pin. This pin must be connected.
8
VPP
This pin provides the 6.8V required to program the OTP in the DA14580/1/2/3
devices.
Note: This option is not available with the VBAT as Reset mode.
Production Line Tool
1 2
3 4
5 6
7 8
9 10
XTAL Calibration
Pulse
not used
GND
VPP
RST
VBAT
not used
not used
DUT TX
DUT RX
(pinning 100 mil)
VBAT
DUT TX
DUT RX
VPP
GND
DUT
Only DA14580/1/2/3
RST

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User Manual
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Header Pin
Name
Description
9
DUT RX
This is connected to the device UART RX pin. This pin can also provide the
crystal calibration reference pulse for the automatic crystal (XTAL) trim
procedure, as described in 7.2.6.1 for DA1458x devices and in 7.2.10.1 for
DA1468x devices. This pin must be connected.
10
RST
The reset signal must be connected if battery powered devices are used.
5.5 Data Streaming
Figure 6, Figure 7 and Figure 8 illustrate the three possible data streams through the CPLD. The
CPLD switches S1, S2, S3 and S4 are controlled by the software via the Golden Unit.
Normal Operation (Figure 6):
UART-RxD data is transported via the RED arrows (AA):
PC USB USB HUB Quad UART CPLD signal ‘AA’ DUT RxD (programmed as RxD).
UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
Figure 6: CPLD UART Data Streams
Crystal Trimming (Figure 7):
The XTAL calibration pulse (500 ms) is transported via the PURPLE arrows (CC):
CPLD TIMER Tg CPLD S4 DUT RxD (programmed as GPIO).
UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
AA
BB
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports

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Figure 7: CPLD XTAL Trim Pulse Data Stream
Loopback Operation (Figure 8):
Loopback operation is used during the start of the tests. The PC PLT software uses this feature to
automatically find the numbers of the Virtual COM ports in the Windows PC.
The UART loopback data is transported via the GREEN arrows (DD):
PC USB USB HUB Quad UART CPLD signal ‘DD’ SW1 Quad UART USB HUB 
USB PC.
Figure 8: CPLD UART Loopback Data Stream
Note: The CPLD is also used to switch the UART signals between the QUAD FTDIs and the DUTs.
When the VBAT is switched off and the UART wires are not disconnected, a ‘rest voltage’ may be
present on the product. This could cause problems with the Power On Reset (POR) and the product
might not boot correctly. The CPLD will switch off the UART signals when the VBAT is not present.
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
BB
CC
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1
S2
S3
S4
DD
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports

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User Manual
Revision 4.2
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© 2017 Dialog Semiconductor
5.6 Golden Unit
Figure 9: Golden Unit
The Golden Unit (GU) is a 'daughter' board mainly used in the Expert Development Kit [2]. In the
PLT, the GU is used for various purposes:
●RF transmitter for the RF RSSI DUT test.
●RF Receiver for the device BLE advertisement scan test.
●Audio tone generator for the audio test.
●Controlling the CPLD.
The GU uses an SPI Flash memory mounted on the PLT board. The SPI Flash is pre-programmed
with a specific production test firmware. If required, there are several ways to upgrade the GU
firmware, either via the PLT’s GU JTAG connector or via the UART. The latest GU firmware can be
found inside the latest PLT software release, under the executables\binaries\GU folder.
Note: PLT v4.1 and onwards requires the latest firmware version of the Golden Unit. If the Golden
Unit firmware is not updated then the PLT applications will not run.
Note: The Golden Unit is calibrated during PLT production. It is delivered with a calibration
characterization document.
5.6.1 GU Reset
The Golden Unit includes a hardware reset circuit. The GU reset signal is connected to an FTDI
FT232 GPIO pin.
Figure 10 illustrates the electrical schematics of the GU reset circuit. Section 5.8.3 illustrates the
jumper positions on the PLT PCB.
The red line is the connection between the FTDI IC GPIO pin (DTR) and the GU reset signal on the
PLT GU connector header. The PLT software controls this pin via the FTDI DLL driver ftd2xx.dll.
Making pin DTR low for a short period of time will reset the GU. Every time the PLT tests start, a
hardware reset is issued to the Golden Unit. Jumper J47 should be ON and J46 OFF for this reset
method to operate.