Diamond Systems ELEKTRA FD-64 User manual

GF
ELEKTRA™
High Integration CPU
with Ethernet and Data Acquisition
User Manual Revision 1.01
Document # 7650530
Copyright ©2005
Diamond Systems Corporation
8430-D Central Ave.
Newark, CA 94560
Tel [phone]
www.diamondsystems.com

Elektra CPU User Manual V1.00 Page 2
ELEKTRA High-Performance Rugged Embedded CPU with Data Acquisition
TABLE OF CONTENTS
1. DESCRIPTION ..................................................................................................................................5
2. FEATURES.......................................................................................................................................6
3. ELEKTRA BOARD DRAWING.........................................................................................................9
4. I/O HEADERS .....................................................................................................................................10
4.1 PC/104 Bus Connectors ............................................................................................................10
4.2 Main I/O Connector – J3...........................................................................................................11
Input Power – J11.................................................................................................................................14
4.3 Output Power – J12...................................................................................................................15
4.4 Ethernet – J4.............................................................................................................................15
4.5 USB – J5 (USB 0/1)...................................................................................................................15
4.6 Watchdog Features – J6............................................................................................................17
4.7 IDE Drive – J8..........................................................................................................................17
4.8 Data Acquisition I/O Connector – J14 (Models with Data Acquisition only)...........................18
4.9 Auxiliary Serial Port Connector – J15......................................................................................19
4.10 Autocal connector J17...............................................................................................................19
5. JUMPER SETTINGS........................................................................................................................20
5.1 System Configuration J10 .........................................................................................................20
5.2 J13: Data Acquisition Circuit Configuration............................................................................22
5.3 J6: Watchdog Timer & System Recovery ..................................................................................23
6. SYSTEM FEATURES.......................................................................................................................24
6.1 System Resources ......................................................................................................................24
6.2 COM Port / FPGA / Watchdog Control Registers ....................................................................25
6.3 Console Redirection to a Serial Port.........................................................................................26
6.4 Flash Memory ...........................................................................................................................27
6.5 Backup Battery..........................................................................................................................27
6.6 System Reset..............................................................................................................................27
7. BIOS.............................................................................................................................................28
7.1 BIOS Settings ............................................................................................................................28
7.2 BIOS Console Redirection Settings...........................................................................................30
8. SYSTEM I/O...................................................................................................................................31
8.1 Ethernet.....................................................................................................................................31
8.2 Serial Ports................................................................................................................................31
8.3 PS/2 Ports..................................................................................................................................32
8.4 USB Ports..................................................................................................................................32
9. NOTES ON OPERATING SYSTEMS AND BOOTING PROCEDURES .................................................33
9.1 Windows Operating Systems Installation Issues .......................................................................33
9.1.1 Driver installation .....................................................................................................................................33
9.1.2 BIOS Settings for Windows......................................................................................................................33
9.1.3 CompactFlash Under Windows.................................................................................................................33
9.2 DOS Operating Systems Installation Issues..............................................................................34
10. DATA ACQUISITION CIRCUIT –I/O MAP AND REGISTER DESCRIPTIONS ........................................35
10.1 Base Address.............................................................................................................................35
10.2 Data Acquisition Circuit Register Map.............................................................................37
10.3 Register Bit Definitions.............................................................................................................39
10.3.1 Page 0: Counter/Timer Access................................................................................................................49
10.3.2 Page 1: auto calibration registers ............................................................................................................52
10.3.3 Page 2: Expanded FIFo and jumper over ride.........................................................................................55
11. ANALOG-TO-DIGITAL INPUT RANGES AND RESOLUTION ...............................................................57
11.1.1 Overview.................................................................................................................................................57
11.2 Input Range Selection........................................................................................................57
11.3 Input Range Table..............................................................................................................57
12. PERFORMING AN A/D CONVERSION.............................................................................................58
12.1 Select the input channel.............................................................................................................58
12.2 Select the input range................................................................................................................58

Elektra CPU User Manual V1.00 Page 3
12.3 Wait for analog input circuit to settle........................................................................................58
12.4 Perform an A/D conversion on the current channel..................................................................59
12.5 Wait for the conversion to finish ...............................................................................................59
12.6 Read the data from the board....................................................................................................59
12.7 Convert the numerical data to a meaningful value ...................................................................60
13. A/D SCAN,INTERRUPT,AND FIFO OPERATION .............................................................................61
13.1 ELEKTRA A/D Operating Modes..............................................................................................62
14. ANALOG OUTPUT RANGES AND RESOLUTION................................................................................63
14.1 Description................................................................................................................................63
14.2 Resolution..................................................................................................................................63
14.3 Output Range Selection.............................................................................................................63
14.4 D/A Conversion Formulas and Tables......................................................................................64
15. GENERATING AN ANALOG OUTPUT...............................................................................................66
15.1 Compute the D/A code for the desired output voltage...............................................................66
15.2 Write the value to the selected output channel..........................................................................66
15.3 Wait for the D/A to update ........................................................................................................66
16. ANALOG CIRCUIT CALIBRATION..............................................ERROR!BOOKMARK NOT DEFINED.
16.1 A/D bipolar offset.........................................................................Error! Bookmark not defined.
16.2 A/D unipolar offset.......................................................................Error! Bookmark not defined.
16.3 A/D full-scale ...............................................................................Error! Bookmark not defined.
16.4 D/A full scale................................................................................Error! Bookmark not defined.
17. ANALOG CIRCUIT CALIBRATION RESOURCES ................................................................................67
17.1 Analog Circuit Calibration Procedures....................................................................................68
17.2 Using EEPROM ........................................................................................................................69
17.2.1 Reading Value from EEPROM...............................................................................................................69
17.2.2 Writing value to EEPROM .....................................................................................................................69
18. DIGITAL I/O OPERATION ...............................................................................................................70
19. COUNTER/TIMER OPERATION.......................................................................................................71
19.1 Counter 0 – A/D Sample Control ..............................................................................................71
19.2 Counter 1 – Counting/Totalizing Functions..............................................................................71
19.3 Command Sequences.................................................................................................................72
20. WATCHDOG TIMER PROGRAMMING..............................................................................................74
20.1 Watchdog Timer........................................................................................................................74
20.2 Watchdog Timer Register Details .............................................................................................75
20.3 Example : Watchdog Timer With Software Trigger ..................................................................77
20.4 Example : Watchdog Timer With Hardware Trigger................................................................77
21. DATA ACQUISITION SPECIFICATIONS............................................................................................78
22. FLASHDISK MODULE.....................................................................................................................79
22.1 Installing the Flashdisk Module................................................................................................79
22.2 Configuration.......................................................................................................................79
22.3 Using the Flashdisk with Another IDE Drive...................................................................79
22.4 Power Supply......................................................................................................................79
23. FLASH DISK PROGRAMMER BOARD .............................................................................................80
24. I/O CABLES ...................................................................................................................................81
25. QUICK START GUIDE .....................................................................................................................82
25.1 General Setup............................................................................................................................82
25.2 IDE Configuration.....................................................................................................................82
25.3 Booting into MS-DOS, FreeDOS or ROM-DOS .......................................................................83
25.4 Booting into Linux or Microsoft Windows ................................................................................83
TABLES
Table 1: J1,J2 – PC/104 Connector Pinouts ..................................................................................10
Table 2: J3 – Main I/O Connector...................................................................................................12
Table 3: J11 – Input Power Connector Pinout................................................................................14

Elektra CPU User Manual V1.00 Page 4
Table 4: J12 – Output Power Connector Pinout.............................................................................15
Table 5: J4 – Ethernet Connector Pinout .......................................................................................15
Table 6: J5 – USB Connector Pinout..............................................................................................15
Table 7: J6 – Watchdog Connector Pinout.....................................................................................17
Table 8: J8 – IDE Drive Connector Pinout......................................................................................17
Table 9: J14 – Data Acqisition Connector Pinout...........................................................................18
Table 10: J15 – Auxilliary Serial Port Connector............................................................................19
Table 11: J17 – Autocal connector.................................................................................................19
Table 12: System Resources .........................................................................................................24
Table 13: I/O COM3/4 Control Register Definition .........................................................................25
Table 14: J11 – Ethernet Connector...............................................................................................31
Table 15: COM PORT Default Resource Listing............................................................................31
Table 16: Data Acquisition : Analog Input Range...........................................................................57
Table 17: A/D Operating Modes.....................................................................................................62
Table 18: Calibration Control Signal Listing ...................................................................................67
Table 19: Calibration Multiplexed Signal Control............................................................................67
Table 20: Trim-DAC (AD8801) Outputs..........................................................................................68
Table 21: I/O COM3/4 Control Register Definition .........................................................................74
Table 22: Cable Kit C-ELK-KIT Contents....................................................................................81
FIGURES
Figure 1 : ACC-IDEEXT FlashDisk Programmer Board.................................................................80
Figure 2 : Cable Kit C-ELK-KIT....................................................................................................81

Elektra CPU User Manual V1.00 Page 5
ELEKTRA High-Performance Rugged Embedded CPU with Data Acquisition
1. DESCRIPTION
ELEKTRA is an embedded CPU board in standard PC/104formfactor that integrates acomplete
embedded PC, consisting of the following subsystems onto a single compact board:
♦CPU
♦Core PC Chipset (including memory controller, PCI interface, and ISA interface)
♦128 MB system memory
♦10/100 Ethernet
♦Analog and Digital I/O
A detailed list of features is shown on the next page.
The single board ELEKTRA computer is a Pentium II class device with onboard central
processing, memory and memory management devices and I/O management for specific
functions. It conforms to the PC/104 standard, an embedded standard that is based on the ISA
and PCI buses and provides a compact, rugged mechanical design for embedded systems.
PC/104modulesfeatureapin and socket connection system in placeof card edge connectors, as
well as mounting holes in each corner. Theresult is an extremelyrugged computer system fit for
mobile and miniature applications. PC/104 modules stack together with 0.6” spacing between
boards(0.662”pitch including the thickness ofthePCB).Thecomputercommunicatesexternally
via an ISA bus as well as thespecified I/O ports. The single board computer is powered from an
externally regulated +5VDC (+/-5%) supply.
For more information on PC/104, visit www.pc104.org.
Elektra uses the PCI bus internally to connect the Ethernet circuit to the processor. It uses the
ISA bus internally to connect serial ports 3 and 4, as well as the data acquisition circuit, to the
processor. Only the ISA bus isbrought out toexpansion connectorsfor the connection of add-on
boards. Diamond Systems manufactures a wide variety of compatible PC/104 add-on board for
analog I/O, digital I/O, counter/timer functions, serial ports, and power supply.
The Elektra is mean to be a direct replacement upgrade for the Prometheus and is backwards
compatible.

Elektra CPU User Manual V1.00 Page 6
2. FEATURES
Processor Section
♦STPC Vega processor running at 200MHz
♦Pentium II class platform with MMX including SDRAM, IDE controller and USB
Core System
♦128MB SDRAM system memory (standard)
♦100MHz memory bus
♦2MB 16-bit wide integrated flash memory for BIOS and user programs
I/O
♦4 RS-232 serial ports
♦2 ports 16550-compatible, 115.2kbaud max
♦2 ports 16850-compatible with 128-byte FIFOs, 460kbaud max
♦2 USB 1.1 ports
♦IDE drive connectors; 44 pin notebook drive connection
♦Accepts solid-state flash disk module directly on board
♦10/100 BaseT full-duplex PCI bus mastering Ethernet (100Mbps or 10Mbps)
♦Infra Red port support (requires external transceiver, not included)
♦PS/2 keyboard and mouse ports
♦LEDs
System Features
♦Plug and play BIOS with IDE auto detection, 32-bit IDE access, and LBA support
♦User-selectable console redirection terminal mode on either COM1 or COM2
♦On-board lithium backup battery for real-time-clock and CMOS RAM
♦ATX power switching capability
♦Programmable watchdog timer
♦Extended temperature range operation (-40 to +85oC)

Elektra CPU User Manual V1.00 Page 7
Data Acquisition Subsystem
Analog Input
♦16 single-ended / 8 differential inputs, 16-bit resolution
♦100KHz maximum aggregate A/D sampling rate
♦Programmable input ranges/gains: +/-10V, +/-5V, +/-2.5V, +/-1.25V, 0-10V, 0-5V, 0-2.5V
♦5 ppm/oC typical drift accuracy when using auto calibration. Not more than +/-10ppm/oC
worse case drift accuracy when using auto calibration across the specified temperature
range.
♦Over voltage protection ±35V on any analog input without damage
♦Non-linear error max ±3LSB
♦Input impedance >= 100Mohm
♦Input capacitance <= 150pF
♦No missing codes (A/D Conversion)
♦Cross talk between non-adjacent channels <= +/-1LSB
♦Cross talk between adjacent channel <= +/-4LSB
♦Noise level at inputs <= +/-2LSB input RMS voltage equivalent
♦Common mode rejection of differential modes >= 70dB
♦Internal and external A/D triggering
♦A/D FIFO of 512 samples (1024bytes) for reliable high-speed sampling and scan operation
Analog Output
♦4 analog outputs, 12-bit resolution
♦±10V and 0-10V output ranges
♦Settling time to +/-0.012% <=10uS
♦Channel to channel matching <= +/-1LSB
♦Fullscale accuracy of <=+/-1LSB when using auto calibration
♦Not more than +/-10ppm/oC worse case drift accuracy when using autocalibration over the
specified temperature range
♦Linearity error <= +/-1LSB
♦Maximum output load capacitance 500pF
♦Maximum output current +/-5mA
♦Indefinite short circuit protection on outputs
Auto Calibration
♦On board 2404 I2C flash EEROM for storage of auto calibration values
Simplified DAQ Jumper Block
♦J13 location has been reduced to 3 locations only. This increases reliability and ease of
configuration:
♦Location 1: AD Single-Ended/Differential
♦Location 2: AD Unipolar/Bipolar
♦Location 3: DA Unipolar/Bipolar
Software A/D SingleEnded/Differential and Unipolar/Bipolar Programming
♦SE/DIFF line of FPGA in Prometheus is input only. In new design making this line as an
output overwrites jumper selection and programs AD section regardless of initial jumper
selection. The same method of jumper overwriting is possible for A/D Unipolar and Bipolar
configuration. In enhanced mode user can overwrite hardware jumper configuration for A/D
Unipolar/Bipolar.
Deleted: or better channel to
channel accuracy
Deleted: See 1.1.2 – number of
samples

Elektra CPU User Manual V1.00 Page 8
Digital I/O
♦24 programmable digital I/O, 3.3V and 5V logic compatible
♦Input voltage Logic 0: -0.5V min, 0.8V max
♦Logic 1: 2.0V min, 5.5V max
♦Input current ±3µA max
♦Output voltage Logic 0: 0.0V min, 0.4V max
♦Logic 1: 2.4V min, 3.3V max
♦Output current Logic 0: 12mA max
♦Logic 1: -8mA max
♦I/O capacitance 20pF max
♦ESD protection: 2KV, contact human body model
Counter/Timers
♦1 24-bit counter/timer for A/D sampling rate control
♦1 16-bit counter/timer for user counting and timing functions
♦Programmable gate and count enable
♦Internal and external clocking capability

Elektra CPU User Manual V1.00 Page 9
3. ELEKTRA BOARD DRAWING
I/O Connectors
J1 PC/104 8-bit bus connector
J2 PC/104 16-bit bus connector
J3 Main user I/O connector
J4 Ethernet port
J5 Dual USB ports
J6 Watchdog/Failsafe Features
J8 IDE drive connector
J9 External battery connector
J10 Jumper Block
J11 Input power connector
J12 Switched output power connector
J14 Data acquisition I/O connector
J15 Auxiliary serial port connector
J17 Autocal connector
Configuration Jumper Blocks
J13 Data acquisition circuit configuration jumper blockJ13 Data acquisition
circuit configuration jumper block

Elektra CPU User Manual V1.00 Page 10
4. I/O HEADERS
All cables mentioned in this chapter are included in Diamond Systems’ cable kit C-ELK-KIT.
These cables are further described in chapter 23. Some cables are also available individually.
4.1 PC/104 Bus Connectors
The PC/104 bus is essentially identicalto the ISA Busexcept for the physical design. It specifies
two pin and socket connectors for the bus signals. A 64-pin header J1 incorporates the 62-pin 8-
bit bus connector signals, and a 40-pin header J2 incorporates the 36-pin 16-bit bus connector
signals. The additional pins on the PC/104 connectors are used as ground or key pins. The
female sockets on the top of the board and the extended mating pins on the bottom of the board
enable PC/104 board stacking
In the pin out figures below,the tops correspondto theleftedgeof the connectorwhen the board
is viewed from the primary side (side with the CPU chip and the female end of the PC/104
connector) and the board is oriented so that the PC/104 connectors are along the bottomedge of
the board.
View from Top of Board
J2: PC/104 16-bit bus connector J1: PC/104 8-bit bus connector
Ground D0 C0 Ground IOCHCHK- A1 B1 Ground
MEMCS16- D1 C1 SBHE- SD7 A2 B2 RESET
IOCS16- D2 C2 LA23 SD6 A3 B3 +5V
IRQ10 D3 C3 LA22 SD5 A4 B4 IRQ9
IRQ11 D4 C4 LA21 SD4 A5 B5 -5V
IRQ12 D5 C5 LA20 SD3 A6 B6 DRQ2
IRQ15 D6 C6 LA19 SD2 A7 B7 -12V
N/C D7 C7 LA18 SD1 A8 B8 N/C
N/C D8 C8 LA17 SD0 A9 B9 +12V
N/C D9 C9 MEMR- IOCHRDY A10 B10 Key (pin cut)
N/C D10 C10 MEMW- AEN A11 B11 SMEMW-
N/C D11 C11 SD8 SA19 A12 B12 SMEMR-
N/C D12 C12 SD9 SA18 A13 B13 IOW-
N/C D13 C13 SD10 SA17 A14 B14 IOR-
N/C D14 C14 SD11 SA16 A15 B15 DACK3-
N/C D15 C15 SD12 SA15 A16 B16 DRQ3
+5V D16 C16 SD13 SA14 A17 B17 DACK1-
MASTER- D17 C17 SD14 SA13 A18 B18 DRQ1
Ground D18 C18 SD15 SA12 A19 B19 Refresh-
Ground D19 C19 Key (pin cut) SA11 A20 B20 SYSCLK
SA10 A21 B21 IRQ7
SA9 A22 B22 IRQ6
SA8 A23 B23 IRQ5
SA7 A24 B24 IRQ4
SA6 A25 B25 IRQ3
SA5 A26 B26 DACK2-
SA4 A27 B27 TC
SA3 A28 B28 BALE
SA2 A29 B29 +5V
SA1 A30 B30 OSC
SA0 A31 B31 Ground
Ground A32 B32 Ground
Table 1: J1, J2 – PC/104 Connector Pin outs

Elektra CPU User Manual V1.00 Page 11
4.2 Main I/O Connector – J3
An 80-pin high-density connector is provided for access to the standard user I/O:
♦4 serial ports ♦PS/2 keyboard ♦ATX Power switch
♦Parallel port ♦PS/2 mouse ♦Reset switch
♦Watchdog timer I/O ♦Infra Red ♦Power and HDD LEDs
This connector mates with Diamond Systems’ cable no. C-PRZ-01, which consists of a dual-
ribbon-cable assembly with industry-standard connectors at the user end. The CPU mating
connector includes integral latches for enhanced reliability. Each ribbon cable has 40 wires.
Cable “A” Cable “B”
1 DCD1 1 STB-
2 DSR 1 2 AFD-
3 RXD 1 3 PD0
4 RTS 1 4 ERR-
COM 1 5 TXD 1 5 PD1
6 CTS 1 6 INIT-
7 DTR 1 7 PD2
8 RI 1 8 SLIN-
9 Ground 9 PD3
10 DCD 2 10 Ground
11 DSR 2 11 PD4
12 RXD 2 12 Ground
13 RTS 2 LPT 1 13 PD5
COM 2 14 TXD 2 14 Ground
15 CTS 2 15 PD6
16 DTR 2 16 Ground
17 RI 2 17 PD7
18 Ground 18 Ground
19 DCD 3 19 ACK-
20 DSR 3 20 Ground
21 RXD 3 21 BUSY
22 RTS 3 22 Ground
COM 3 23 TXD 3 23 PE
24 CTS 3 24 Ground
25 DTR 3 25 SLCT
26 RI 3 26 KB Clk
27 Ground 27 KB/MS V-
28 DCD 4 Keyboard 28 KB Data
29 DSR 4 29 KB/MS V+
30 RXD 4 30 MS Clk
31 RTS 4 31 KB/MS V-
COM 4 32 TXD 4 Mouse 32 MS Data
33 CTS 4 33 KB/MS V+
34 DTR 4 34 Ground
35 RI 4 35 Reset-
36 Ground 36 ATX Power
37 +5V Out Utilities B 37 KB Lock
38 Speaker Out 38 IR RX
Utilities A 39 IDE Drive LED 39 IR TX
40 Power LED 40 +5V In

Elektra CPU User Manual V1.00 Page 12
Table 2: J3 – Main I/O Connector
Notes on J3 Signals
COM1 – COM4 The signals on these pins are RS-232 level signals and may be
connected directly to RS-232 devices. The pin out of these signals is
designed to allow a 9-pin male IDC connector to be crimped onto the
corresponding ribboncable wires to provide the correct pinout for a PC
serial port connector (DTE).
LPT1 Thesignalsonthesepins comprise a standardPC parallelport.Thepin
out of these signals is designed to allow a 25-pin female IDC connector
to be crimped onto the corresponding ribbon cable wires to provide the
correct pin out for a PC parallel port connector.
Keyboard, Mouse These are PS/2 signals for keyboard and mouse.
Clk Clock pin; connects to pin 5 of the PS/2 connector.
V- Power pin; connects to pin 3 of the PS/2 connector.
Data Data pin; connects to pin 1 of the PS/2 connector.
V+ Power pin; connects to pin 4 of the PS/2 connector.
Pins 2 and 6 on the Mini-Din-6 PS/2 connectors are unused.
Utilities A
+5V Out This pin is a switched power pin that is turned on and off with the ATX
power switch or with the +5V input.
Speaker Out The signal on this pin is referenced to +5V Out. Connect a speaker
between this pin and +5V Out. (Speaker support not mentioned in pc
speaker
IDE Drive LED Referenced to +5V Out. Does not require a series resistor. Connect
LED directly between this pin and +5V Out.
Power LED Referenced to +5V Out. Does not require a series resistor. Connect
LED directly between this pin and +5V Out.
Utilities B
Reset- Connection between this pin and Ground will generate a Reset
condition.
ATX Power When ATX is enabled a momentary contact between this pin and
Ground causes the CPU to turn on and a contact of 4 seconds or longer
will generate a power shutdown. ATX power control is enabled with a
jumper on jumper block J10 (see page 20).
KB Lock When this pin is connected to Ground, the keyboard and mouse inputs
are ignored.
IR RX, IR TX Infra Red pins. Can be connected directly to an Infra Red transceiver.
+5V In Connected to +5V input power on J11 (see page 14). This pin is not
switched by ATX control. This pin is provided for auxiliary use such as
front panel lighting or other circuitry at the user’s discretion.
J3 Connector Part Numbers
J3 plug on CPU board: 3M / Robinson Nugent no. P50E-080P1-S1-TG, DSC no.
580883
Both cable-mount and board-mount connectors are available to mate with J3:
Cable-mount socket: 3M / Robinson Nugent no. P50E-080S-TG, DSC no. 580885

Elektra CPU User Manual V1.00 Page 13
Board-mount socket: 3M / Robinson Nugent no. P50-080S-R1-TG, DSC no. 580884

Elektra CPU User Manual V1.00 Page 14
Input Power – J11
1 +5V In
2 Ground
3 Key (Cut)
4 +12V In
5 Ground
6 +5V In
7 -12V In
8 -5V In
9 ATX Control
Table 3: J11 – Input Power Connector Pin out
Input power may be supplied either through J11 from an external supply or directly through the
PC/104 bus power pins if a PC/104 power supply is used with the CPU.
The board requires only +5VDC input powerto operate.Allotherrequired voltages are generated
on board with miniature switching regulators. However since the PC/104 bus includes pins for
±5V and ±12V, these voltages may be supplied through J11 if needed. The +5V and +12V
voltages are controlled by the ATX power manager switches, while -5V and -12V are routed
directly to the corresponding pins on PC/104 bus and are not controlled by the ATX function.
Multiple +5V and Ground pins are provided for extra current carrying capacityifneeded.Eachpin
is rated at 3A max. For the CPU, the panel I/O board, and a video board, 3A is sufficient, so +5
and Ground require only a single wire each. In this case the first 4 pins may be connected to a
standard4-pinminiaturePC power connector if desired.For alarger PC/104 stack the total power
requirements should be calculated to determine whether additional wires are necessary.
ATX control enables the +5V and +12V power to be switched on and off with an external
momentary switch. A short press on the switch willturn on power, andholding the switch onfor 4
seconds or longer will turn off power.
Diamond Systems’ cable no. 6981009 mates with J11. It provides 9 color-coded wires with
strippedandtinnedleads for connection to user-suppliedpower sources.This cable mayalsobe
usedwithDiamondSystems’Jupiter-MMseries power supplies in vehicle-basedapplications.In
this configuration, the input poweris supplied to theJupiter-MM board, and the Jupiter-MM output
power is connected to J11 on the CPU using cable 6981009. When used in this way, make sure
the two red +5V wires are both connected to the +5V output screw terminal on Jupiter-MM and
the Jupiter-MM is not plugged onto the PC/104 stack.
Deleted: (Needs to be assessed for
increased current with Vega – also
loading must be derated – i.e. 3A
rating and 3A load is bad practice)¶

Elektra CPU User Manual V1.00 Page 15
4.3 Output Power – J12
1 +5V Out
2 Ground
3 Ground
4 +12V Out
Table 4: J12 – Output Power Connector Pin out
J12 provides switched power for use with external drives. If ATX is enabled, the power is
switched on and off with the ATX input switch. If ATX is not enabled, the power is switched on
and off in conjunction with the external power. Elektra is equipped with a short circuit protection
on both switched +5V and +12V out. Incase these linesaccidentallyshort to ground the unit turns
offpowerlines and turn on an orangeoverload indicator LED (‘OV’LEDadjacenttoPowerLED).
As soon as the short disappears power lines turn on and CPU resumes operation.
Diamond Systems’ cable no. 6981006 mates with J12. It provides a standard full-size power
connector for a hard drive or CD-ROM drive and a standard miniature power connector for a
floppy drive.
Connector Part Numbers
J12 Connector on CPU board: Digi-Key Corp. 640456-4
J12 Mating Cable Connector: Molex 22-01-3047
4.4 Ethernet – J4
1 Common
2 RX-
3 Common
4 RX+
5 TX-
6 TX+
Table 5: J4 – Ethernet Connector Pin out
J4 is a 1x6 pin header. It mates with Diamond Systems’ cable no. 6981002, which provides a
panel-mount RJ-45 jack for connection to standard CAT5 network cables.
Connector Part Numbers
J11 Connector on CPU board: Digi-Key Corp. 640456-6
J11 Cable Connector: Molex 16-02-0096
4.5 USB – J5 (USB 0/1)
Key (pin cut) 1 2 Shield
USB2 Pwr- 3 4 USB1 Pwr-
USB2 Data+ 5 6 USB1 Data+
USB2 Data- 7 8 USB1 Data-
USB2 Pwr+ 9 10 USB1 Pwr+
Table 6: J5 – USB Connector Pin out
J5 is a 2x5 pin header. It mates withDiamond Systems’ cable no.6981012, providing 2 standard
USB type A jacks in a panel-mount housing.
Connector Part Numbers

Elektra CPU User Manual V1.00 Page 16
J5 Connector on CPU board: Standard 2x5, 0.1” header (with pin 1 removed)
J5 Mating Cable Connector: Oupiin 4072-2X5H (Standard PC USB Header Interface)

Elektra CPU User Manual V1.00 Page 17
4.6 Watchdog Features – J6
1 Ground
2 WDI
3 WDO
Table 7: J6 – Watchdog Connector Pin out
J6 is used for watchdog timer access.
The watchdog timer circuit is described on page 74 of this manual. It may be programmed
directly, as described in this user manual, or with Diamond Systems’ Universal Driver software.
4.7 IDE Drive – J8
RESET- 1 2 Ground
D7 3 4 D8
D6 5 6 D9
D5 7 8 D10
D4 9 10 D11
D3 11 12 D12
D2 13 14 D13
D1 15 16 D14
D0 17 18 D15
Ground 19 20 Key (Not Used)
DRQ 21 22 Ground
IDEIOW- 23 24 Ground
IDEIOR- 25 26 Ground
IORDY 27 28 Ground
DACK- 29 30 Ground
IRQ14 31 32 Pulled low for 16-bit operation
A1 33 34 Not Used
A0 35 36 A2
CS0- 37 38 CS1-
LED- 39 40 Ground
+5V 41 42 +5V
Ground 43 44 Not Used
Table 8: J8 – IDE Drive Connector Pin out
J8 is a 2x22 (44-pin) 2mm-pitchpin header. It mates with Diamond Systems’ cable no. 6981004,
and may be used to connect up to 2 IDE drives (hard disks, CD-ROMs, or flashdisk modules).
The 44-pin connector includes power and mates directly with notebook drives and flashdisk
modules. To use a standard format hard disk or CD-ROM drive with a 40-pin connector, an
adapter PCB such as Diamond Systems’ ACC-IDEEXT is required.

Elektra CPU User Manual V1.00 Page 18
4.8 Data Acquisition I/O Connector – J14 (Models with Data Acquisition only)
ELEKTRA includes a 50-pin header labeledJ14 for all dataacquisition I/O. Thisheader is located
on the left side of the board. Pin 1 is the lower right pin and is marked on the board. Diamond
Systems’ cable no. C-50-18 provides a standard 50-pin connector at each end and mates with
this header.
DIO A0 1 2 DIO A1
DIO A2 3 4 DIO A3
DIO A4 5 6 DIO A5
DIO A6 7 8 DIO A7
DIO B0 9 10 DIO B1
DIO B2 11 12 DIO B3
DIO B4 13 14 DIO B5
DIO B6 15 16 DIO B7
DIO C0 17 18 DIO C1
DIO C2 19 20 DIO C3
DIO C4 / Gate 0 21 22 DIO C5 / Gate 1
DIO C6 / Clk 1 23 24 DIO C7 / Out 0
Ext Trig 25 26 Tout 1
+5V Out 27 28 Dground
Vout 0 29 30 Vout 1
Vout 2 31 32 Vout 3
Aground (Vout) 33 34 Aground (Vin)
Vin 0 35 36 Vin 8
Vin 1 37 38 Vin 9
Vin 2 39 40 Vin 10
Vin 3 41 42 Vin 11
Vin 4 43 44 Vin 12
Vin 5 45 46 Vin 13
Vin 6 47 48 Vin 14
Vin 7 49 50 Vin 15
Table 9: J14 – Data Acquisition Connector Pin out
Signal Name Definition
DIO A7-A0 Digital I/O port A; programmable direction
DIO B7-B0 Digital I/O port B; programmable direction
DIO C7-C0 Digital I/O port C; programmable direction
C7-C4 may be configured for counter/timer signals; see page 48
Ext Trig External A/D trigger input
Tout 1 Counter/Timer 1 output
Vin 7/7+ ~ Vin 0/0+ Analog input channels 7 – 0 in single-ended mode;
High side of input channels 7 – 0 in differential mode
Vin 15/7- ~ Vin 8/0- Analog input channels 15 – 8 in both single-ended mode;
Low side of input channels 7 – 0 in differential mode
Vout0-3 Analog output channels 0 – 3
+5V Out Connected to switched +5V supply
Aground (Vout), (Vin) Analog ground; used for analog circuitry only
Vout pin is for the analog outputs; Vin pin is for the analog inputs
Dground Digital ground; used for digital circuitry only

Elektra CPU User Manual V1.00 Page 19
4.9 Auxiliary Serial Port Connector – J15
1 RX COM1 Pin 2 on DB9 #1
2 TX COM1 Pin 3 on DB9 #1
3 Ground Pin 5 on DB9 #1
4 RX COM2 Pin 2 on DB9 #2
5 TX COM2 Pin 3 on DB9 #2
6 Ground Pin 5 on DB9 #2
Table 10: J15 – Auxiliary Serial Port Connector
This 6-pin header is provided for auxiliary access to serial ports 1 and 2 with signals RX, TX, and
Ground for each port. This connector may be used in low-cost limited I/O configurations as an
alternative to the 80-pin connector J3.
4.10 Autocal connector J17
1 Ground
2 VCAL
Table 11: J17 – Autocal connector
J17 is for measurement of on board reference voltages. A precision meter isconnected to this pin
during reference measurement and should be disconnected prior to auto calibration process

Elektra CPU User Manual V1.00 Page 20
5. JUMPER SETTINGS
Refer to the ELEKTRA board drawing on page 9 for locations of the configuration items
mentionedhere.Seepage22 for information onconfigurationJ13for the data acquisition circuit.
5.1 System Configuration J10
Jumper block J10 is used for configuration of IRQ levels, wait states, ATX power control, and
CMOS RAM.
Serial Port and A/D IRQ Settings
COM3 may be set to IRQ3, IRQ4, IRQ 5, IRQ 6, or IRQ9. COM4 may be set to IRQ3 or IRQ15.
The A/D circuit may be set to IRQ6, IRQ5, or IRQ4 if COM3 does not use it. In addition, it is
possibleto set upall 3circuitsto share IRQs. Note thatonly1device can use the ‘shared’IRQat
one time. True IRQ sharing where all 3 devices can run simultaneously is not supported here
except with software driver check. Tosupport true IRQ sharingfor all3devicesforeveryIRQcall
software drive needs to check the source of the IRQ call and handle appropriately.
ATX Power Control
ELEKTRA must have ATX enabled to function properly. This jumper must be installed for the
board to boot when power is applied.
Erasing CMOS RAM
The CMOS RAM may be cleared with a jumper as shown on the next page. This will cause the
CPU to power up with the default BIOS settings. To clear the CMOS RAM, power downthe CPU,
install the jumper as shown, return it to its default position, and then power up again.
Before erasing CMOS RAM, write down any custom BIOS settings you have made!
Default Settings:
ATX enable
Battery enabled
A/D IRQ 5
COM4 IRQ 15
COM3 IRQ 9