Fluke 9000A-Z80QT User manual

9000A-Z8OQT
INTERFACEPOD
Instruction Manual
P/ N859447
March 1989
©1989. John Fluke Mfg. Co.. Inc. FLU KE
All rights reserved. Litho in U.S.A.

WARRANTY
COVERAGE
Fluke warrants this interface pod to be free from defects in material and workmanship
under normal use and service for a period of one (1) year from the date of shipment.
This warranty extends only to the original purchaser and does not apply to any
product that has been misused, altered, or has been subjected to abnormal conditions
of operation.
Fluke’s obligations under this warranty are limited to repair or replacement of a
product that is returned to an authorized Service Center within the warranty period,
provided that we determine that the product is defective. If we determine that the
failure has been caused by misuse, alteration,or abnormal conditions of operation,or
if the warranty period has expired, we will repair the pod and bill you for reasonable
repair cost.
SERVICE
If afailure occurs, send the product, postage prepaid, to the closest Service Center
with a description of the difficulty. Repairs will be made or the product replaced, and it
will be returned, transportation prepaid. FlukeassumesNO risk for damage in transit.
DISCLAIMER
THE FOREGOING WARRANTY IS EXCLUSIVE AND IN LIEU OF ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY
IMPLIEDWARRANTYOF MERCHANTABILITY,FITNESS, OR ADEQUACY FOR ANY
PARTICULAR PURPOSE OR USE. FLUKE SHALL NOT BE LIABLE FOR ANY
SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES,WHETHER IN CONTRACT,
TORT, OR OTHERWISE.
GETTING ANSWERS AND ADVICE
To enhanceyour use of this pod, Fluke will be happy to answer your questions about
its applications and use. Address all correspondence to: JOHN FLUKE MFG. CO.,
INC., P.O. BOX 09090, EVERETT, WASHINGTON, 98206, ATTN: Sales Department.
JOHN FLUKE MFG. CO., INC., PO. BOX 09090, EVERETT, WASHINGTON 98206

ZBOQT
Table of Contents
SECTION TITLE PAGE
1INTRODUCTION ................................... 1-1
1-1. PURPOSE OF INTERFACEPOD ................ 1-1
1-2, DESCRIPTIONOF INTERFACEPOD ............ 1-1
1-3. SPECIFICATIONS ............................ 1-2
2INSTALLATION ..................................... 2-1
2-1. INSTALLING THE Z80QT DATABASE
(9100 SERIES ONLY) .......................... 2-1
2-2. MAKING CONNECTIONS ...................... 2-1
2-3. POWER CONNECTIONS ....................... 2-2
3POD SIGNALS AND FUNCTIONS ...................... 3-1
3-1. INTRODUCTION ............................. 3-1
3-2. 280 SIGNALS ................................ 3-1
3-3. STATUS/CONTROL LINES AND ADDRESS
SPACE ASSIGNMENT ........................ 3—4
3—4. Introduction ................................ 3-4
3-5. Bit Assignment —Status Lines .................. 3-4
3-6. User-Writable Control Lines .................... 3—4
3-7. Bit Assignment AControl Lines ................. 3-5
3-8. Address Space Assignment ..................... 3—5
3-9. FORCING AND INTERRUPT LINES ............. 3-6
3-10. LINES ENABLED DURING MAINFRAMESETUP .3-7
3-11. NON—DETECTABLE280 SIGNALS ............... 3-7
3—12.‘ QUICK-LOOPING READ AND WRITE FUNCTIONS 3—7
3-13. Using the 9000 Series for Quick-Looping
Read and Write .............................. 3-8
34—14. Using the 9100 Series for Quick-Looping
Read and Write .............................. 3-8
3—l5. QUICK MEMORY TESTS ...................... 3-9
3-16. Quick RAM Test Description ................... 3-9
347. Quick ROM Test Description ................... 3-10
1' (vomimzed on page ii)

Z8OQT
TABLE OF CONTENTS, (continued)
SECTION TITLE PAGE
3-18. Using the 9000 Series for Quick RAM Testing ....... 3-10
3-19. Using the 9000 Series for Quick ROM Testing ....... 3—13
3—20. Using the 9100 Series for Quick RAM Testing ....... 3-15
3—21. Using the 9100 Series for Quick ROM Testing ....... 3-15
3—22. QUICK FILL AND VERIFY ..................... 3-16
3—23. Using the 9000 Series for Quick Fill and Verify ...... 3-16
3-24. Using the 9100 Series for Quick Fill and Verify ...... 3-17
3-25. MARGINALOUT PROBLEMS .................. 3-19
3—26 Introduction ................................ 3—19
3-27. UUT Operating Speed and Memory Access ........ 3-19
3—28. UUT Noise Levels ............................ 3—19
3—29. Bus Loading ................................ 3-19
3-30. Clock Loading .............................. 3-20
3-31. POD DRIVE CAPABILITY ..................... 3-20
3-32. POWER FAILURE DETECTIONLIMITS ......... 3—20
THEORY OF OPERATION ............................ 4-1
4-]. INTRODUCTION ............................. 4-1
4-2. GENERALPOD OPERATION ................... 4-1
4—3. Processor Section ............................ 4-1
4-3. Processor Section ............................ 4-1
4-4. UUT Interface Section ........................ 4-4
4-5. Timing Section .............................. 4-4
4-6. UUT Power Sensing .......................... 4-5
4-7. DETAILED BLOCK DIAGRAM DESCRIPTION . . . . 4-5
4—8. ProcessorSection ............................ 4-5
4—9. UUT Interface Section 7General ................ 4—8
4-10. UUT Interface Section 7Data Lines ............. 4—9
4-11. UUT Interface Section —Address Lines ........... 4-12
4-12. UUT Interface Section 7Status and Control Lines ..4—12
4-13. Timing Section .............................. 4-13
MAINTENANCE .................................... 5—1
5—1. INTRODUCTION ............................. 5—l
5—2. SELF TEST .................................. 5-1
5-3. REPAIR PRECAUTIONS ...................... 5—4
5—4. TROUBLESHOOTING ......................... 5-4
5-5. Introduction ................................ 5—4
5—6. Pod Defective or Inoperative? ................... 5—5
5—7. Selecting aUUT for Pod Testing ................. 5-7
5—8. Troubleshooting aDefective Pod ................. 5—8
5-13. Troubleshooting an Inoperative Pod .............. 5-14
5-l4. DISASSEMBLY .............................. 5-19
ii (continued on page iii)

Z8OQT
TABLE OF CONTENTS,(continued)
SECTION TITLE PAGE
6LIST OF REPLACEABLE PARTS ....................... 6-1
6-1. INTRODUCTION ............................. 6-1
6-2. HOW TO OBTAIN PARTS ...................... 6—1
7SCHEMATIC DIAGRAMS ............................. 7-1
APPENDIX A
USING THE Z8OQT POD FROM TL/l PROGRAMS A-1
iii /iv