Fluke 9000A-8080 User manual

9000A-8080
1~~·1~3
OJ

P/N 613786
June 1981
Rev. 1 7/81
DISTRIBUTION STATEMENT -Distribution authorized to U.S. Gov-
ernment agencies only for administrative or operational use (effective
date is date of this manual). Other requests for this document must be
referred to San Antonio ALC/MMEDT, Kelly AFB, TX 78241-5000.
THIS MATERIAL MAY BE REPRODUCED BY OR FOR THE U.S. GOV-
ERNMENT PURSUANT TO THE COPYRIGHT LICENSE UNDER THE
(DFAR) CLAUSE AT 52.227-7013 (15 MAY 1987).
HANDLING AND DESTRUCTION NOTICE -Comply with distribution
statement and destroy by any method that will prevent disclosure of
contents or reconstruction of the document.
9000A-8080
Interface Pod
Instruction Manual
IFLUKEI
©1981, John Fluke Mfg. Co., Inc., all rights reserved Litho in U.S.A. ®

WARRANTY
Notwithstanding any provision of any agreement the following warranty is exclusive·
The JOHN FLUKE MFG. CO., INC., warrants each instrument it manufactures to be free from defects in material and
workmanship under normal use and service for the period of 1 year from date of purchase. This warranty extends only
to the original purchaser. This warranty shall not apply to fuses, disposable batteries (rechargeable type batteries are
warranted for 90-days), or any product or parts which have been subject to misuse, neglect, accident, or abnormal
conditions of operations.
In the event of failure of a product covered by this warranty, John Fluke Mfg. Co., Inc., will repair and calibrate an
instrument returned to an authorized Service Facility within 1year of the original purchase: provided the warrantor's
examination discloses to its satisfaction that the product was defective. The warrantor may, at its option, replace the
product in lieu of repair. With regard to any instrument returned within 1 year of the original purchase. said repairs or
replacement will be made without charge. If the failure has been caused by misuse, neglect, accident, or abnormal
conditions of operations, repairs will be billed at a nominal cost. In such case, an estimate will be submitted before
work is started, if requested.
THE FOREGOING WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESS OR IMPLIED,
INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS,
OR ADEQUACY FOR ANY PARTICULAR PURPOSE OR USE. JOHN FLUKE MFG. CO, INC., SHALL
NOT BE LIABLE FOR ANY SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER IN
CONTRACT, TORT, OR OTHERWISE
If any failure occurs, the following steps should be taken:
Notify the JOHN FLUKE MFG. CO., JNC., or nearest Service facility, giving full details of the difficulty, and
include the model number, type number, and serial number. On receipt of this information, service data, or
shipping instructions will be forwarded to you
2. On receipt of the shipping instructions, forward the instrument, transportation prepaid Repairs will be
made at the Service Facility and the instrument returned, transportation prepaid.
SHIPPING TO MANUFACTURER FOR REPAIR OR ADJUSTMENT
All shipments of JOHN FLUKE MFG. CO., INC., instruments should be made via United Parcel Service or "Best Way"~
prepaid. The instrument should be shipped in the original packing carton; or if it is not available, use any suitable
container that is rigid and of adequatesize. If a substitute container is used, the instrument should be wrapped in paper
and surrounded with at least four inches of excelsior or similar shock-absorbing material
CLAIM FOR DAMAGE IN SHIPMENT TO ORIGINAL PURCHASER
The instrument should be thoroughly inspected immediately upon original delivery to purchaser. All material in the
container should be checked against the enclosed packing list. The manufacturer will not be responsible for shortages
against the packing sheet unless notified immediately. If the instrument isdamaged in any way, aclaim should be filed
with the carrier immediately. (To obtain a quotation to repair shipment damage, contact the nearest Fluke Technical
Center.) Final claim and negotiations with the carrier must be completed by the customer
The JOHN FLUKE MFG. CO., INC, will be happy to answer all applications or use questions, which will enhance your
use of this instrument. Please address your requests or correspondence to· JOHN FLUKE MFG. CO., INC .. P.O. BOX
C9090, EVERETT, WASHINGTON 98206, ATTN: Sales Dept. For EuropeanCustomers: Fluke (Holland) B.V ,P.O. Box
5053, 5004 EB, Tilburg, The Netherlands
*For European customers, Air Freight prepaid
John Fluke Mfg. Co., Inc., P.O. Box C9090, Everett, Washington 98206
Rev. 6/81

8080
Table of Contents
SECTION TITLE PAGE
INTRODUCTION ....................................... 1-1
1-1. PURPOSE OF INTERFACE POD .................. 1-1
1-2. DESCRIPTION OF INTERFACE POD ............. 1-1
1-3. SPECIFICATIONS ................................ 1-2
2 INSTALLATION ........................................ 2-1
2-1. GENERAL ....................................... 2-1
2-2. MAKING CONNECTIONS ........................ 2-1
2-3. POWER CONNECTIONS ......................... 2-2
3 MICROPROCESSOR DATA ............................. 3-1
3-1. INTRODUCTION ................................. 3-1
3-2. 8080 SIGNALS ................................... 3-1
3-3. STATUS/CONTROL LINES
AND ADDRESS SPACE ASSIGNMENT ........... 3-3
3-4. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3-5. Bit Assignment -Status Lines ..................... 3-4
3-6. User-Writeable Control Lines ...................... 3-4
3-7. Bit Assignment -Control Lines . . . . . . . . . . . . . . . . . . . . 3-4
3-8. Address Space Assignment . . . . . . . . . . . . . . . . . . . . . . . . 3-6
3-9. FORCING AND INTERRUPT LINES .............. 3-6
3-10. LINES ENABLED DURING TROUBLESHOOTER
SETUP .......................................... 3-6
3-11. NON-DETECTABLE 8080 SIGNALS ............... 3-6
3-12. MARGINAL UUT PROBLEMS .................... 3-6
3-13. Introduction .................................... 3-6
3-14. UUT Operating Speed and Memory Access ......... 3-7
3-15. UUT Noise Levels ............................... 3-7
3-16. Bus Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
3-17. Clock Loading .................................. 3-7
3-18. POD DRIVE CAPABILITY ........................ 3-7
3-19. POWER FAILURE DETECTION LIMITS .......... 3-7
(continued on page ii)

8080
TABLE OF CONTENTS, continued
SECTION TITLE PAGE
4 THEORY OF OPERATION .............................. 4-1
4-1. INTRODUCTION ................................. 4-1
4-2. GENERAL POD OPERATION ..................... 4-1
4-3. Processor Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4-4. UUT Interface Section ........................... 4-4
4-5. Timing Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
4-6. UUT Power Sensing ............................. 4-5
4-7. DETAILED BLOCK DIAGRAM DESCRIPTION .... 4-5
4-8. Processor Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5
4-9. UUT Interface Section -General ................... 4-8
4-IO. UUT Interface Section - Data Lines ................ 4-9
4-11. UUT Interface Section -Address Lines . . . . . . . . . . . . . 4-9
4-12. UUT Interface Section -Status and Control Lines ... 4-12
4-13. Timing Section .................................. 4-12
5 MAINTENANCE ........................................ 5-1
5-1. INTRODUCTION ................................. 5-1
5-2. SELF TEST ...................................... 5-1
5-3. REPAIR PRECAUTIONS ......................... 5-2
5-4. TROUBLESHOOTING ............................ 5-3
5-5. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5-6. Pod Defective or Inoperative? ..................... 5-6
5-7. Selecting a UUT for Pod Testing .................. 5-6
5-8. Troubleshooting a Defective Pod .................. 5-7
5-13. Troubleshooting an Inoperative Pod ............... 5-11
5-14. DISASSEMBLY ............ : ..................... 5-15
6 LIST OF REPLACEABLE PARTS ........................ 6-1
6-1. INTRODUCTION ................................. 6-1
6-2. HOW TO OBTAIN PARTS ........................ 6-1
7 SCHEMATIC DIAGRAMS ............................... 7-1
ii

TABLE
1-1.
3-1.
3-2.
5-1.
5-2.
5-3.
8080
List of Tables
TITLE PAGE
8080 Interface Pod Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
8080 Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Status and Control Lines Bit Assignments . . . . . . . . . . . . . . . . . . 3-6
Self Test Failure Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
Required Test Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4
8080 Pod Memory and 1/0 Addresses . . . . . . . . . . . . . . . . . . . . . . 5-13
iii

8080
List of Illustrations
FIGURE
1-1.
2-1.
2-2.
3-1.
4-1.
4-2.
4-3.
4-4.
5-1.
5-2.
5-3.
TITLE PAGE
Relationship of Interface Pod . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I-3
Connection of Interface Pod to Troubleshooter . . . . . . . . . . . . . . 2-3
Connection of Interface Pod to UUT . . . . . . . . . . . . . . . . . . . . . . . 2-3
8080 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
General Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2
Detailed Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Handshaking Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
UUT ON Signal and Latch Times . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
Interface PCB, Non-Component Side . . . . . . . . . . . . . . . . . . . . . . 5-5
Troubleshooting a Defective Pod . . . . . . . . . . . . . . . . . . . . . . . . . . 5-8
Troubleshooting an Inoperative Pod . . . . . . . . . . . . . . . . . . . . . . . 5-13
iv

1-1. PURPOSE OF INTERFACE POD
8080
Section 1
Introduction
The purpose of the 9000A-8080 Interface Pod, hereafterreferred to as the pod, is
to interface any 9000 Series Micro System Troubleshooter to a piece of
equipment employing a 8080 microprocessor.
The 9000 Series Micro System Troubleshooters are designed to service printed
circuit boards, instruments and systems employing bus-oriented
microprocessors. While the architecture of the troubleshooter main frame is
general in natureand is designed to accomodateprocessors with upto 32 address
lines and 32 data lines, the interface pod adaptsthegeneral purposearchitecture
of the 9000 Series to a specific microprocessor, or microprocessor family. The
interface pod adapts the 9000 Series to microprocessor-specific functions such
as pin layout, status/control functions, interrupt handling, timing, size of
memory space, and size of 1/0 space.
1-2. DESCRIPTION OF INTERFACE POD
The pod consists of a pair of printed circuit board assemblies mounted within a
small break-resistant case. A shielded 24-conductor cable connects the printed
circuit boards to the troubleshooter; a ribbon cable and connector provide
connection to the unit under test, hereafter referred to as the UUT.
Figure 1-1 shows the relationship of the pod to the troubleshooter and to the
UUT. Connectionfrom the pod tothetroubleshooter is via a front-mounted 25-
pin connector. Connection to the UUT is made by plugging the ribbon cable
plug directly into the microprocessor socket. The UUT microprocessor socket
gives the troubleshooter direct access to all system components which normally
communicate with the microprocessor.
The pod contains a 8080 microprocessor and the supporting hardware and
control software required to:
• Perform handshaking with the troubleshooter
1-1

8080
• Receive and execute commands from the troubleshooter
• Report UUT status to the troubleshooter
• Emulate the UUT microprocessor
The pod is powered by the troubleshooter, but is clocked by the UUT clock
signals. Using the UUT clock signals allows the troubleshooter and pod to
operate at the designed operating speed of the UUT.
Logic level detection circuits are provided on each line to the UUT. These
circuits allow detection of bus shorts, stuck-high or stuck-low conditions, and
any bus drive conflict(two or moredrivers attempting to drive thesame bus line).
Over-voltage protection circuits are also provided on each line to the UUT.
These circuits guard against pod damage which could result from:
• Incorrectly inserting the ribbon cable plug in the UUT microprocessor
socket.
• UUT faults which place potentially damaging voltages on the UUT
microprocessor socket.
The over-voltage protection circuits guard against voltages of+ 12 to -7volts on
any one pin. Multiple faults, especially of long duration, may cause pod damage.
A power level sensing circuit constantly monitors the voltage level of the UUT
power supplies. If any UUT power supply rises above or drops below an
acceptable level, the pod notifies the troubleshooter of the power fail condition.
A self test socket provided on the pod enables the troubleshooter to check pod
operation. The self test socket is a 40-pin zero-insertion force type connector.
The ribbon cable plug must be connected to the self test socket during self test
operation. The ribbon cable plug should also be inserted into this socket when
the pod is not in use to provide protection for the plug.
1-3. SPECIFICATIONS
Specifications for the 9000A-8080 Interface Pod are listed in Table 1-1.
1-2

.....
I
c.>
"Tl
ii
c
;;
....
I
....
FLUKE
9000 SERIES
MICRO SYSTEM
TROUBLESHOOTER
MICROPROCESSOR
SOCKET
INTERFACE
POD
PROBE
,- -- - -- --- -- ----,
I UUTr-~~~---.
I
I
I
I
ROM
1/0
INTERFACE
RAM
1/0
INTERFACE

8080
Table 1-1. 8080 Interface Pod Specifications
ELECTRICAL PERFORMANCE
Power Dissipation .......... 3.0 watts maximum
Electrical Protection
CLOCK INPUTS .......... -0.5 to +12 volts may be applied between
ground and any ribbon cable plug pin
continuously cable plug pin continuously as
long as the pod is powered by the
troubleshooter.
OTHER INPUTS .......... -7 to +12 volts may be applied between
ground and any ribbon cable plug pin
continuously as long as the pod is powered
by the troubleshooter.
MICROPROCESSOR SIGNALS
Clock Input Low ............ OV min., +0.8V max.
Clock Input High ........... +9.0V min., +13.0V max.
Input Low Voltage .......... ov min., +0.8V max.
Input High Voltage ......... +2.0V min., +5.0V max.
Output Low Voltage ........ +0.4V max. with lol = 1.9 mA
Output High Voltage ........ +3.7V min. with loh = -250 µA
Tristate Output Leakage
Current . . .. .. .. . .. . . . .. .. .. ±20 µA
High Level Input Current .... 20 µA typ. with Vih = +2.7V
Low Level Input Current
READY, HOLD, RESET ... -400 µA max. with Vil = +0.4V
ALL OTHER INPUT LINES -20 µA typ. with Vil = +0.4V
TIMING CHARACTERISTICS
1-4
Maximum Clock Frequency .. 3.0 MHz typ.
Added Delays to 8080 Signals
LOW-TO-HIGH
TRANSITIONS . . . .. .. . .. . .. 20 ns typ.
HIGH-TO-LOW
TRANSITIONS ............. 24 ns typ.

Table 1-1. 8080 Interface Pod Specifications (cont)
UUT POWER DETECTION
Detection of High +sv Fault . Vee > +5.5V detected
Detection of Low +sv Fault .. Vee< +4.5V detected
Detection of High +12V Fault Vdd > +13.2V detected
Detection of Low +12V Fault. Vdd < +10.8V detected
Detection of High -SV Fault . . Vbb > -5.5V detected
Detection of Low -SV Fault . . Vbb < -4.5V detected
GENERAL
8080
Size ............ , ........... 3.3 cm High x 10.2 cm Wide x 18.55 cm Deep
(1.3 in High x 4.0 in Wide x 7.4 in Deep)
Weight ..................... 0.68 kg (1.5 lbs)
Environment
STORAGE ............... -40° to +70°C, RH< 95%
OPERATING ............. 0° to +25°C, RH< 95%
+25° to +40°C, RH< 75%
+40° to +50° C, RH < 45%
1-5/1-6

8080
Section 2
Installation
2-1. GENERAL
Before a 9000 Series Micro System Troubleshooter can be used to perform any
testing or fault isolation, it must be connected to the UUT. Connection is made
by means ofthe pod, which is equipped withtwo cable assemblies, one shielded-
type and one ribbon-type. The procedures for installing and connectingthe pod
are given in the following paragraphs.
2-2. MAKING CONNECTIONS
Before making any connections to the UUT, take note of the following
precautions:
WARNING
TO PREVENT POSSIBLE HAZARDS TO THE OPERATOR OR
DAMAGE TO THE UUT, DISCONNECT ALL HIGH-VOLTAGE
POWER SUPPLIES, THERMAL ELEMENTS, MOTORS, OR
MECHANICAL ACTUATORS WHICH ARE CONTROLLED OR
PROGRAMMED BY THE UUT MICROPROCESSOR BEFORE
CONNECTING POD.
• Be sure to install the ribbon cable plug correctly m the UUT
microprocessor socket.
• The selftest socket is intended for use with the ribbon cable plug only. Do
not insert any microprocessor removed from a UUT under test, or any
other device into this socket.
Connect the pod between the troubleshooter and the UUT as follows:
I. Remove power from the troubleshooter and the UUT.
2-1

8080
2. Using the round shielded cable, connect the pod to the troubleshooter
as shown in Figure 2-1. Secure the connector using the sliding collar.
3. Perform a self-test of the pod as described in Section 5 of this manual.
4. With UUT power off, unplug the microprocessor from the UUT.
5. On the pod, turn the self test socket thumbwheel to release the plug
from the self test socket.
6. Align the ribbon-cable with the microprocessor socket on the UUTso
that the notched corner of the ribbon cable plug aligns with pin 1 of the
socket. Insert the plug into the socket as shown in Figure 2-2.
7. Electrically reassemble the UUT. Use extender boards if necessary.
CAUTION
Ensure troubleshooter power Is on before turning UUT power on In
order to activate pod protection circuits.
8. Apply power to the troubleshooter.
9. Apply power to the UUT.
2-3. POWER CONNECTIONS
The pod receives +5 volts, -5 volts, and + 12 volts from the 9000 Series Micro
System Troubleshooter. No external power connections are required.
2-2

8080
POD CONNECTS ___ _,
HERE
Figure 2-1 . Connec tion of Interface Pod to Troubleshooter
I
Figure 2-2. Connection of Interface Pod to UUT
2-3 / 2-4

8080
Section 3
Microprocessor Data
3-1. INTRODUCTION
This section contains information which may be useful during operation of the
troubleshooter. This information includes 8080 signal descriptions,
explanations of status/control lines and address space assignment, the effects
the pod may have on normal UUT operation, the pod capabilities and
limitations, and pertinent pod characteristics.
3-2. 8080 SIGNALS
For reference, Table 3-1 lists all of the 8080 signals and provides a brief
description of each. Figure 3-1 shows the pin assignment of 8080 signals.
Table 3-1. 8080 Signals
SIGNAL NAME DESCRIPTION
Address Lines The 16 address linesare designated AO through A15.
AO -A15
The address lines are tri-state output and may be
logic high, logic low, or floated by the 8080 to a high
impedance state. The 8080 places the address lines
in a high impedance stateto allow devices other than
the 8080 to control the address bus during DMA
(Direct Memory Access) operations. See HOLD.
Data lines The 8 data lines are designated DO through D7. The
DO -D7 data lines are
bidirectional lines used to input and
output data, and also used to output status during
the first clock period of any machine cycle. (Status
on the data bus identifies events which are to occur
during the balance of the machine cycle; refer to
manufacturer's data for additional information.) The
data lines are tri-state lines. See HOLD.
SYNC Line
The SYNC output goes high during the period of the
first phase-two clock pulse for each machine cycle.
3-1

8080
SIGNAL NAME
OBIN Line
WR Line
READY Line
WAIT Line
INT Line
INTE Line
RESET Line
HOLD Line
HLDA Line
3-2
Table 3-1. 8080 Signals (cont)
DESCRIPTION
The SYNC output permits synchronization of
external logic with status information present on the
data lines.
The OBIN line is made output high to indicate that
the 8080 is ready to read data via the data lines from
either memory or an 1/0 device. OBIN may be used
as a data input strobe.
The WR line is made output low when data on the
data bus is stable, indicating the 8080 is ready to
write data to eithermemory or an 1/0 device. The WR
line may be used as a write strobe.
The READY line is an inputwhich, when placed at a
logic low level, causes the 8080 to enter a wait state.
During the wait state, the 8080 inserts clock pulses
to extend cycletime as required by theexternal logic
selecting the wait state.
The WAIT line is made output high during the wait
state caused by an input to the READY line.
The INT line is an input which, when made a logic
high level, permits the external interrupt of the
8080.
The INTE line is made output high to indicate that
interrupts are enabled by the 8080. The INTE output
is made low when an interrupt is acknowledged.
The RESET line is an input which, when placed at a
logic low level for a minimum of threeclock periods,
resets the program counter and other registers to
zero.
The HOLD line is an input which, when placed at a
logic high level, causes the 8080 to halt at the
completion of the current instruction. During the
HOLD state, the 8080 relinquishes control of the
system bus by floating the address and data lines to
a high impedance state. External control of the
system bus is necessary during OMA (direct
memory access) operations.
The HLDA line is made output high when the 8080
acknowledges a HOLD input and floats the system
bus to a high impedance state.

A10
GND
04
05
06
07
03
02
01
DO
-5V
RESET
HOLD
INT
02
INTE
OBIN
WR
SYNC
+5V
.....
""
.....
.....-
...-
....._
""
.....
~
...-
....._
...-
.....
""
....._
.....-
....._
.....-
....._
.....-
1
40
....
2
39
...
....
3 38
,...
,...
4
37
......
5 36
.....
6
35
...
7 34
,.. 8 33
,.. 9 32
10
31
...... 11
30
......
12 29
13
28
i...._
,..
""
--,...
14
27
......
15 26
16
25
17
24
18 23
:..
19 22
.....
20
21
-,...
Figure 3-1. 8080 Pin Assignments
.....
......
.....
......
.....
......
.....
__...
--,...
,..
,..
....
...
....
...
.....
......
.....
~
......
....
...
--,...
....
...
.....
.....
A11
A14
A13
A12
A15
A9
AB
A7
A6
A5
A4
A3
+12V
A2
A1
AO
WAIT
READY
01
HLDA
3-3. STATUS/CONTROL LINES AND ADDRESS SPACE
ASSIGNMENT
3-4. Introduction
8080
The 9000A Series Micro System Troubleshooters are designed to accomodate
bus-oriented processors having up to 32 address lines, 32 data lines, 16 status
lines, and 8 control lines. The pod provides an interface between the general
architecture of the 9000 Series and the specific requirements of the 8080
microprocessor. As part of this interface task, the pod makes specific
assignments between the microprocessor lines and the 9000 Series
troubleshooter. These assignments include:
• Bit number assignment of 8080 status lines
3-3

8080
• User-writable control lines
• Bit number assignment of control lines
• Address space assignment
• Pin assignments
These assignments are described in the following paragraphs and are
summarized for convenience on the pod decal.
3-5. Bit Assignment -Status Lines
When a read status (READ @ STS) operation is performed, thetroubleshooter
displays the result in binary form, where a "l" indicates a logic high status line.
To determine which bits of the displayed read status correspond to specific
status lines, each line has an assigned bit number, as listed in Table 3-2. Bit
number zero (READ) appears at the far right of the display, while bit number7
(POWER FAIL) appears at the far right.
For example, ifthe READY (bit number 0) and POWER FAIL (bit number 7)
lines are low, and the other status lines are high, the troubleshooter would read
READ @ STS = 0001 1010 OK. Bit numbers 0 (READY) and 7 (POWER
FAIL) are zero to indicate a logic low, while other meaningful bits are ones to
indicate logic high. Bits 2, 5 and 6, which have no meaning for 8080 status lines,
are always represented by zeros in the troubleshooter display message.
3-6. User-Writeable Control Lines
The 8080 has three control lines which the troubleshooter can write to. These
lines are interruptenable(INTE), wait(WAIT) and hold acknowledge (HLDA).
To write to any or all of these lines, a WRITE CTL function is usedas described
in the paragraphs that follow. Note that writingto a control line only sets the line
to the high or low state for approximately 20 microseconds; just longenough to
verify that it can be driven.
3-7. Bit Assignment -Control Lines
There are two troubleshooting functions which require theentry of binarydigits
to identify user-writeable control lines. These functions include write control
(WRITE @ CTL) and data toggle control (DTOG @ CTL).
When performing or programming either of these two functions, the user is
prompted for a binary number to identify the control line(s) to be written,
HLDA, WAIT, and INTE. Table 3-2 shows that these lines have bit numbers0,
1 and 2 respectively. To perform a write control operation on these three lines,
3-4

8080
enter any of the following bit configurations in response to the prompt. As with
the status lines, bit number 0 is at the far right of the display.
000 writes all lines low
001 writes HLDA high, WAIT and INTE low
010 writes WAIT high, HLDA and INTE low
011 writes HLDA and WAIT high, INTE low
100 writes INTE high, HLDA and WAIT low
IO I writes HLDA and INTE high, WAIT low
I IO writes WAIT and INTE high, HLDA low
111 writes all lines high
If any control line cannot be driven, the troubleshooter responds with the
message CTRL ERR@xxxxxxxx LOOP?, where x equals a binary I if that line
is not driveable. Forexample, ifin the write control operation, the WAIT line can
be driven, but the INTE and HLDA lines cannot, the troubleshooter displays
the message CTRL ERR @ 00000101 LOOP?, indicating that the lines
represented by bit numbers 0 and 2 cannot be driven. The HLDA line is
represented by bit number 0, while the INTE line is represented by bit number 2.
When performing a BUS TEST, and various other troubleshooter operations,
the troubleshooter message CTL ERR xxxxxxxx-LOOP? can occur, where x
represents a binary number that identifies which lines can or cannot be driven. A
binary 0 represents the ability to drive a line, while a binary I represents the
inability to drive a line. Table 3-2 lists all control lines and their respective bit
numbers.
Table 3-2. Status and Control Lines Bit Assignments
STATUS LINES CONTROL LINES
BITNO. SIGNAL BIT NO. SIGNAL
7
PWR FAIL 7 -
6 -6 SYNC
5 -5
WR
4 **RESET 4 OBIN
3 INT 3 -
2 -2 *INTE
1
**HOLD
1 *WAIT
0 **READY 0
*HLDA
*User Writeable ** Forcing Line
3-5