FRONTGRADE GR-CPCI-GR716-DEV User manual

Frontgrade Gaisler AB
Kungsgatan 12 | SE-411 19 Goteborg | Sweden
+46 31 7758650 | frontgrade.com/gaisler
2
GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
TABLE OF CONTENTS
1Introduction...................................................................................................................5
1.1 Scope and Purpose of the Document .....................................................................5
1.2 Reference Documents ............................................................................................5
2Abbreviations................................................................................................................5
3Introduction...................................................................................................................6
3.1 Overview.................................................................................................................6
3.2 Handling .................................................................................................................8
4Board Design................................................................................................................9
4.1 Board Block Diagram..............................................................................................9
4.2 Board Mechanical Configuration...........................................................................10
4.3 GR716-BOARD and Expansion Boards ...............................................................11
4.4 Interface Configuration Board...............................................................................13
4.5 GPIO.....................................................................................................................14
4.6 SPW .....................................................................................................................14
4.7 SPI4S ...................................................................................................................14
4.8 LVDS ....................................................................................................................15
4.9 UART-A / UART-B / UART-C.................................................................................16
4.10 CAN ......................................................................................................................16
4.11 MIL1553................................................................................................................16
4.12 SPI0 / SPI1 ...........................................................................................................16
4.13 PACKETWIRE ......................................................................................................17
4.14 DAC0-3 & ADC0-7................................................................................................17
4.15 Bootstrap Signals..................................................................................................17
4.16 Debug Support Unit Interfaces..............................................................................18
4.17 Oscillators and Clock Inputs .................................................................................19
4.18 Power Supply and Voltage Regulation..................................................................19
4.19 Reset Circuit and Button.......................................................................................20
5Setting Up and Using the Board .................................................................................21
6Interfaces and Configuration.......................................................................................22
6.1 List of Connectors.................................................................................................22
6.2 List of Headers......................................................................................................32
6.3 List of Oscillators, Switches and LED's.................................................................32

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
LIST OF FIGURES
Figure 3-1: GR716-CPCI-DEV Development Board ............................................................6
Figure 4-1: GR716-CPCI-DEV Board Block Diagram ..........................................................9
Figure 4-2: GR716-CPCI-DEV Board Dimensions.............................................................10
Figure 4-3: GR716-BOARD mounted on a GR716-CPCI-DEV Carrier board....................11
Figure 4-4: GR716-BOARD ...............................................................................................12
Figure 4-5: GR716-TEST-MEMORY BOARD ....................................................................12
Figure 4-6: Interface Configuration Board..........................................................................13
Figure 4-7: Installed Interface Configuration Board ...........................................................13
Figure 4-8: GPIO interface.................................................................................................14
Figure 4-9: Dual purpose LVDS Signal Header .................................................................15
Figure 4-10: Debug Support Unit connections...................................................................18
Figure 4-11: Power Regulation Scheme ............................................................................20
Figure 6-1: GR716-CPCI-DEV Front Panel .......................................................................24
Figure 6-2: PCB Top-View..................................................................................................34
Figure 6-3: PCB Bottom View ............................................................................................35
Figure 6-4: PCB Top View (Photo).....................................................................................36
Figure 6-5: PCB Bottom View (Photo) ...............................................................................37

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
LIST OF TABLES
Table 1: UART interface Combinations .............................................................................16
Table 2: Bootstrap Resistor Settings.................................................................................17
Table 3: List of Connectors ................................................................................................23
Table 4: Expansion connector P1 & P2 Pin-out .................................................................25
Table 5: Expansion connector P3 & P4 Pin-out .................................................................25
Table 6: J1 USB type Micro B connector – FTDI Serial Link..............................................26
Table 7: J2 GPIO Header Pin out.......................................................................................26
Table 8: J3 GPIO Header Pin out.......................................................................................27
Table 9: J4 GPIO Header Pin out.......................................................................................27
Table 10: J5 GPIO Header Pin out.....................................................................................28
Table 11: J6 SPW/SPI4S Header.......................................................................................28
Table 12: J7 SPW-0 Header ..............................................................................................29
Table 13: J8 SPI4S-R Connector .......................................................................................29
Table 14: J9, J10, J11 UART Interface Headers ................................................................29
Table 15: J12 CAN Interface Headers ...............................................................................29
Table 16: J13 CAN Interface Headers ...............................................................................30
Table 17: J14 & J15 CAN Interface Headers .....................................................................30
Table 18: J15 PW Interface Headers .................................................................................30
Table 19: J17-J31 MMCX miniature coax connectors........................................................30
Table 20: J32 POWER – External Power Connector .........................................................30
Table 21: J33 POWER – External Power Connector – Alternative.....................................31
Table 22: J34 Power-Out connector...................................................................................31
Table 23: J35, J36, J36 Connectors for Interface Configuration ........................................31
Table 24: List of Jumpers ...................................................................................................32
Table 25: List and definition of Oscillators and Crystals.....................................................32
Table 26: List and definition of PCB mounted LED's..........................................................32
Table 27: List and definition of Switches ............................................................................32
Table 28: Definition of Switch S1 functions ........................................................................33

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
1 INTRODUCTION
1.1 Scope and Purpose of the Document
This document provides a User's Manual and Interface document for the “GR716-CPCI-
DEV” Development and Demonstration board.
The work has been performed by Frontgrade Gaisler AB, Göteborg, Sweden.
1.2 Reference Documents
[RD1] GR716, Data Sheet and User's Manual",Frontgrade Gaisler, GR716-UM-DS,
available from http://www.gaisler.com/index.php/products/components/GR716
[RD2] GR716-CPCI-DEV_schematic.pdf, Schematic
[RD3] GR716-CPCI-DEV_assy_drawing.pdf, Assembly Drawing
[RD4] GRMON3 User's Manual, available from:
https://www.gaisler.com/index.php/products/debug-tools/grmon3
[RD5] GR716-BOARD User Manual.pdf, User Manual
2 ABBREVIATIONS
ASIC
Application Specific Integrated Circuit.
DSU
Debug Support Unit
EDAC
Error Detection and Correction
ESA
European Space Agency
ESD
Electro-Static Discharge
ESTEC
European Space Research and Technology Center
GPIO
General Purpose Input / Output
IC
Integrated Circuit
I/O
Input/Output
IP
Intellectual Property
LDO
Low Drop-Out
PCB
Printed Circuit Board
POL
Point of Load
SOC
System On a Chip
SPW
Spacewire
TBC
To Be Confirmed
TBD
To Be Defined

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
3 INTRODUCTION
3.1 Overview
This document describes the GR716-CPCI-DEV Development Board.
Together with the GR716-DEV board, this equipment is intended to be used as a platform
for the demonstration of the Frontgrade Gaisler GR716 RAD Hard Microcontroller.
Furthermore, this board provides developers with a convenient hardware platform for the
evaluation and development of software for the GR716 microcontroller, and allows the
GR716-DEV board to be installed in a CPCI rack for further integration with other
development equipment.
The GR716 microcontroller features a fault-tolerant LEON3 SPARC V8 processor,
communication interfaces and on-chip ADC, DAC, Power-on-Reset, Oscillator, Brown-out
detection, LVDS transceivers, regulators to support for single 3.3V supply, ideally suited for
space and other high-rel applications.
Figure 3-1: GR716-CPCI-DEV Development Board

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
The board contains the following main items as detailed in section 0 of this document:
•CPCI 6U format (233.35 x 160mm)
•two sites for plug on modules with two 2x32 pin stackable 0.1” headers
•plug on board for configuration of interface routing to peripherals
•connector for single VIN power input (+5V to +12V)
•front panel with
o0.1” header connectors for 64 GPIO signals (plus ground)
oLED’s as status indicators for GPIO signals
otwo Spacewire connecotrs (MDM9S)
oconnector for SPI4Space interface (MDM9S)
oDIP switch for bootstrap settings
omini USB connector for FTDI-USB interface
oLED indicators for Power and ResetOut status
oRESET_IN and DSUBREAK push button switches
•on-board headers for ribbon cable connection to
oPacketwire interface
oCAN interface
oDSU plus UART interfaces
oMIL1553 interface
oSPI peripherals
•miniature coax connectors for 8 x ADC and 4 x DAC analog signals
•jumpers for power supply configuration
•on-board regulators converting from VIN to 3.3V & 1.8V
•sockets for optional on-board oscillator s for
oSYSCLK
oSPWCLK
oMIL1553CLK
oPWMCLK

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
3.2 Handling
ATTENTION: OBSERVE PRECAUTIONS FOR
HANDLING ELECTROSTATIC SENSITIVE DEVICES
This unit contains sensitive electronic components which can be damaged by Electrostatic
Discharges (ESD). When handling or installing the unit observe appropriate precautions
and ESD safe practices.
When not in use, store the unit in an electrostatic protective container or bag.
When configuring the jumpers on the board, or connecting/disconnecting cables, ensure
that the unit is in an un-powered state.
When operating the board in a 'stand-alone' configuration, the power supply should be
current limited to prevent damage to the board or power supply in the event of an over-
current situation.
This board is intended for commercial use and evaluation in a standard laboratory
environment, nominally, 20°C. All devices are standard commercial types, intended for use
over the standard commercial operating temperature range (0 to 70ºC).

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4 BOARD DESIGN
4.1 Board Block Diagram
The GR716-CPCI-DEV Board provides the electrical functions and interfaces as
represented in the block diagram Figure 4-1.
Figure 4-1: GR716-CPCI-DEV Board Block Diagram
Note that not all features and interfaces are simultaneously available since the pins of the
GR716 microcontroller have multiple functions. The available interfaces depends on the
configuration and programming of the registers of the GR716 microcontroller, and on the
connections made by the Interface Configuration Module.
EXPANSION
SLOT FOR
GR716-BOARD
EXPANSION
SLOT FOR
GR716-BOARD
DCDC
DCDC
3.3V VIN
FRONT PANEL
FRONT PANEL
EXPANSION
SLOT FOR
GR716-TEST-
MEMORY
OR USER
EXPANSION
EXPANSION
SLOT FOR
GR716-TEST-
MEMORY
OR USER
EXPANSION
GPIO (64x)
FTDI USB
GPIO-LED
(64x)
SPW
SPI4S
SPW/SPI4S
CAN
7 x UART
PW
MIL1553
2 x SPI
4 x DAC
8 x ADC
BOOTSTRAP
INTERFACE CONFIGURATION MODULE
INTERFACE CONFIGURATION MODULE

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.2 Board Mechanical Configuration
The board (233.35 x 160mm) and can be used 'stand-alone' on the bench-top simply an
external +12V power supply connected to connector J32.
A 6U format, 2 slot sized CPCI front panel is fitted to allow the board to be installed in a
CPCI rack.
Figure 4-2: GR716-CPCI-DEV Board Dimensions

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.3 GR716-BOARD and Expansion Boards
The GR716-CPCI-DEV provides two sites with two 2x32 pin headers to allow the board to
function as a carrier board for the GR716-BOARD (Figure 4-4).
The first set of headers (P1, P2) is intended for mounting the GR716-BOARD as shown in
Figure 4-3.
The second set of headers connect with a one-to-one correspondence with the first set
and is intended for the mounting a GR716-TEST-MEMORY board (Figure 4-5), to provide
the GR716-BOARD with extended FLASH and SRAM external memory.
Alternatively, the second set of headers provides a convenient way for User Defined
interface boards to be developed and connected to the GR716-CPCI-DEV, if other
functions or features are to be demonstrated.
Figure 4-3: GR716-BOARD mounted on a GR716-CPCI-DEV Carrier board

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.4 Interface Configuration Board
Since the GR716 microcontroller has pins with multiple functions, it is necessary to have a
way to route pins from the GR716-BOARD to the interface circuits in a way that prevents
signal and interface conflicts.
This is achieved on the GR716-CPCI-DEV board by means of Interface configuration
Boards as shown in Figure 4-6.
Figure 4-6: Interface Configuration Board
These boards can be configured by means of installing or removing solder bridges in order
to route connections from the GPIO pins of the GR716-BOARD to the interface circuits on
the GR716-CPCI-BOARD.
The organisation of the solder bridges corresponds with the organisation of the IO
Configuration Options shown in Table 7 of [RD1].
The Interface Configuration Board mounts on to the GR716-CPCI-DEV board underneath
the Expansion Board, as shown in Figure 4-7.
Figure 4-7: Installed Interface Configuration Board

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.5 GPIO
All 64 GPIO pins can be connected from the GR716-BOARD via the Expansion Connector
to the GR716-CPCI-DEV.
These 64 general Purpose Input Output signals (3.3V LVCMOS voltage levels) are
connected to a set of 0.1” pitch pin headers and from there via ribbon cable the front panel
of the GR716-CPCI-DEV board, thus allowing easy access to these signals, either
individually, or with a ribbon cable connection. A series protection resistor of 470 Ohm is
included on each signal at the front panel connector.
To indicate the state of the GPIO pins, LED indicators are provided on the front panel.
Figure 4-8: GPIO interface
Note that the state of some of the GPIO pins are sampled at power-up or reset of the
processor in order to determine initial conditions of a number of internal features, as listed
in Table 22 of [RD1] and as described in section 4.15.
4.6 SPW
The GR-CPCI-DEV board provides LVDS transceivers to connect the dedicated
SpaceWire interface signals of the GR716 microcontroller to a 10 pin header J7. This
header is connected with wire tails to a MDM9S connector on the front panel to provide a
standard SpaceWire interface.
4.7 SPI4S
The GR-CPCI-DEV board provides LVDS transceivers to connect the dedicated
SPI4SPACE interface signals of the GR716 microcontroller to a 10 pin header J8. This
header is connected with wire tails to a MDM9S connector on the front panel.
IO
CONFIG-
URATION
BOARD
PCB
64 GPIO[63..0]
SERIES
RESISTOR
470R
(x64)
GPIO[63..0]
GR716-
BOARD

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GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.8 LVDS
The dedicated LVDS interface signals from the GR716 microcontroller are connected to a
10 pin header J6. Depending on the configuration of the GR716 microcontroller and
Interface Configuration board,, this interface can be used as SpaceWire or as a
SPI4SPACE interface.
This header is connected with wire tails to a MDM9S connector on the front panel.
Figure 4-9: Dual purpose LVDS Signal Header
This equipment has SPW ports that use Low Voltage Differential
Signalling (LVDS) which has limited common mode voltage protection.
To avoid damage to the SPW interfaces due to common mode voltage
the following actions should be performed before the equipments that
will be connected by SpaceWire are powered on.
•Before connecting any SpaceWire cables, make sure that there is no voltage
difference between the different equipment grounds. E.g., measure the voltage
between the different equipment grounds with a voltmeter. The result should be
close to 0 V.
•After the SpaceWire cables are connected, make sure that the equipment grounds
are low ohmic connected to each other. E.g., measure the resistance between the
different equipment grounds with a multimeter in resistance mode. The result should
be less than 1 Ω.
The SPW standard specification specifies that the cable side outer shield is bonded to the
connector shell but does not say anything about the grounding/bonding of the connector
side shell. So, you can’t be sure that the different equipment grounds are connected only
by the SpaceWire cable.
In this equipment the SPW connector side shell is not connected to the local GND of the
SPW circuits. The users connecting the board to other equipment only via SPW should
ensure grounding via other means (e.g., a dedicated wire).

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Oct 2023, Version 1.0
4.9 UART-A / UART-B / UART-C
Three 20 pin headers are provided on the GR716-CPCI-DEV board to allow various
combinations of UART interfaces to be connected with a ribbon cable to a GR-ACC-6U-
UART accessory board. This can provide up to 6 UART interfaces with RS232
transceivers and standard DSUB-9S connectors
The Headers provide the following combinations of interfaces:
Header
J9
Header
J10
Header J11
Comment
UART0
UART2
UART4
RX, TX, CTSN, RTSN signals
UART1
UART3
UART5
RX, TX, CTSN, RTSN signals
UART2
UART4
UART0
RX & TX signal
UART3
UART5
UART1
RX & TX signal
UART4
UART0
UART2
RX & TX signal
-
UART1
UART3
RX & TX signal
UART-DSU
-
-
RX & TX signal
Table 1: UART interface Combinations
4.10 CAN
The CAN signals from the GR716-BOARD are connected to a header J12.
To provide the necessary CAN transceiver circuits, this header can be connected with a
ribbon cable to a GR-PCI-CAN accessory board.
4.11 MIL1553
The MIL1553 signals from the GR716-BOARD are connected to a header J13.
To provide the necessary MIL-1553 transceiver circuits, this header can be connected with
a ribbon cable to a GR-ACC-GR740 accessory board.
4.12 SPI0 / SPI1
The signals of the SPI0 and SPI1 interfaces from the GR716-BOARD are connected to a
header J14 & J15 respectively.
This header can be connected with a custom cable to a GR-ACC-GR740 accessory board.

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Oct 2023, Version 1.0
4.13 PACKETWIRE
The signals of the SPI0 and SPI1 interfaces from the GR716-BOARD are connected to a
header J16.
This header can be connected with a custom cable to a GR-TMTC-PW accessory board.
Note though that the GR-TMTC-PW does not accommodate the TX_READY and
RX_READY signals.
4.14 DAC0-3 & ADC0-7
The four DAC current outputs from the GR716-BOARD are connected to a miniature
MMCX coaxial connectors J17 to J20.
The eight ADC voltage inputs to the GR716-BOARD are connected to a miniature MMCX
coaxial connectors J21 to J27 and J29.
4.15 Bootstrap Signals
A number of features of the GR716 microcontroller are required to be set at power-on of
the processor, by means of bootstrap pins. A number of GPIO and function pins are pre-
defined for this purpose, according the definition Table 22 of [RD1].
To define the desired setting, an 8 pole, DIP switch (S1), is provided on the front panel of
the GR716-CPCI-DEV board to connect these signals to DGND or via pull-up to 3V3.
Note: A DIP switch for setting these Bootstrap signals also exists on the GR716-BOARD
([RD5]). The DIP switches on the GR716-BOARD should be set to ‘float’ to ensure that
there is no conflict with the DIP switch settings on the front panel of the GR716-CPCI-DEV
board.
Pin
Function
Open
Closed
Default
GPIO0
Disable EDAC
‘1’
‘0’
‘1’
GPIO17
Bypass Internal Boot Prom
‘1’
‘0’
‘0’
GPIO62
Enable Memory Test
‘1’
‘0’
‘0’
GPIO63
Redundant Memory Available
‘1’
‘0’
‘0’
DSUTX
Copy ASW image/SPW default frequency
‘1’
‘0’
‘0’
SPIM_MOS
I
Remote Access/Boot from Memory
‘1’
‘0’
‘0’
SPIM_SCK
Boot Source 0
‘1’
‘0’
‘0’
SPIM-SEL
Boot Source 1
‘1’
‘0’
‘0’
Table 2: Bootstrap Resistor Settings

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
4.16 Debug Support Unit Interfaces
Program download and debugging to the processor is performed using the GRMON
Debug Monitor tool from Frontgrade Gaisler ([RD4]). The GR716 microcontroller provides
a UART based DSU interface for Debug and control of the processor by means of a host
terminal, as represented in Figure 4-10.
Four control signals from the Debug Support Unit interface to the processor are
implemented:
DSUTX Debug UART Transmit
DSURX Debug UART Receive
DSUEN This signal is pulled high on the board to enable Debugging
DSUBRE This signal is pulled low on the board
These signals are connected via the Expansion Connector interface from the GR716-
BOARD to an FTDI USB interface. This allows a USB connection to be made to a host
computer.
Figure 4-10: Debug Support Unit connections

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Oct 2023, Version 1.0
4.17 Oscillators and Clock Inputs
The GR716-CPCI-DEV Board provides four DIL sockets to allow an external oscillator
clocks to be connected to the following clock inputs of the GR716 microcontroller:
EXT_SYSCLK
EXT_SPWCLK
EXT_1553_CLK
EXT_PWMCLK
For more details of the internal Crystal Oscillator, PLL structure and clock gating features
of the GR716, please refer to sections 9 and 10 of [RD1].
4.18 Power Supply and Voltage Regulation
The power configuration is represented in Figure 4-11.
The main voltage supply input can be provided from one of the following sources:
1. VIN input supply via connector J33.
2. VIN input supply via connector J34.
3. VIN provided via CPCI Backplane connector.
VIN is regulated on the GR716-CPCI-DEV board to with a local Point-of-Load DC/DC
converter to generate a +3V3 voltage supply for the local circuits on the GR716-CPCI-DEV
board.
VIN is also connected to the GR716-BOARD via the expansion connector P2, where it is
further regulated for the GR716 microcontroller, as described in [RD5].
The VIN voltage should have a nominal value of 12V. However, due to the wide input
voltage range capability of the POL DC/DC converters used, the input voltage may range
from 5V to 17V.
Note though that, due to the 15V transzorb protection diode on the GR716-CPCI-DEV
board, the input voltage on this board should not exceed 14.5V.

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GR716-CPCI-DEV
GR716-CPCI-DEV-UM
Oct 2023, Version 1.0
Figure 4-11: Power Regulation Scheme
4.19 Reset Circuit and Button
The GR716 microcontroller includes an internal RESET circuit with Brown-out detector to
reset the processor and its peripherals (see section 8 of [RD1]).
The resulting low reset signal is present on the microcontroller pin RESET_OUT_N. This
signal is connected to the expansion connector, P2.
A manual reset of the microcontroller can be generated using the RESET_IN_N signal.
This signal is present on the expansion connector P2, and can be driven from an external
circuity if required. A miniature push button switch is provided on the front panel of the
GR716-CPCI-DEV board to pull this signal low, when the button is pressed.
J33
+3V3
DCDC
5V min
12V nom
14.5V max
LMZ21701
1A max
+3V3
CPCI
CONNECTOR
J32
+VIN
EXPANSION
CONNECTOR
P2
EXPANSION
CONNECTOR
P4
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