Furuno GN-86F User manual

FURUNO GPS/ GNSS Receiver
Model: GN-86/87, GV-86/87 and
GT-86/87 Series
User’s Design Guide
(Document No. SE13-900-001-06)

FURUNO ELECTRIC CO., LTD. All rights reserved.
FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
IMPORTANT NOTICE
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mechanical, including photocopying and recording, for any purpose without the express written
permission of the publisher, FURUNO ELECTRIC CO., LTD.
FURUNO ELECTRIC CO., LTD. All Rights Reserved
FURUNO ELECTRIC CO., LTD. reserves the right to make changes to its products and specifications
without notice.
You expressly acknowledge and agree that use of the "Application Note" is at your sole risk.
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defects in the "Application Note" will be corrected.
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FURUNO ELECTRIC CO., LTD. All rights reserved.
FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Revision History
Version
Description
Date
0
Initial release
2013.06.07
1
2nd preliminary release
2013.06.14
2
3rd preliminary release
2013.07.18
3
Formal revision release
2013.12.11
4
Corrected Figure 3-1, 3-2 and 3-6
Updated Chapter 1, Chapter 6 and Contact Information
2014.10.09
5
Corrected the cover
2015.05.26
6
Corrected section 3.5.1
2015.10.30

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Table of contents
1General Description········································································································1
2RF Section PCB Layout Design························································································1
2.1PCB Ground Layout Design·······················································································3
2.2 Microstrip Line Design ······························································································4
2.3 ESD protection by λ/4 short stub················································································6
2.4 DC Feed Inductor······································································································8
3Antenna Interface ·········································································································11
3.1 LNA Gain Selection·································································································11
3.2 Bias Circuit Design for Active Antenna ·····································································12
3.3 Passive Antenna Connection ···················································································13
3.4 SAW Filter Insertion ································································································14
3.5 Antenna Detection Circuit························································································15
3.5.1 Antenna Detection Circuit Overview ···································································15
3.5.2 Antenna Detection/Protection Circuit··································································16
3.5.3 Modification of Antenna Short/Open Threshold ···················································18
3.5.4 Modification of Over Current Protection Threshold ··············································18
3.6 Layout design with Patch Antenna ···········································································19
3.6.1 Incurrence to Antenna characteristics by layout ··················································19
3.6.2 Noise Influence Issue by Layout·········································································24
4Bypass Capacitor for VCC·····························································································25
5Mechanical Stress Control·····························································································25
6Related Documents ······································································································26
7Contact Information······································································································26

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
1 General Description
This document presents the useful design guidance to improve the performance and the quality of our
customers’ products that contain FURUNO 86/87 series GPS/GNSS receiver modules (86/87 series
module) listed as below.
- GN-86F - GV-86 - GT-86
- GN-87F - GV-87 - GT-87
- GN-8615 - GV-8615
- GN-8715 - GV-8715
Please insure the quality of your own design with the final design guide.
2 RF Section PCB Layout Design
Figure 2-1 shows an overview of the RF section PCB design for using the active antenna.
39nH inductor is placed to bias the active antenna, 33pF capacitor is placed to block the DC voltage, and
λ/4 short stub works to bypass ESD noise to the ground.
The line from the antenna connector to RF_IN pin through 33pF capacitor should be designed to have 50Ω
characteristic impedance with using the PCB design technique known as microstrip line. Since the input
impedance of 86/87 series module is design to be 50Ω, so it is not needed to place 50Ωmatching network
between the antenna connector through the receiver RF_IN pin.
:λ/4 Short Stub Block
:Active Antenna Power Supply Line
: 1.5GHz / 1.6GHz 50ΩMicrostrip Line
: Ground
39nH DC Feed Inductor
33pF Capacitor
Antenna Connector
(for connecting an active
antenna)
#11 RF_IN
#12 GND
#10 GND
86/87 Series
Module
λ/4 Short Stub
50ΩMicrostrip Line
Figure 2-1 RF Section PCB Layout Design Overview for Active Antenna

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Figure 2-2 shows an overview of the RF section PCB design for using the passive antenna.
There is no need to bias the antenna, so 39nH inductor and 33pF capacitor are removed from Figure 2-1.
But λ/4 short stub is placed to keep the higher robustness against ESD noise.
The routing between the passive antenna and RF_IN should be designed as 50Ωmicrostrip line, and there
is no need to place any matching network externally as same as the active antenna case.
:λ/4 Short Stub
: 1.5GHz / 1.6GHz 50ΩMicro Strip Line
: Ground
Passive Antenna
(Patch Antenna)
#11 RF_IN
#12 GND
#10 GND
86/87 Series
Module
λ/4 Short Stub
50ΩMicrostrip Line
Figure 2-2 RF Section PCB Layout Design Overview for Passive Antenna

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
2.1 PCB Ground Layout Design
At the bottom of the module, there are some signal lines and via holes. For avoiding any signal shortage,
please do not put any signal line nor via hole at the part of the user’s board where is facing to the bottom of
the module. This also contributes to reduce noise influence.
If a double-sided board is used, the back side of the RF line should be a ground plane. If a multi-layer board
is used, the 2nd layer below the RF line should be a ground plane.
For better noise suppression, the guarding ground plane around the RF signal line is also recommended.
Details are described in Section 2.2.
33pF Capacitor
Antenna
Connector
#11 RF_IN
#12 GND
#10 GND
86/87 Series
Module
λ/4 Short Stub
50ΩMicro Strip Line
Jumper Resistor
DC Feed Inductor
(39nH)
Figure 2-3 An Example of PCB Design around RF Section in Evaluation Kit

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
2.2 Microstrip Line Design
The PCB design of RF line from the antenna connector to RF_IN pin is very important for keeping the
reception sensitivity performance of the receiver module. For achieving the best performance, please
follow the design guidelines below.
- Use the microstrip line for RF line to keep 50Ω characteristic impedance.
- Make the length of RF line as short as possible.
- Do not place any digital signal source nor signal line around RF line.
- Use guarding ground plane for decoupling the noise source such as Figure 2-6.
The microstrip line is the most popular technique to obtain 50Ω characteristic impedance line on usual PCB.
The basic structure is shown at the bottom-right in Figure 2-4. The conductor part at the upper side is the
signal transmission path, and the conductor part at the lower side is ground. The characteristic impedance
(Zc) of microstrip line is determined by the following parameters relevant to the specifications of PCB
materials.
- Dielectric constant of PCB: Er
- Distance between signal line and ground: H
- Signal line thickness: Tmet
- Signal line width: W
For the calculation of the characteristic impedance, Microstrip Analysis/Synthesis Calculator(*1) (MASC) is
recommended, which is a free software, useful to design the microstrip line onto customer’s board. Figure
2-4 shows an example of the calculation result by MASC. For details, please see the web site below.
The transmission loss per length of the microstrip line is determined by the following parameters relevant to
the specifications of PCB materials.
- Metal resistivity relative to copper: Rho
- Loss tangent of the dielectric: Tanσ
- Metal surface roughness: Rough
Figure 2-4 also contains the calculation result of the transmission loss by MASC.
Note: (*1) Microstrip Analysis/Synthesis Calculator (Copyright (c) 1994-2003, 2010 Dan McMahill All rights
reserved). See URL below.
http://mcalc.sourceforge.net/,
Figure 2-4 An Example of Microstrip Line Design by MASC

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Figure 2-5 shows Transmission Loss-Frequency characteristics of the microstrip line shown in Figure 2-4. It
is simulated by Agilent ADSTM.
Figure 2-5 Simulation Result on Transmission Loss-Frequency Characteristics of the Microstrip line
by Agilent ADSTM
Usually the microstrip line is routed at the surface layer of the PCB, and it is not protected from the radio
interference. So sometimes the interference causes the degradation of the receiver performance. In such
case, the guarding ground plane can improve the performance with decoupling the interference noise
source. The guarding ground plane is the ground placed around the microstrip line as shown in Figure 2-6.
The important thing for designing and layouting the guarding ground plane is to keep the gap between the
microstrip line and guarding ground plane wider than the microstrip line width. Otherwise this line is not able
to work as microstrip line but coplanar line.
Figure 2-6 Example of Layout of Microstrip Line
MSub MLIN
MSUB Term Term
TL7
MSub1 Term1 Term2
L=23.5 mm
W=0.31 mm
Subst="MSub1"
Cond=5.96e7
Rough=0.00127 mm
TanD=0.018
T=0.043 mm
Hu=1000 mm
Mur=1
Er=4.3
H=0.178 mm
Z=50 Ohm
Num=1 Z=50 Ohm
Num=2
0.5 1.0 1.5 2.0 2.50.0 3.0
-1.75
-1.50
-1.25
-1.00
-0.75
-0.50
-0.25
-2.00
0.00
freq, GHz
dB(S(2,1))
1.598G
-182.0m
m1
Transmission, dB
m1
freq=
dB(S(2,1))=-0.181
1.589GHz

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
2.3 ESD Protection by λ/4 Short Stub
The implementation of λ/4 short stub is the best way to improve the product’s robustness against ESD
coming through RF line. λ/4 short stub is structured with the microstrip line, and the input impedance
depends on the electrical length of it. So it is very important to design the electrical length of λ/4 short stub
correctly.
Well-designed λ/4 short stub has features as below.
- High impedance in GPS/GNSS signal frequency band to minimize the insertion loss.
- Low impedance in other frequency band to bypass the ESD energy to ground.
- No additional component required.
MASC is also very useful to design λ/4 short stub correctly and efficiently. Figure 2-7 shows an example of
calculation result.
In case of using 87 series module, which can receive GPS/Galileo and GLONASS, the frequency should be
set to 1,589 MHz as the center frequency of both constellations. In case of using 86 series receiver module,
it should be set to 1575.42 MHz as the center frequency of GPS/Galileo signal.
Figure 2-7 An Example of λ/4 Short Stub Line Length Design by MASC
Figure 2-8 shows an example of the simulation result on Insertion Loss-Frequency characteristics of λ/4
short stub shown in Figure 2-7 by using Agilent ADSTM software. This result shows the insertion loss will be
only 0.281 dB at 1.589 GHz, and the variation of insertion loss between 1.234 GHz to 1.830 GHz is less
than 0.1 dB. It means that the λ/4 short stub design is not critical against the in insertion loss.
In case of using active antenna, this loss is compensated by the LNA in the active antenna, and the total
system NF (Noise Figure) won’t be changed. Therefore there is no negative impact from inserting λ/4 short
stub in this case.
In case of using passive antenna, it can cause the degradation of receiver sensitivity. However, the loss
itself is very small, and the benefit to implement the λ/4 short stub is significant for protecting the module
from ESD stress. Therefore it is highly recommended to install λ/4 short stub even in the passive antenna
case.

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Figure 2-8 Insertion Loss-Frequency Characteristics with λ/4 Short Stub by Agilent ADSTM
Microstrip Line
1/Lambda Short Stub
MSub MLIN MLIN
MLIN
MSUB
Term
Term
TL2 TL3
TL4
MSub1
Term1
Term2
L=18 mm
W=0.31 mm
Subst="MSub1"
L=5.5 mm
W=0.31 mm
Subst="MSub1"
L=26.85 mm
W=0.3 mm
Subst="MSub1"
Cond=5.96e7
Rough=0.00127 mm
TanD=0.018
T=0.043 mm
Hu=1000 mm
Mur=1
Er=4.3
H=0.178 mm
Z=50 Ohm
Num=1
Z=50 Ohm
Num=2
m2
freq=
dB(S(2,1))=-0.378
1.830GHz
m1
freq=
dB(S(2,1))=-0.378
1.234GHz
m3
freq=
dB(S(2,1))=-0.281
1.589GHz
0.5 1.0 1.5 2.0 2.50.0 3.0
-4.5
-4.0
-3.5
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
-5.0
0.0
freq, GHz
dB(S2,1)
1779300000.000
-0.346
m2
1.257G
-362.8m
m1
Readout
m3
Transmission, dB
m2
freq=
dB(S(2,1))=-0.378
1.830GHz
m1
freq=
dB(S(2,1))=-0.378
1.234GHz
m3
freq=
dB(S(2,1))=-0.281
1.589GHz
wi 1/Lambda
Short Stub
wo 1/Lambda
Short Stub

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
2.4 DC Feed Inductor
For biasing an active antenna, an inductor is used to superpose DC voltage to RF line as a general method.
In this case, the inductor must be selected to minimize the effect to the RF line characteristics, especially
the characteristic impedance. Also the inductor needs to have enough current supply capability against the
active antenna combined.
The guidelines to choice the inductor are shown below.
1. Need to have higher self-resonance frequency (SRF) than GPS/GNSS signal frequency.
2. Need to have high impedance in GPS/GNSS signal frequency band.
3. Need to have lower insertion loss in GPS/GNSS signal frequency band.
4. Need to have enough absolute maximum current ratings against current consumption of the active
antenna.
Table 2-1 shows an example of inductor specifications, which is from HK1005 series data sheet made by
TAIYO YUDEN. And also Figure 2-9 shows Impedance-Frequency characteristics of HK1005 series.
Table 2-1 Specifications of HK1005 Series
Part Number
Inductance
Q (min)
Rated
Current (max)
DC Resistance
(max)
HK100515NJ-T
15nH
8
300mA
0.46Ω
HK100518NJ-T
18nH
8
300mA
0.55Ω
HK100522NJ-T
22nH
8
300mA
0.6Ω
HK100527NJ-T
27nH
8
300mA
0.7Ω
HK100533NJ-T
33nH
8
200mA
0.8Ω
HK100539NJ-T
39nH
8
200mA
0.9Ω
HK100547NJ-T
47nH
8
200mA
1Ω
HK100556NJ-T
56nH
8
200mA
1Ω
HK100568NJ-T
68nH
8
180mA
1.2Ω
HK100582NJ-T
82nH
8
150mA
1.3Ω
HK1005R10J-T
100nH
8
150mA
1.5Ω
According to the guideline #1:
The peak of each impedance curve in Figure 2-9 shows the self-resonance phenomenon, and the
frequency at the peak means the SRF of each inductor. It is shown that SRF of HK100582NJ-T (82nH) is
lower than GPS/GNSS band. Also SNR of HK100568NJ-T (68nH) and HK100556NJ-T (56nH) are too close
to GPS/GNSS band. So these three inductors are not eligible.
According to the guideline #2:
From Figure 2-9, it is also readable that the inductor that has a bigger inductance has a higher impedance
in GPS/GNSS band. So HK100547NJ-T or HK100539NJ-T will be the best candidates.
According to the guideline #3:
Figure 2-10 shows the simulation result of the insertion loss. In this figure, HK100547NJ-T and
HK100539NJ-T show similar insertion losses, so both can be used for the DC feed inductor.
According to the guideline #4:
The judgment according to the guideline #4 depends on the specifications of the active antenna that is
combined and used together with 86/87 series module. In general, commercial active antennas require
30mA or less for LNA bias current, and HK1005 series inductor can supply 150mA or more, so this series
can be used for almost applications.
From above verifications, HK100539NJ-T is recommended. This device is also selected for FURUNO 86/87
series module Evaluation Kit.
This type of SMD component has many second sources and similar series. If the other manufacturer’s
component or the other series component is used, it is recommended to gather all the necessary
information from the provider, and to study through the guidelines as above.

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
Figure 2-9 Impedance-Frequency Characteristics of HK1005 Series
Figure 2-10 Insertion Loss by Implementing HK1005 Series @1589MHz
0
0.02
0.04
0.06
0.08
0.1
0.12
0.14
HK100515NJ-T
HK100518NJ-T
HK100522NJ-T
HK100527NJ-T
HK100533NJ-T
HK100539NJ-T
HK100547NJ-T
HK100556NJ-T
HK100568NJ-T
HK100582NJ-T
HK1005R10J-T
Loss [dB]

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
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It is recommended that DC Feed Inductor is placed close to the microstrip line as much as possible. If the
soldering pad of the inductor is smaller than the width of the microstrip line, it should be placed on the
microstrip line without any routing as shown in Figure 2-11.
Microstrip line
No Good Good
Figure 2-11 Recommended Layout of DC Feed Inductor at Microstrip Line

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
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3 Antenna Interface
3.1 LNA Gain Selection
86/87 series modules have selectable gain LNA inside, which is able to be set to high gain mode or low gain
mode for adapting various antennas. The high gain mode is applicable for using the passive antenna or the
low gain active antenna, and the low gain mode for using the high gain active antenna, as shown in Table
3-1.
Table 3-1 Internal LNA Select Configuration
Antenna
LNA Config
Notes
Passive Antenna or
Low Gain Active Antenna
(Total Gain: 0 - 35 dB)
High Gain Mode
“High Gain Mode Antenna configuration the
input of LNA in the active antenna to RF_IN
of the module. It should include all the
transmission losses such by coaxial cable,
SAW filter (if inserted), the microstrip line,
λ/4 short stub and so on.
High Gain Active Antenna
(Total Gain: 15 - 50 dB)
Low Gain Mode
For obtaining the better jamming immunity, the total gain of the active antenna must be lower as possible in
the total gain window shown in Table 3-1. For example, in case of using the low gain mode, 15dB total gain
antenna will show the best jamming immunity.
If the total gain is between 15dB to 35dB, it is recommended to use low gain mode. It also contributes to
obtain lower power consumption.
There are two ways to configure the LNA gain as below:
- Connect FLNA pin to VCC or not (Hardware configuration)
- Feed ANTSEL command through serial communication channel (Software configuration)
Table 3-2 shows the configuration with using FLNA pin setting. And Table 3-3 shows the serial commands
to configure the LNA gain via serial communication channel. The serial commands have higher priority than
FLNA pin setting, and FLNA pin setting is ignored once the serial commands are fed. So DO NOT send
ANTSEL commands when FLNA pin setting is used for configuration.
Table 3-2 Selection of LNA by FLNA Pin Setting
LNA
FLNA
Condition of ANTSEL
High Gain
Open
DO NOT send command.
Low Gain
High (connect to VCC)
Table 3-3 Selection of LNA by ANTSEL Command
LNA
ANTSEL command
Condition of FLNA
High Gain
$PERDSYS,ANTSEL,FORCE1H*7F
These ANTSEL command is prioritized
higher than FLNA pin setting. So once
these commands are issued, FLNA pin
setting is ignored.
Low Gain
$PERDSYS,ANTSEL,FORCE1L*7B

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
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3.2 Bias Circuit Design for Active Antenna
86/87 series module supports two ways to bias the active antenna. One is to use VCC_RF pin, which is
designed to supply the antenna power from the module, as shown at the left side in Figure 3-1. The other is
to provide from an independent antenna power (VANT) which is prepared by customer’s system, as shown
in the right side.
In case of using VCC_RF, the antenna bias voltage is same with VCC voltage provided to the module by
customer’s system. Therefore, if the active antenna requires different voltage like 5VDC, customer’s system
needs to prepare the required voltage as VANT and feed it to the antenna connector through the inductor
as shown at the right side in Figure 3-1.
VCC_RF
Externalpowersupply
ANT_DET1
ANT_DET0
FLNA
RF_IN
Active antenna
LNA
VCC_RF
VCC
33pF
L DC FEED
VCC_RF
ANT_DET1
ANT_DET0
FLNA
RF_IN
Active Antenna
LNA
VANT
VCC
L DC FEED
Figure 3-1 Active Antenna Power Supply Configuration
Figure 3-2 shows the insertion of the antenna detection circuit. Details are described in Section 3.5.
VCC_RF
ANT_DET1
ANT_DET0
FLNA
RF_IN
Active Antenna
LNA
L DC FEED
VANT
Antenna
Detection
Circuit
Antenna Biasing Circuit
VCC
Figure 3-2 In Case of Using Antenna Detection Circuit

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FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
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3.3 Passive Antenna Connection
Figure 3-3 shows the simplest circuit for passive antenna connection. Since the LNA in the module should
be configured to high gain mode for passive antenna, so FLNA pin is left Open (no connection). The routing
between the passive antenna and RF_IN pin should follow the microstrip line design rule as described in
Section 2.2.
The sensitivity of 86/87 series module, that is described in the hardware specifications, is defined by the
signal level at RF_IN pin. If the customer’s product is required to achieve the system sensitivity same as the
module sensitivity, the length of the cable and/or PCB routing between the passive antenna and RF_IN
should be zero. In other words, the transmission loss from the passive antenna through RF_IN directly
degrades the sensitivity of the system, for example, if the loss of this part is 3dB, then the system sensitivity
will be 3dB worse than the module sensitivity.
Passive Antenna
VCC_RF
RF_IN
FLNA
ANT_DET1
ANT_DET0
Figure 3-3 Most Simple Passive Antenna Configuration
In case the distance between passive antenna and the receiver module is long, and the transmission loss of
this routing is not negligible, it is needed to add LNA near the passive antenna as shown in Figure 3-4. If the
coaxial cable is used for the connection between the passive antenna and RF_IN, and the loss of the
coaxial cable is not negligible, it is recommended to switch to the appropriate active antenna.
Passive Antenna
VCC_RF
RF_IN
FLNA
ANT_DET1
ANT_DET0
LNA
VCC
Figure 3-4 Passive Antenna Configuration with External LNA

14
FURUNO ELECTRIC CO., LTD. All rights reserved.
FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
3.4 SAW Filter Insertion
86/87 series module contains SAW filter after the internal LNA, so normally it is not necessary to insert
SAW filter on the user’s board. But if the antenna receives very strong interference signal, it can cause the
saturation of the internal LNA, then the reception performance can be degraded. In such case, inserting
SAW filter between the antenna and RF_IN pin can improve the performance. If the system is required to
work under the strong interference environment, it is recommended to insert SAW filter on the user’s board
as below.
When the active antenna is used, SAW filter should be placed between the capacitor and RF_IN pin as
shown in Figure 3-5 (left). SAW filter has an insertion loss, generally 1dB to 2dB, but the insertion loss is
negligible if the LNA in the active antenna has enough gain. If the total gain including SAW filter’s insertion
loss is in the adequate range shown in Table 3-1, no sensitivity degradation occurs.
When the passive antenna is used, SAW filter should be placed simply between the passive antenna and
RF_IN pin as shown in Figure 3-5 (right). In this case, the reception sensitivity will be degraded 1dB to 2dB
due to the insertion loss of SAW filter. But still enough sensitivity is kept for normal usage.
ANT_DET1
ANT_DET0
FLNA
RF_IN
Active antenna
LNA
VCC_RF
VCC
L DC FEED
SAW filter
DC block Capacitor
33pF
Passive Antenna
VCC_RF
RF_IN
FLNA
SAW Filter
ANT_DET1
ANT_DET0
Active Antenna
Passive Antenna
Figure 3-5 Antenna Configuration with SAW Filter

15
FURUNO ELECTRIC CO., LTD. All rights reserved.
FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
3.5 Antenna Detection Circuit
3.5.1 Antenna Detection Circuit Overview
86/87 series module has two digital input pins (ANT_DET0 and ANT_DET1) to sense the status of the
active antenna connection. These 2 input pins are designed to recognize 3 states of the antenna
connection, that are “Antenna Open”, “Normal” and “Antenna Short”, and the status is reported to the host
system via the serial communication channel.
For enabling this feature, Antenna Detection Circuit needs to be placed between the DC feed inductor and
VANT, as shown in Figure 3-6. The details of the antenna detection circuit are described in Section 3.5.2.
VCC_RF
ANT_DET1
ANT_DET0
FLNA
RF_IN
Active Antenna
LNA
Antenna
Detection
Circuit
TXD
RXD
$PERDSYS,GPIO*67
$PERDSYS,GPIO...
Input
Output
VCC
Under Current Detect
Over Current Detect
L DC FEED
Antenna Biasing Circuit
VANT
Figure 3-6 Active Antenna Configuration with Antenna Detection Circuit
The NMEA sentence of “$PERDSYS,GPIO” is used to report the antenna status to the host system. When
the module receives NMEA command “$PERDSYS,GPIO*67”, the receiver responds once with transmitting
the NMEA sentence shown below, which contains 2 bits to copy the status of ANT_DET0 and ANT_DET1
pins. The logic of these 2 bits is shown in Table 3-4.
Table 3-4 Relation ANT_DET0 and ANT_DET1 to Status of Antenna Connection
Status of antenna connection
ANT_DET0
ANT_DET1
Antenna open
1
1
Normal
0
1
Antenna short
0
0
Undefined
1
0
$
PERDSYS
,
GPIO
,
X X
H
H
L
L
L L L
*
0
7
ANTDET
_
1
ANTDET
_
0

16
FURUNO ELECTRIC CO., LTD. All rights reserved.
FURUNO GPS/GNSS Receiver 86/87 Series User's Design Guide
SE13-900-001-06
3.5.2 Antenna Detection/Protection Circuit
The Antenna Detection Circuit, shown at the right side in Figure 3-8, contains one sensing resistor (R1) and
two comparators. The sensing resistor is inserted between VANT and the antenna connector, and all the
antenna bias current runs through this, so the voltage drop (VANT –VDET) is proportional to the antenna
bias current. Two comparators compare VDET with two threshold voltages, VREF_O for detecting Antenna
open state and VREF_S for Antenna short state, and create ANT_DET0 and ANT_DET1 signals. Note that
VREF_O is always higher than VREF_S.
If VDET is higher than VREF_O, ANT_DET0 and ANT_DET1 are both set to “1”. This shows “Antenna open”
state. If VDET is lower than VREF_O but higher than VREF_S, ANT_DET0 is set to “0” and ANT_DET1 is
set to “1”. This shows “Normal” state. And if VDET is lower than VREF_S, ANT_DET0 and ANT_DET1 are
both set to “0”. This shows “Antenna short” state. Figure 3-7 shows the relation between the bias current
and two detection bits, ANT_DET0 and ANT_DET1.
It is recommended to implement Over Current Protection Circuit for preventing any potential incident in the
market field. The Over Current Protection Circuit, shown at the left-upper side in Figure 3-8, contains two
transistors and resistors. Once the antenna bias current increases, the voltage drop at R2 also increases,
Q1 turns on, the bias voltage of Q2 decreases, then the antenna bias current decrease. Note that the
maximum current (shown as “IOC” in Table 3-5) keeps flowing even if the antenna connector is shorted to
ground.
The threshold currents of the Antenna Detection Circuit and the maximum current of the Over Current
Protection Circuit are determined by the combination of resistor values and VANT. Table 3-5 shows the
specifications of these circuits with the resistor values shown in Figure 3-8 and Table 3-6.
It is possible to change these thresholds and limitation with changing resistor values. Details are described
in Section 3.5.3 and 3.5.4.
Table 3-5 Specifications of Sample Circuit Shown in Figure 3-8
@TA=25°C
Antenna power supply voltage(VANT)
5V [typ]
Threshold of antenna open(IANT_O):
6 mA [typ]
Threshold of antenna short (IANT_S):
64 mA [typ]
Over current limitation (IOC):
117 mA [typ]
IOC
IANT_O
IANT_S
ANT_DET0/
ANT_DET1 11 01 11 01 00
t
(6mA)
(64mA)
(117mA)
Figure 3-7 Relation between IANT and ANT_DET0/1 bits
△2
△2
△3
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