Good Display GDEH075Z90R User manual

7.5 inch
E-paper Display Series
GDEH075Z90R
Dalian Good Display Co., Ltd.
GOOD DISPLAY

Product Specifications
Customer Standard
Description 7.5” E-PAPER DISPLAY
Model Name GDEH075Z90R
Date 2020/07/15
Revision 1.0
Design Engineering
Approval Check Design
Zhongnan Building, No.18, Zhonghua West ST,Ganjingzi DST,Dalian,CHINA
Tel: [phone] Fax: [phone]-810
Email: [email protected]
Website: www.good-display.com
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Table of Contents
1. General Description....................................................
1.1 Overview............................................................
1.2 Feature ..............................................................
1.3 Mechanical Specification........................................
1.4 Mechanical Drawing of EPD module .......................
1.5 Input/Output Terminals........................................
1.6 Reference Circuit ................................................
2. Environmental............................................................
2.1 Handling, Safety and Environmental Requirements...
2.2 Reliability test.....................................................
3. Electrical Characteristics .............................................
3.1 Absolute maximum rating.....................................
3.2 DC Characteristics..............................................
3.3 Serial Peripheral Interface Timing .........................
3.4 Power Consumption..............................................
4. Typical Operating Sequence.........................................
4.1 Normal Operation Flow.........................................
5. Command Table.........................................................
6. Optical characteristics.................................................
6.1 Specifications ....................................................
6.2 Definition of contrast ratio...................................
6.3 Reflection Ratio..................................................
7. Point and line standard...............................................
8.Packing.....................................................................
9. Precautions ..............................................................
5
5
5
5
6
7
9
10
11
11
13
14
14
14
15
15
20
20
21
33
33
34
34
35
37
38
1.7 Matched Development Kit .....................................
3.5 MCU Interface..................................................... 16
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Version Content Date Producer
1.0 New release 2020/07/15
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1. General Description
1.1 Overview
GDEH075Z90R is an Active Matrix Electrophoretic Display (AMEPD), with interface
and a reference system design. The 7.5” active area contains528×880 pixels, and
has 1-bit B/W/R full display capabilities. An integrated circuit contains gate buffer,
source buffer, interface, timing control logic, oscillator, DC-DC. SRAM.LUT, VCOM
and border are supplied with each panel.
1.2 Features
● 528×880 pixels display
● High contrast
● High reflectance
● Ultra wide viewing angle
● Ultra low power consumption
● Pure reflective mode
● Bi-stable display
● Commercial temperature range
● Landscape, portrait modes
● Hard-coat antiglare display surface
● Ultra Low current deep sleep mode
● On chip display RAM
● Low voltage detect for supply voltage
● High voltage ready detect for driving voltage
● Internal temperature sensor
● 10-byte OTP space for module identification
● Waveform stored in On-chip OTP
● Serial peripheral interface available
● On-chip oscillator
● On-chip booster and regulator control for generating VCOM, Gate and Source
driving voltage
● I2C signal master interface to read external temperature sensor/built-in
temperature sensor
1.3 Mechanical Specifications
Parameter Specifications Unit Remark
Screen Size 7.5 Inch
Display Resolution 880(H)×528(V)Pixel Dpi:137
Active Area 163.24(H)×97.94(V) mm
Pixel Pitch 0.1855×0.1855 mm
Pixel Configuration Rectangle
Outline Dimension 170.2(H)×111.2 (V) ×1.25(D) mm
Weight 31±0.2 g
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DESCRIPTION: DATE
PROJECTIONP/N
DETAL "A"(1:1)
date
sighature
A0 confirmed
PI Stiffener T=0.2MM
6.00
Total 0.95±0.1
Silicon-Glue
FPC 0.10±0.03
*FPC+PI Stiffener
Total Tickness0.30±0.03
Edge Sealing
*0.15±0.03
*0.50±0.03
*11.50±0.05
*12.50±0.2
24 1
*TFT OD 111.20±0.2
*TFT OD 170.20±0.2
*TFT AA 163.24±0.1
*TFT AA 97.94±0.1 3.48
*79.90
*24.00
BOTTOM VIEW
SIDE VIEWFRONT VIEW
Bending Area, Soft process
A
3.48
HSF
*24.00
VCOM
VGL
VSL
VGH VSH1
VPP VDD VSS
VCI
VDDIO
SDA SCL
CS#
D/C#
RES#
BUSY
BS1
TSDA
PIN SIGNAL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
NC
GDR RESE
NC
VSH2 TSCL
?
1.70
6.90
10.90
5.52
5.52
3.45
1.85
此位置需半切
NOTES:
1.
DISPALY MODE 7. 5" ARREY FOR EPD;
2.
DRIVE IC: SSD1677
3.
RESOLUTION:528gate X 880source;
4.
pixel size:O. 1855mm X 0. 1855mm;
5.
Unspecified Tolerance:
士
0.20;
6.
Material conform to the ROHS standard
7. * as the focus control si
在
DALIAN GOOD DISPLAY CO., LTD
ALL UNITS: mm
DWN:
CHK:
APP:
DATE
2019.08.26
MODEL NUMBER :
GDEH75Z90R
SHEET: 1
DATE: 2019.08.26
1.4 Mechanical Drawing of EPD module
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1.5 Input/Output Terminals
Pin # Single Description Remark
1 NC No connection and do not connect with other NC pins Keep Open
2 GDR N-Channel MOSFET Gate Drive Control
3 RESE Current Sense Input for the Control Loop
4 NC No connection and do not connect with other NC pins e Keep Open
5 VSH2 Positive Source driving voltage
6 TSCL I2C Interface to digital temperature sensor Clock pin
7 TSDA I2C Interface to digital temperature sensor Date pin
8 BS1 Bus selection pin Note 1.5-5
9 BUSY Busy state output pin Note 1.5-4
10 RES # Reset Note 1.5-3
11 D/C # Data /Command control pin Note 1.5-2
12 CS # Chip Select input pin Note 1.5-1
13 SCL serial clock pin (SPI)
14 SDA serial data pin (SPI)
15 VDDIO Power for interface logic pins
16 VCI Power Supply pin for the chip
17 VSS Ground
18 VDD Core logic power pin
19 VPP Power Supply for OTP Programming
20 VSH1 Positive Source driving voltage
21 VGH
Power Supply pin for Positive Gate driving voltage and
VSH
22 VSL Negative Source driving voltage
23 VGL Power Supply pin for Negative Gate driving voltage,
VCOM and VSL
24 VCOM VCOM driving voltage
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Note 1.5-1: This pin (CS#) is the chip select input connecting to the MCU. The chip
is enabled for MCU communication: only when CS# is pulled LOW.
Note 1.5-2: This pin (D/C#) is Data/Command control pin connecting to the MCU.
When the pin is pulled HIGH,
the data will be interpreted as data. When the pin is pulled LOW, the data will be
interpreted as command.
Note 1.5-3: This pin (RES#) is reset signal input. The Reset is active low.
Note 1.5-4: This pin (BUSY) is Busy state output pin. When Busy is High the
operation of chip should not be interrupted and any commands should not be issued
to the module. The driver IC will put Busy pin High when the
driver IC is working such as:
- Outputting display waveform; or
- Communicating with digital temperature sensor
Note 1.5-5: This pin (BS1) is for 3-line SPI or 4-line SPI selection. When it is “Low”,
4-line SPI is selected. When it is “High”, 3-line SPI (9 bits SPI) is selected.
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1.6Reference Circuit
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1.7Matched Development Kit
Our Development Kit designed for SPI E-paper Display aims to help users to
learn how to use E-paper Display more easily. It can refresh black-white E-
paper Display and three-color (black, white and red/Yellow) Good Display ‘s E-
paper Display. And it is also added the functions of USB serial port, Raspberry
Pi and LED indicator light ect.
DESPI Development Kit consists of the development board and the pinboard.
More details about the Development Kit, please click to the following link:
http://www.good-display.com/companyfile/Development-Board-8
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2. Environmental
2.1 HANDLING, SAFETY AND ENVIROMENTAL REQUIREMENTS
WARNING
The display module should be kept flat or fixed to a rigid, curved support with li
mited bending along
the long axis. It should not be used for continual flexing and bending. Handle with care. Should the
display break do not touch any material that leaks out. In case of contact with the leaked material
then wash with water and soap.
CAUTION
The display module should not be exposed to harmful gases, such as acid and alkali gases, which
corrode electronic components.
Disassembling the display module can cause permanent damage and invalidate the warranty
agreements.
IPA solvent can only be applied on active area and the back of a glass. For the rest part, it is not
allowed.
Observe general precautions that are common to handling delicate electronic components. The
glass can break and front surfaces can easily be damaged. Moreover the display is sensitive to
static electricity and other rough environmental conditions.
Mounting Precautions
(1)It`srecommended that you consider the mounting structure so that uneven force (ex. Twisted
stress) is not applied to the module.
(2) It`s recommended that you attach a transparent protective plate to the surface in order to
protect the EPD. Transparent protective plate should have sufficient strength in order to resist
external force.
(3) You should adopt radiation structure to satisfy the temperature specification.
(4) Acetic acid type and chlorine type materials for the cover case are not desirable because the
former generates corrosive gas of attacking the PS at high temperature and the latter causes circuit
break by electro-chemical reaction.
(5) Do not touch, push or rub the exposed PS with glass, tweezers or anything harder than HB
pencil lead. And please do not rub with dust clothes with chemical treatment. Do not touch the
surface of PS for bare hand or greasy cloth. (Some cosmetics deteriorate the PS)
(6) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft
materials like chamois soaks with petroleum benzene. Normal-hexane is recommended for cleaning
the adhesives used to attach the PS. Do not use acetone, toluene and alcohol because they cause
chemical damage to the PS.
(7) Wipe off saliva or water drops as soon as possible. Their long time contact with PS causes
deformations and color fading.
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Data sheet status
Product specification
The data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134).
Stress above one or more of the limiting values may cause permanent damage to the device. These
are stress ratings only and operation of the device at these or any other conditions above those
given in the Characteristics sections of the specification is not implied. Exposure to limiting values
for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and dose not form part of the specification.
Product Environmental certification
ROHS
REMARK
AllThe specifications listed in this document are guaranteed for module only. Post-assembled
operation or component(s) may impact module performance or cause unexpected effect or damage
and therefore listed specifications is not warranted after any Post-assembled operation.
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2.2 Reliability test
TEST CONDITION METHOD REMARK
1 High-Temperature Operation T=40℃ ，RH=35%RH ，For
240Hr IEC 60 068-2-2Bb
2 Low-Temperature Operation T = 0℃ for 240 hrs IEC 60 068-2-2Ab
3 High-Temperature Storage T=60℃ RH=35% RH For 240Hr
Test in white pattern IEC 60 068-2-2Bb
4 Low-Temperature Storage T = -25℃ for 240 hrs
Test in white pattern IEC 60 068-2-2Ab
5 High Temperature, High-
Humidity Operation
T=40℃ ，RH=80%RH ，For
168Hr IEC 60 068-2-3CA
6 High Temperature, High-
Humidity Storage
T=50℃ ，RH=80%RH ，For
240Hr
Test in white pattern
IEC 60 068-2-3CA
7 Temperature Cycle
-25℃(30min)~ 60℃(30min) ，
50 Cycle
Test in white pattern
IEC 60 068-2-14NB
8 Package Vibration
1.04G,Frequency : 10~500Hz
Direction : X,Y,Z
Duration:1hours in each
direction
Full packed for
shipment
9 Package Drop Impact
Drop from height of 100 cm on
Concrete surface
Drop sequence:1 corner,
3edges,
6face
One drop for each.
Full packed for
shipment
10 UV exposure
Resistance 765 W/㎡for 168hrs,40℃ IEC 60068-2-5 Sa
11 Electrostatic
discharge
Machine model:
+/-250V,0Ω,200pF IEC61000-4-2
Actual EMC level to be measured on customer application.
Note1：Stay white pattern for storage and non-operation test.
Note2：Operation is black/white/red pattern , hold time is 150S.
Note3：The function, appearance, opticals should meet the requirements of the test
before and after the test. Note4：Keep testing after 2 hours placing at 20℃-25℃.
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3. Electrical Characteristics
3.1 ABSOLUTE MAXIMUM RATING
Table 3.1-1: Maximum Ratings
Symbol Parameter Rating Unit Humidity Unit Note
VCI Logic supply voltage -0.5 to +6.0
V - -
TOPR Operation temperature range 0 to 40 °C 45 to70
% Normal use is recommended to
refresh every 24 hours
- Transportation temperature range -25 to 60 °C - - Note3.1-1
Tstg Storage condition 0 to 40 °C 45 to70 % Maximum storage time: 5 years
- After opening the package 0 to 40 °C 45 to70 %
Note3.1-1:The transport time is within 10 days for -25℃~0℃ or 40℃~60℃
Note 3.1-2：When the three-color product is stored. The display screen should be kept white
and face up. In addition, please be sure to refresh the e-paper every three months.
3.2 DC CHARACTERISTICS
The following specifications apply for: VSS=0V, VCI=3.3V, TOPR=25℃.
Table 3.2-1: DC Characteristics
Symbol Parameter Test Condition Applicable pin Min. Typ. Max. Unit
VCI VCI operation voltage
- VCI 2.2 3 3.7 V
VIH High level input voltage
- SDA, SCL, CS#, D/C#,
RES#, BS1
0.8VDDIO - - V
VIL Low level input voltage
- - - 0.2VDDIO V
VOH High level output voltage IOH = -100uA BUSY, 0.9VDDIO - - V
VOL Low level output voltage IOL = 100uA - - 0.1VDDIO V
Iupdate Module operating current - - - 18 mA
Isleep Deep sleep mode VCI=3.3V - - 2 uA
- The Typical power consumption is measured using associated 25℃ waveform with
following pattern transition: from horizontal scan pattern to vertical scan pattern. (Note
3.2-1)
- The listed electrical/optical characteristics are only guaranteed under the controller &
waveform provided by Good Display.
- Vcom value will be OTP before in factory or present on the label sticker.
Note 3.2-1
The Typical power consumption
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3.3 Serial Peripheral Interface Timing
The following VSHFLILFDWLRQVDSSO\IRU966 99&, 9WR97235 ℃
Write mode
Symbol Parameter Min Typ Max Unit
fSCL SCL frequency (Write Mode) 20 MHz
tCSSU Time CSB has to be low before the first rising edge of SCLK 20 ns
tCSHLD Time CSB has to remain low after the last falling edge of SCLK 20 ns
tCSHIGH Time CSB has to remain high between two transfers 100 ns
tSCLHIGH Part of the clock period where SCL has to remain high 25 ns
tSCLLOW Part of the clock period where SCL has to remain low 25 ns
tSISU Time SI (SDA Write Mode) has to be stable before the next rising edge of SCL 10 ns
tSIHLD Time SI (SDA Write Mode) has to remain stable after the rising edge of SCL 40 ns
Read mode
Symbol Parameter Min Typ Max Unit
fSCL SCL frequency (Read Mode) 2.5 MHz
tCSSU Time CSB has to be low before the first rising edge of SCLK 100 ns
tCSHLD Time CSB has to remain low after the last falling edge of SCLK 50 ns
tCSHIGH Time CSB has to remain high between two transfers 250 ns
tSCLHIGH Part of the clock period where SCL has to remain high 180 ns
tSCLLOW Part of the clock period where SCL has to remain low 180 ns
tSOSU Time SO(SDA Read Mode) will be stable before the next rising edge of SCL 50 ns
tSOHLD Time SO (SDA Read Mode) will remain stable after the falling edge of SCL 0 ns
Note: All timings are based on 20% to 80% of VDDIO-VSS
Figure 3.3-1: Serial peripheral interface characteristics
3.4 Power Consumption
Parameter Symbol Conditions TYP Max Unit Remark
Panel power consumption during update - 25 ℃ 300 mAs -
Deep sleep mode - 25 ℃ 2 uA -
Mas=update average current × update time
CS#
t
CKPER
t
CSHIGH
t CSSU
t
SCLHIGH
t
CSHLD
t
SCLLOW
SCL
tSISU
t
SIHLD
SDA
(Write
Mode)
t
SOSU
t
SOHLD
SDA
(Read
Mode)
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3.5 MCU Interface
3.5.1MCU interface selection
GDEH075Z90R can support 4-wire or 3-wire serial peripheral MCU interface, which
is pin selectable by BS1 pin. The interface pin assignment for different MCU
interfaces is shown in Table 3.5-1.
Note
(1) L is connected to VSS
(2) H is connected to VDDIO
Table 3.5-1: Interface pin assignment for different MCU interfaces
Pin Name
MCU Interface BS1 RES# CS# D/C# SCL SDI SDO
4-wire serial peripheral
interface (SPI)
L Required Required Required SCL SDI SDO
3-wire serial peripheral
interface (SPI) – 9 bits SPI
H Required Required L SCL SDI SDO
3.5.2 MCU Serial Peripheral Interface (4-wire SPI)
The 4-wire SPI consists of serial clock SCL, serial data input SDI, D/C# and CS#.
The control pins status in 4-wire SPI in writing command/data is shown in Table
1.5-2 and the write procedure in 4-wire SPI is shown in Figure 1.5-1..
Table 3.5-2 : Control pins status of 4-wire SPI
Function SCL pin
SD I pin D/C# pin CS# pin
Write command ↑ Command bit L L
Write data ↑ Data bit H L
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Note:
(1) L is connected to VSS and H is connected to VDDIO
(2) ↑ stands for rising edge of signal
(3) SDI is shifted into an 8-bit shift register on every rising edge of SCL in the
order of D7, D6, ... D0. The level of D/C# should be kept over the whole byte.
The data byte in the shift register is written to the Graphic Display Data RAM
(RAM)/Data Byte register or command Byte register according to D/C# pin.
Figure 3.5-1: wire mode
In the read operation, after CS# is pulled low, the first byte sent is command byte,
D/C# is pulled low. After command byte sent, the following byte(s) read are data
byte(s), so D/C# bit is then pulled high. An 8-bit data will be shifted out on every
clock falling edge. The serial data output SDO bit shifting sequence is D7, D6, to D0
bit. Figure 6-2 shows the read procedure in 4-wire SPI.
Figure 3.5-2: Read procedure in 4-wire SPI mode
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3.5.3 MCU Serial Peripheral Interface (3-wire SPI)
The 3-wire SPI consists of serial clock SCL, serial data input SDI, and CS#. The
operation is similar to 4- wire SPI while D/C# pin is not used and it must be tied to
LOW. The control pins status in 3-wire SPI is shown in Table 3.5-3.
In the write operation, a 9-bit data will be shifted into the shift register on every
clock rising edge. The bit shifting sequence is D/C# bit, D7 bit, D6 bit to D0 bit.
The first bit is D/C# bit which determines the following byte is command or data.
When D/C# bit is 0, the following byte is command. When D/C# bit is 1, the
following byte is data. Table 3.5-3 shows the write procedure in 3-wire SPI
Table 3.5-3 : Control pins status of 3-wire SPI
Function SCL pin SDI pin D/C# pin CS# pin
Write command ↑ Command bit Tie LOW L
Write data ↑ Data bit Tie LOW L
Note:
(1) L is connected to VSS and H is connected to VDDIO
(2) ↑ stands for rising edge of signal
Figure 3.5-3: Write procedure in 3-wire SPI mode
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In the read operation, serial data are transferred in the unit of 9 bits. After CS# pull low,
the first byte is command byte, the D/C# bit is as 0 and following with the register byte.
After command byte send, the following byte(s) are data byte(s), with D/C# bit is 1. After
D/C# bit sending from MCU, an 8-bit data will be shifted out on every clock falling edge.
The serial data output SDO bit shifting sequence is D7, D6, to D0 bit. Figure 7-4 shows
the read procedure in 3-wire SPI.
Figure 3.5-4: Read procedure in 3-wire SPI mode
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4. Typical Operating Sequence
4.1 Normal Operation Flow
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