GOWIN DK_START_GW2A-LV18PG256C8I7_V2.0 User manual

DK_START_GW2A-LV18PG256C8I7_V2.0
RISC-V DEMO_B
User Guide
DBUG385-1.1E,09/10/2021

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, Gowin, and GOWINSEMI are trademarks of Guangdong Gowin Semiconductor
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or otherwise, without the prior written consent of GOWINSEMI.
Disclaimer
GOWINSEMI assumes no liability and provides no warranty (either expressed or implied)
and is not responsible for any damage incurred to your hardware, software, data, or
property resulting from usage of the materials or intellectual property except as outlined in
the GOWINSEMI Terms and Conditions of Sale. All information in this document should be
treated as preliminary. GOWINSEMI may make changes to this document at any time
without prior notice. Anyone relying on this documentation should contact GOWINSEMI for
the current documentation and errata.

Revision History
Date
Version
Description
01/20/2021
1.0E
Initial version published.
09/10/2021
1.1E
The Quick Start in 2.2 A Development Board Suite removed.

Contents
DBUG385-1.1E
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Contents
Contents ...............................................................................................................i
List of Figures.....................................................................................................ii
List of Tables......................................................................................................iii
1About This Guide ..........................................................................................1
1.1 Purpose ..............................................................................................................................1
1.2 Related Documents ............................................................................................................1
1.3 Abbreviations and Terminology...........................................................................................1
1.4 Support and Feedback .......................................................................................................2
2Development Board Description..................................................................3
2.1 Overview............................................................................................................................. 3
2.2 A Development Board Suite................................................................................................4
2.3 PCB Components...............................................................................................................5
2.4 System Architecture............................................................................................................5
2.5 Features..............................................................................................................................6
3Development Board Circuit ..........................................................................8
3.1 FPGA Module .....................................................................................................................8
3.2 Download Module...............................................................................................................8
3.2.1 Introduction......................................................................................................................8
3.2.2 Pinsout............................................................................................................................. 9
3.3 Power Supply...................................................................................................................... 9
3.3.1 Introduction......................................................................................................................9
3.3.2 Power System Distribution ............................................................................................10
3.4 Clock, Reset ......................................................................................................................11
3.4.1 Introduction.....................................................................................................................11
3.4.2 Pinout..............................................................................................................................11
3.5 DDR3 .................................................................................................................................11

Contents
DBUG385-1.1E
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3.5.1 Introduction.....................................................................................................................11
3.5.2 Pinout.............................................................................................................................12
3.6 Ethernet interface ............................................................................................................. 14
3.6.1 Introduction....................................................................................................................14
3.6.2 Pinout.............................................................................................................................14
3.7 LVDS interfaces ................................................................................................................15
3.7.1 Introduction....................................................................................................................15
3.7.2 Pinout.............................................................................................................................16
3.8 SD Card ............................................................................................................................17
3.8.1 Introduction....................................................................................................................17
3.8.2 Pinout.............................................................................................................................17
3.9 GPIO.................................................................................................................................18
3.9.1 Introduction....................................................................................................................18
3.9.2 Pinout.............................................................................................................................19
3.10 LED.................................................................................................................................20
3.10.1 Introduction..................................................................................................................20
3.10.2 Pinout...........................................................................................................................20
3.11 Key ..................................................................................................................................21
3.11.1 Introduction .................................................................................................................. 21
3.11.2 Pinout ........................................................................................................................... 21
3.12 Switch .............................................................................................................................21
3.12.1 Introduction..................................................................................................................21
3.12.2 Pinout...........................................................................................................................22
4Gowin Software ...........................................................................................23

List of Figures
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List of Figures
Figure 2-1 PCB Components.............................................................................................................5
Figure 2-2 System Architecture.......................................................................................................... 5
Figure 3-1 Connection Diagram of FPGA Download and Configuration ........................................... 9
Figure 3-2 Power System Distribution ............................................................................................... 10
Figure 3-3 Connection Diagram of Clock and Reset .........................................................................11
Figure 3-4 Connection Diagram of FPGA and DDR3 ........................................................................ 12
Figure 3-5 Connection Diagram of FPGA and Ethernet ....................................................................14
Figure 3-6 LVDS TX Interface............................................................................................................ 15
Figure 3-7 LVDS RX Interface ...........................................................................................................16
Figure 3-8 Connection Diagram of SD Card......................................................................................17
Figure 3-9 20 pin Interface.................................................................................................................18
Figure 3-10 30 pin Interface............................................................................................................... 18
Figure 3-11 LED Connection.............................................................................................................. 20
Figure 3-12 GPIO Circuit ................................................................................................................... 21
Figure 3-13 GPIO Circuit ................................................................................................................... 22

List of Tables
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List of Tables
Table 1-1 Abbreviations and Terminology ..........................................................................................1
Table 3-1 FPGA Download and Pinout .............................................................................................. 9
Table 3-2 Clock and Reset Pinout .....................................................................................................11
Table 3-3 DDR3 Pinout ...................................................................................................................... 12
Table 3-4 Ethernet Pinout ..................................................................................................................14
Table 3-5 LVDS TX Interface Pinout ..................................................................................................16
Table 3-6 LVDS RX Interface Pinout.................................................................................................. 16
Table 3-7 20 pin Interface Pinout ....................................................................................................... 19
Table 3-8 30 pin Interface Pinout ....................................................................................................... 19
Table 3-9 LED Pinout .........................................................................................................................20
Table 3-10 Key Pinout........................................................................................................................ 21
Table 3-11 Switch Pinout.................................................................................................................... 22

1 About This Guide
1.1 Purpose
DBUG385-1.1E
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1About This Guide
1.1 Purpose
The DK_START_GW2A-LV18PG256C8I7_V2.0 development board
(hereinafter referred to as development board) user manual consists of the
following four parts:
A brief introduction to the features and hardware resources of the
development board;
An introduction to the development board architecture and hardware
resources;
An introduction to the hardware circuit functions, circuits, and pins
distribution;
An introduction to the use of the Gowin Software.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website. You
can find the related documents at www.gowinsemi.com:
1. DS102, GW2A series of FPGA Products Data Sheet
2. UG110, GW2A-18 Pinout
3. UG111, GW2A series of FPGA Products Package and Pinout
4. SUG100, Gowin Software User Guide
1.3 Abbreviations and Terminology
The abbreviations and terminology used in this manual are set out in
Table 1-1 below.
Table 1-1 Abbreviations and Terminology
Abbreviations and Terminology
Full Name
BSRAM
Block Static Random Access Memory

1 About This Guide
1.4 Support and Feedback
DBUG385-1.1E
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Abbreviations and Terminology
Full Name
DDR
Double Data Rate
DSP
Digital Signal Processing
FLASH
Flash Memory
FPGA
Field Programmable Gate Array
GPIO
Gowin Programmable I/O
LDO
Low Dropout Regulator
LUT4
4-input Look-up Table
LVDS
Low-Voltage Differential Signaling
SSRAM
Shadow Static Random Access Memory
1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly using the information provided below.
Website: www.gowinsemi.com
E-mail: [email protected]

2 Development Board Description
2.1 Overview
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2Development Board Description
2.1 Overview
Figure 2-1 DK_START_GW2A-LV18PG256C8I7_V2.0 Development Board
DK_START_GW2A-LV18PG256C8I7_V2.0 development board
applies to high speed data storage, high-speed communication test, FPGA
functions evaluation, the verification of hardware reliability, software
learning and debugging, etc.
The development board uses the GW2A-LV18PG256 FPGA device,
which is the first generation product of Gowin Arora family. The GW2A
series of FPGA products offer a range of comprehensive features and rich
internal resources like high-performance DSP resources, a high-speed
LVDS interface, and abundant BSRAM memory resources. These
embedded resources combine a streamlined FPGA architecture with a
55nm process to make the GW2A series of FPGA products ideal for