GOWIN DK_GoAI_GW1NSR-LV4CQN48PC7I6 User manual

DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2
User Guide
DBUG391-1.0E, 03/03/2021

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notice. Anyone relying on this documentation should contact GOWINSEMI for the current
documentation and errata.

Revision History
Date
Version
Description
03/03/2021
1.0E
Initial version published.

Contents
DBUG391-1.0E
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Contents
Contents ...............................................................................................................i
List of Figures....................................................................................................iii
List of Tables......................................................................................................iv
1About This Guide ............................................................................................1
1.1 Purpose .............................................................................................................................. 1
1.2 Related Documents ............................................................................................................1
1.3 Terminology and Abbreviations........................................................................................... 1
1.4 Support and Feedback ....................................................................................................... 2
2Introduction .....................................................................................................3
2.1 Overview.............................................................................................................................3
2.2 System Block Diagram ....................................................................................................... 4
2.3 Development Kit ................................................................................................................. 5
2.4 PCB Components ............................................................................................................... 6
2.5 Features.............................................................................................................................. 6
2.6 Development Board Description.........................................................................................8
3Development Board Circuit ..........................................................................10
3.1 FPGA Module ...................................................................................................................10
3.2 Download & Debug...........................................................................................................10
3.2.1 Overview........................................................................................................................10
3.2.2 USB ............................................................................................................................... 11
3.2.3 JTAG .............................................................................................................................. 11
3.2.4 Flow ............................................................................................................................... 11
3.2.5 Pinout............................................................................................................................. 12
3.3 Power Supply.................................................................................................................... 12
3.3.1 Overview........................................................................................................................12
3.3.2 Power System Distribution ............................................................................................13
3.3.3 Pins Distribution.............................................................................................................13

Contents
DBUG391-1.0E
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3.4 Clock .................................................................................................................................14
3.4.1 Overview........................................................................................................................14
3.4.2 Clock ..............................................................................................................................14
3.4.3 Pinout............................................................................................................................. 14
3.5 LED ...................................................................................................................................14
3.6 Switches ...........................................................................................................................15
3.6.1 Overview........................................................................................................................15
3.7 HDMI TX ...........................................................................................................................15
3.7.1 Overview........................................................................................................................15
3.7.2 HDMI TX Circuit.............................................................................................................15
3.7.3 Pinout............................................................................................................................. 15
3.8 Camera ............................................................................................................................. 16
3.8.1 Overview........................................................................................................................16
3.8.2 FPC Interface.................................................................................................................16
3.8.3 Pinout............................................................................................................................. 17
3.9 SPI FLASH .......................................................................................................................17
3.10 Mic ..................................................................................................................................18
3.11 Accelerometer ................................................................................................................. 18
4Notes ..............................................................................................................19
5Gowin Software .............................................................................................20

List of Figures
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List of Figures
Figure 2-1 DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board.................................3
Figure 2-2 System Block Diagram .....................................................................................................4
Figure 2-3 PCB Components............................................................................................................. 6
Figure 3-1 Connection Diagram of USB ............................................................................................ 11
Figure 3-2 J-LINK Connection Diagram............................................................................................. 11
Figure 3-3 Power System Distribution ...............................................................................................13
Figure 3-4 Clock................................................................................................................................. 14
Figure 3-5 HDMI TX Interface Connection Circuit ............................................................................. 15
Figure 3-6 FPC Interface Connection Circuit .....................................................................................16
Figure 3-7 Accelerometer Connection Circuit ....................................................................................18

List of Tables
DBUG391-1.0E
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List of Tables
Table 1-1 Terminology and Abbreviations ..........................................................................................1
Table 2-1 Development Board Description ........................................................................................8
Table 3-1 FPGA Download Pinout ..................................................................................................... 12
Table 3-2 FPGA Power Pins Distribution ........................................................................................... 13
Table 3-3 FPGA Clock and Reset Pinout...........................................................................................14
Table 3-4 LED Pinout .........................................................................................................................14
Table 3-5 HDMI TX Pinout .................................................................................................................15
Table 3-6 FPC Pinout.........................................................................................................................17
Table 3-7 SPI FLASH Pinout.............................................................................................................. 17
Table 3-8 Mic Pinout .......................................................................................................................... 18
Table 3-9 Accelerometer Pinout ......................................................................................................... 18

1 About This Guide
1.1 Purpose
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1About This Guide
1.1 Purpose
The DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 user manual
consists of the following four parts:
1. A brief introduction to the features and hardware resources of the
development board;
2. An introduction to the function, circuit, and pinout of each module;
3. Notes for the use of the development board;
4. An introduction to the usage of the FPGA development software.
1.2 Related Documents
The latest user guides are available on the GOWINSEMI Website. You
can find the related documents at www.gowinsemi.com:
1. DS861, GW1NSR series FPGA Products Data Sheet
2. UG864, GW1NSR-4 Pinout
3. UG290, Gowin FPGA Products Programming and Configuration Guide
4. SUG100, Gowin Software User Guide
1.3 Terminology and Abbreviations
The terminology and abbreviations used in this manual are as shown
in Table 1-1.
Table 1-1 Terminology and Abbreviations
Terminology and Abbreviations
Meaning
FPGA
Field Programmable Gate Array
MIPI
Mobile Industry Processor Interface
LVDS
Low-Voltage Differential Signaling

1 About This Guide
1.4 Support and Feedback
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Terminology and Abbreviations
Meaning
GPIO
Gowin Programmable Input/Output
MCU
Microprogrammed Control Unit
USB
General Serial Bus
SoC
System on Chip
JTAG
Joint Test Action Group
SRAM
Static Random Access Memory
RS232
Recommend Standard 232
ARM
Advanced RISC Machine
BSRAM
Block Static Random Access Memory
SPI
Serial Peripheral Interface
PLL
Phase-locked Loop
QN48
QFN48 Package
1.4 Support and Feedback
Gowin Semiconductor provides customers with comprehensive
technical support. If you have any questions, comments, or suggestions,
please feel free to contact us directly by the following ways.
Website: www.gowinsemi.com/en
E-mail: [email protected]

2 Introduction
2.1 Overview
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2Introduction
2.1 Overview
Figure 2-1 DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board
The development board uses GW1NS-4 SoC FPGA. SoC FPFA is
embedded with an ARM Cortex-M3 hard core processor. When the ARM
Cortex-M3 hard core processor is employed as the core, the needs of the
min. memory can be met. FPGA logic resources and other embedded
resources can flexibly perform the peripheral control functions, which
provide excellent calculation and exceptional system response interrupts.
They also offer high performance, low power consumption, flexibility,
instant-on, low-cost, non-volatile, high security, and abundant package
types, etc.
The development board offers HDMI and FPC interfaces. There are
also key, LED and other resources for developers or learners to use.

2 Introduction
2.2 System Block Diagram
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2.2 System Block Diagram
Figure 2-2 System Block Diagram
4*LED
OSC
50MHz
2*Mic
1*Camera(FPC
connector)
1*LED
OSC
27MHZ
1*HDMI(TX)
JTAG
Power
1.2V/1.8V/2.5V/2.8V/3.3V
GW1NSR-
LV4QN48P
MINI USB
1*64Mbit
SPI Flash
FT232HL DC POWER
JACK
SWITCH
5V 5V
SWITCH
1*Accelerometer

2 Introduction
2.3 Development Kit
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2.3 Development Kit
The development board kit includes the following items:
DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2 Development Board
USB Data Line
Quick Start Guide
3
1
2
①Gowin DK_GoAI_GW1NSR-LV4CQN48PC7I6_V2.2
Development Board
②USB Data Line
③Quick Start Guide

2 Introduction
2.4 PCB Components
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2.4 PCB Components
Figure 2-3 PCB Components
USB
SPI Flash
HDMI OUT
Mic ARM Debug
2.5V 1.8V 1.2V 3.3V 2.8V
加速度计
FPGA
Camera
2.5 Features
The features of the development board are as follows:
1. FPGA
EQFP144 package
Up to 38 user I/O
Embedded flash, data not easily lost if power down
Abundant LUT4 resources
Multiple modes and capacities of B-SRAM
2. FPGA Configuration Modes
JTAG
AUTO BOOT
3. Power
External USB 5V
4. Clock resource
27MHz Clock Crystal Oscillator
5. LED
One power indicator (green)
1 LEDs (green)

2 Introduction
2.5 Features
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6. Memory
256Kbits embedded Flash
64Mbits external SPI FLASH
7. HDMI（TX）Interface
4 pairs of HDMI output, one pair of clock and three pairs of data
8. Camera
24pin FPC connector with 0.5mm pitch is used.
9. Mic
2 Mic
10. 2 Accelerometer
1 Accelerometer
11. DC-DC Power
3.3 V, 2.8V, 2.5V, 1.8V,1.2V supported

2 Introduction
2.6 Development Board Description
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2.6 Development Board Description
Table 2-1 Development Board Description
No.
Name
Functional Description
Technical Condition
1
FPGA
Core chip
–
2
Download
Support an USB interface;
Support JTAG,
AUTOBOOT
USB to JTAG chip integrated on board
3
Power Supply
3.3 V, 2.8V, 2.5V, 1.8V, and
1.2V output via LDO circuit
Input power: 5V
Provide power for FPGA, download circuit
and other circuits via 5V to 3.3 V circuit;
Provide power for FPC connector via 5V to
2.8V circuit;
Provide power for FPGA and FPC
connector via 5V to 2.5V circuit;
Provide power for FPGA via 5V to 1.8V
circuit;
Provide power for FPGA and FPC
connector via 5 V to 1.2 V circuit.
4
Dip switch
Select JTAG or USB
interface
1
5
6
LED
Test indicator, Power
indicator
Two test indicators, green;
One power indicator, green;
7
Crystal
Oscillator
Provide 27MHz clock for
FPGA
Package2520
8
Memory
FLASH
256K embedded Flash
64Mbit external SPI FLASH
9
HDMI TX
HDMI signal transmitted by
FPGA internal IP
One pair of clock and three pairs of data
10
Camera
Connected to external
camera
24Pin with 0.5mm pitch
11
Mic
Acquire audio data
2
12
Accelerometer
Acquire acceleration
information
1
13
Protection
USB interface: ESD
protection
USB interface with ESD protection: ±15kV
non-contact discharge and ±8kV contact
discharge;

2 Introduction
2.6 Development Board Description
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No.
Name
Functional Description
Technical Condition
Power interface:
Inverse current and
over current protection
Schottky diode is connected between
positive and negative anodes of power
interface;
2A self-recovery fuses are connected at
power input.
14
Voltage
–
Input Voltage: 5V
15
Humidity
–
95%
16
Temperature
–
Operating range: –20°~70°

3 Development Board Circuit
3.1 FPGA Module
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3Development Board Circuit
3.1 FPGA Module
Overview
For the resources of GW1NSR series of FPGA Products, please refer
to DS861, GW1NSR series of FPGA products Datasheet.
I/O BANK Introduction
For the I/O BANK, package and pinout information, see UG864,
GW1NSR Series of FPGA Products Package and Pinout User Guide for
more details.
3.2 Download & Debug
3.2.1 Overview
The development board provides JTAG interface and USB interface.
The .fs file can be downloaded to the internal SRAM or external FLASH as
needed.
Note!
When downloaded to SRAM, the bitstream file will be lost if the device is powered
down, and it will need to be downloaded again after power-on.
If downloaded to flash, the bitstream file will not be lost if the device is powered down.

3 Development Board Circuit
3.2 Download & Debug
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3.2.2 USB
Figure 3-1 Connection Diagram of USB
TMS
TCK
TDI
TDO
USB 转JTAG
芯片
USB_D+
USB_D- 7
6
3
4
U1
U9
GW1NSR4
J2
MINI USB
插座
3.2.3 JTAG
Figure 3-2 J-LINK Connection Diagram
TMS
TCK
TDI
TDO
7
6
3
4
U1
J3
GW1NSR4
3.2.4 Flow
1. Enable USB interface
FPGA and MCU download: When downloading, plug the USB cable to
USB interface (J2) of the development board, and switch SW3 to ON.
2. Enable JTAG interface
FPGA and MCU Download
When downloading, plug the USB cable to JTAG interface (J3) of
the development board, and switch SW1 to OFF.
MCU Debugging
When debugging, connect J-Link emulator to JTAG interface (J3)
of the development board, and switch SW1 to OFF.

3 Development Board Circuit
3.3 Power Supply
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3.2.5 Pinout
Table 3-1 FPGA Download Pinout
Name
Pin No.
BANK
Description
I/O Level
TMS
6
0
JTAG Signal
3.3 V
TCK
7
0
JTAG Signal
3.3 V
TDI
3
0
JTAG Signal
3.3 V
TDO
4
0
JTAG Signal
3.3 V
MODE0
10
0
Mode Selection Pin
3.3 V
JTAGSEL_N
8
0
JTAGSEL_N
3.3 V
DONE
9
0
One DONE Indicator
3.3 V
3.3 Power Supply
3.3.1 Overview
The power supply is input from DC5V or USB interface. The DC-DC
power supply chip is used to step down voltage from 5V to 3.3V, 2.8V, 2.5V,
1.8V and 1.2V, which can meet the power demands of the development
board.

3 Development Board Circuit
3.3 Power Supply
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3.3.2 Power System Distribution
Figure 3-3 Power System Distribution
DC5V Input
PAM2306AYPA
DC-DC
2.5V
PAM2306AYPA
DC-DC
3.3V
PAM2306AYPA
DC-DC
1.8V
USB to JTAG
（FT2232）
FPGA
VCCO0&VCCO1
27Mhz Clock &
FPGA Reset
FPGA VCCO3
(PSRAM)
FPGA
VCCX
HDMI
FPGA
VCCO2
PAM2306AYPA
DC-DC
2.8V FPC
PAM2306AYPA
DC-DC
1.2V FPGA VCC
3.3.3 Pins Distribution
Table 3-2 FPGA Power Pins Distribution
Name
Pin No.
BANK
Description
I/O Level
VCCO0
5
0
I/O Bank Voltage
3.3V
VCCO1
38
1
I/O Bank Voltage
3.3V
VCCO2
36
2
I/O Bank Voltage
2.5V
VCCO3
12, 24
3
I/O Bank Voltage
1.8V
VCCX
25
-
Auxiliary voltage
2.5V
VCC
11, 37
-
Core voltage
1.2V
VSS
26
-
GND
-