Hynix Semiconductor GMS81508A User manual

GMS81508A
GMS81516A
USER’S MANUAL
RevisionHistory
Rev2.2 (Dec. 1998)
Add the package dimension for 64LQFP onpage 3-1, 4-1.
Rev2.1 (Nov. 1998)
OperatingTemperature, -10~75°Cisextendedto -20~85°C.
Add theunused portguidance on page55.
Correct errata for opcodeof“EOR[dp+X],EOR[dp]+Y,EOR{X}” in “Instruction Set”.
Add theOTPdevice programming guidance, recommend using “Intelligent Mode”.
Add thechapter forOTP programming manual as an appendix.
Rev2.0 (Sep. 1997)

- CONTENTS -
1. OVERVIEW...........................................................................................................................................1
1.1. FEATURES ..........................................................................................................................................1
1.2. BLOCK DIAGRAM..............................................................................................................................2
1.3. PIN ASSIGNMENT..............................................................................................................................3
1.4. PACKAGE DIMENSION .....................................................................................................................4
1.5. PIN DESCRIPTION..............................................................................................................................5
2. FUNCTIONS..........................................................................................................................................7
2.1. REGISTERS.........................................................................................................................................7
2.1.1. A - Register....................................................................................................................................8
2.1.2. X- Register.....................................................................................................................................8
2.1.3. Y- Register.....................................................................................................................................8
2.1.4. Stack Pointer .................................................................................................................................8
2.1.5. Program Counter.........................................................................................................................10
2.1.6. Program Status Word...................................................................................................................10
2.2. MEMORY SPACE..............................................................................................................................12
2.2.1. RAM area....................................................................................................................................12
2.2.2. Peripheral Register area..............................................................................................................12
2.2.3. Program ROM area.....................................................................................................................12
2.2.4. Peripheral Register List ...............................................................................................................14
2.3. CLOCK GENERATION CIRCUIT.....................................................................................................16
2.3.1. Oscillation Circuit .......................................................................................................................16
2.3.2. Prescaler.....................................................................................................................................17
2.4. BASIC INTERVAL TIMER................................................................................................................18
2.4.1. Control of Basic Interval Timer....................................................................................................18
2.5. WATCH DOG TIMER........................................................................................................................19
2.5.1. Control of Watch Dog Timer........................................................................................................19
2.5.2. The output of WDT signal.............................................................................................................20
2.6. TIMER................................................................................................................................................21
2.6.1. Control of Timer ..........................................................................................................................23
2.6.2. Interval Timer..............................................................................................................................24
2.6.3. Event Counter..............................................................................................................................24
2.6.4. Pulse Output................................................................................................................................24
2.6.5. Input Capture...............................................................................................................................24
2.7. EXTERNAL INTERRUPT..................................................................................................................26
2.8. A/D CONVERTER.............................................................................................................................27
2.8.1. Control of A/D Converter.............................................................................................................27
2.9. SERIAL I/O........................................................................................................................................29
2.9.1. Data Transmission/Receiving Timing ...........................................................................................31
2.9.2. The Serial I/O operation by Srdy pin ............................................................................................31
2.9.3. The method of Serial I/O ..............................................................................................................32
2.9.4. The Method to Test Correct Transmission with S/W......................................................................32
2.10. PWM ................................................................................................................................................33
2.10.1. Controls of PWM .......................................................................................................................33
2.11. BUZZER DRIVER............................................................................................................................35
2.11.1. Buzzer Driver Operation............................................................................................................36
2.12. INTERRUPTS...................................................................................................................................37
2.12.1. Interrupt Circuit Configuration and Kinds..................................................................................37
2.12.2. Interrupt Control........................................................................................................................38
2.12.3. Interrupt Priority .......................................................................................................................39

2.12.4. Interrupt Sequence.....................................................................................................................40
2.12.5. Software Interrupt .....................................................................................................................41
2.12.6. Multiple Interrupt......................................................................................................................42
2.13. STANDBY FUNCTION...................................................................................................................44
2.13.1. STOP Mode...............................................................................................................................45
2.13.2. STOP Mode Release..................................................................................................................45
2.14. RESET FUNCTION ......................................................................................................................... 47
3. I/O PORTS...........................................................................................................................................48
3.1. R0 PORT............................................................................................................................................48
3.2. R1 PORT............................................................................................................................................49
3.3. R2 PORT............................................................................................................................................50
3.4. R3 PORT............................................................................................................................................51
3.5. R4 PORT............................................................................................................................................52
3.6. R5 PORT............................................................................................................................................53
3.7. R6 PORT............................................................................................................................................54
3.8. TERMINAL TYPES...........................................................................................................................56
4. ELECTRICAL CHARACTERISTICS...............................................................................................60
4.1. ABOULUTE MAXIMUM RATINGS.................................................................................................60
4.2. RECOMMENDED OPERATING CONDITIONS............................................................................... 60
4.3. A/D CONVERTER CHARACTERISTICS ......................................................................................... 60
4.4. DC CHARACTERISTICS..................................................................................................................61
4.5. AC CHARACTERISTICS..................................................................................................................62
4.5.1. Input Conditions..........................................................................................................................62
4.5.2. Serial Transfer ............................................................................................................................ 63
4.5.3. Microprocessor Mode I/O Timing................................................................................................64
4.5.4. Bus Holding Timing.....................................................................................................................65
5. INSTRUCTION SET...........................................................................................................................66

GMS81508/16
1
1. OVERVIEW
GMS81508/16 is a single chip microcomputer designed CMOS technology. The use of CMOS
process enables extremely low power consumption.
This device using the G8MC Core includes several peripheral functions such as Timer, A/D
Converter, Programmable Buzzer Driver, Serial I/O, Pulse Width Modulation Function, etc.
ROM,RAM,I/O are placed on the same memory map in addition to simple instruction set.
1.1. FEATURES
GMS81508 GMS81516
ROM(Bytes) 8K 16K
RAM(Bytes) 448 bytes(includes stack area)
Execution Time 0.5us (@Xin=8MHz)
Basic Interval Timer 8bit ✕1ch.
Watch Dog Timer 6bit ✕1ch.
Timer 8bit✕4ch.(or 16bit ✕2ch.)
ADC 8bit ✕8ch.
PWM 8bit ✕2ch.
Serial I/O 8bit ✕1ch.
External Interrupt 4ch.
Buzzer Driver Programmable Buzzer Driving Port
I/O Port 4 - Input only
52 - Input/Output
Power Save Mode STOP Mode
Operating Voltage 4.5 ∼5.5V ( @ Xin=8MHz )
Operating Frequency 1 ∼8MHz
Package 64SDIP, 64QFP
OTP GMS81516T
Application Home Appliances, LED Applications

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2
1.2. BLOCK DIAGRAM
A/D
CONVERTER
PWM
BUZZER
W.D.T
S.I.C
TIMER
INTERRUPT
CLOCK GEN.
/
SYSTEM
CONTROL
G8MC
CORE
RAM
(448BYTE)
ROM
(8/16K BYTE)
PRESCALER
/
B.I.T
R6
PORT
R5
PORT
R4
PORT
R3
PORT
R2
PORT
R1
PORT
R0
PORT
AVrefAVss
R60~R67
(AN0~AN7)
R57/PWM1
R55/BUZ
R56/PWM0
R54/WDTO
R53/Srdy
R52/Sclk
R51/Sout
R50/Sin
R47/T3 O
R46/T1 O
R45/EC2
R44/EC0
R43/INT3
R42/INT2
R41/INT1
R40/INT0
MP
RESET
Xin
Xout
VddVss
R60
:
R63
R64
:
R67
R50
:
R57
R40
:
R47
R30
:
R37
R20
:
R27
R10
:
R17
R00
:
R07

GMS81508/16
3
1.3. PIN ASSIGNMENT
G
M
S
8
1
5
0
8
/
1
6
R30/ RD
R31/ Wt
R32/ R/W
R33/ C
R34/ SYNC
R35/ BRK
R36/ BRQ
R37/ HALT
R00/ D0
R01/ D1
R02/ D2
R03/ D3
R04/ D4
R05/ D5
R06/ D6
R07/ D7
R10/ A0
R11/ A1
R12/ A2
R13/ A3
R14/ A4
R15/ A5
R16/ A6
R17/ A7
R20/ A8
R21/ A9
R22/ A10
R23/ A11
R24/ A12
R25/ A13
R26/ A14
R27/ A15
Vdd
MP
AVss
AVref
R67/AN7
R66/AN6
R65/AN5
R64/AN4
R63/AN3
R62/AN2
R61/AN1
R60/AN0
R57/PWM1
R56/PWM0
R55/BUZ
R54/WDTO
R53/Srdy
R52/Sclk
R51/Sout
R50/Sin
R47/T3O
R46/T1O
R45/EC2
R44/EC0
R43/INT3
R42/INT2
R41/INT1
R40/INT0
RESET
Xin
Xout
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
MP MODE
64 SDIP
GMS81508/16
R65/AN5
R64/AN4
R63/AN3
R62/AN2
R61/AN1
R60/AN0
R57/PWM1
R56/PWM0
R55/BUZ
R54/WDTO
R53/Srdy
R52/Sclk
R51/Sout
R50/Sin
R47/T3O
R46/T1O
R45/EC2
R44/EC0
R43/INT3
21
31 2 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
22
23
24
25
26
27
28
29
30
31
32
20
4951 50 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
63
62
61
60
59
58
57
56
55
54
53
52
64
R37/HALT
R00/D0
R01/D1
R02/D2
R03/D3
R04/D4
R05/D5
R06/D6
R07/D7
R10/A0
R11/A1
R12/A2
R13/A3
R14/A4
R15/A5
R16/A6
R17/A7
R20/A8
R21/A9
R22/A10
R23/A11
R24/A12
R25/A13
R26/A14
R17/A15
Vss
Xout
Xin
RESET
R40/INT0
R41/INT1
R42/INT2
R36 BRQ
R35 BAK
R34 SYNC
R33 C
R32 R/W
R31 Wt
R30 Rd
Vdd
MP
AVss
AVref
R67/AN7
R66/AN6
64 QFP

HYUNDAI MicroElectronics
R20
R21
R22
R23
R24
R25
R26
R27
VSS
XOUT
XIN
RESET
R40/INT0
R41/INT1
R42/INT2
R43/INT3
R00
R01
R02
R03
R04
R05
R06
R07
R10
R11
R12
R13
R14
R15
R16
R17
R63/AN3
R62/AN2
R61/AN1
R60/AN0
R57/PWM1
R56/PWM0
R55/BUZ
R54/WDTO
R53/SRDY
R52/SCLK
R51/SOUT
R50/SIN
R47/T3O
R46/T1O
R45/EC2
R44/EC0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
R37
R36
R35
R34
R33
R32
R31
R30
VDD
MP
AVSS
AVREF
R67/AN7
R66/AN6
R65/AN5
R64/AN4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
GMS81508/16
64LQFP
3-1

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4
1.4 PACKAGE DIMENSION
UNIT: INCH
2.280
2.260
0.205 max.
0.022
0.016 0.050
0.030 0.070 BSC
0.140
0.120 min. 0.015
0.680
0.660
0.750 BSC
0-15°0.012
0.008
64SDIP
20.10
19.90
24.15
23.65
18.15
17.65
14.10
13.90
3.18 max.
0.50
0.35 1.00 BSC
SEE DETAIL "A"
1.03
0.73
0-7°
0.36
0.10
0.23
0.13
1.95
REF
DETAIL "A"
UNIT: MM
64QFP

HYUNDAI MicroElectronics
1.60 max.
SEE DETAIL "A"
0.75
0.45
0-7°
0.15
0.05
1.00
REF
DETAIL "A"
UNIT: MM
10.00 BSC
12.00 BSC
12.00 BSC
10.00 BSC
0.38
0.220.50 BSC
1.45
1.35
64LQFP
4-1

GMS81508/16
5
1.5. PIN DESCRIPTION
Classification No. Symbol I/O Descriptions
Power 1 Vdd I Power Supply Input Pin(4.5~5.5V)
32 Vss I Ground(0V)
2MP I Controls Microprocess Mode of the Chip
At "H" input : Single Chip Mode
At "L" input : Microprocess Mode
System Control
or 29 RESET I In the state of "L" level, system enter to the reset
state.
Clock 30 Xin I This chip has an internal clock generating circuit. To
control generating frequency, an external ceramic or
a quartz crystal oscillator is connected between Xin
and Xout pins.
31 Xout I If external clock is used, the clock source should be
connected to the Xin pin and the Xout pin should be
left open.
24 EC0 I Event Counter Source Clock Input Pin
Timer 23 EC2 I
22 T1O O Timer Counter Overflow Output Pin
21 T3O O
28 INT0 I
Ext. Interrupt 27 INT1 I External Interrupt Request Signal Input Pin
26 INT2 I
25 INT3 I
4 AVref I Reference Voltage Input Pin for A/D Converter
3 AVss I Ground Level Input Pin for A/D Converter
12 AN0 I
11 AN1 I
A/D Converter 10 AN2 I
9 AN3 I Analog Voltage Input Pin for A/D Converter
8AN4 I
7AN5 I
6AN6 I
5AN7 I
17 Srdy I/O Receive Enable Output Pin
Serial I/O 18 Sclk I/O Serial Clock Output Pin
19 Sout O Serial Data Output Pin
20 Sin I Serial Data Input Pin
P.W.M 14 PWM0 O PWM Pulse Output Pin
13 PWM1 O
Buzzer 15 BUZ O Buzzer Driving Frequency Output Pin
W.D.T 16 WDTO O Watch dog Timer Overflow Output Pin

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6
ClassificationNo.Symbol I/ODescription
49
:
56
R00
:
R07 I/O R0 Port
( Can be determined I/O by R0DD )
In MPmode, Thisport functionsas8-bit data busfor
the CPU. (D0~D7)
41
:
48
R10
:
R17 I/O R1 Port
( Can be determined I/O by R1DD )
In MPmode, Thisfunctionsas8-bit lower address
output pins. (A0~A7)
33
:
40
R20
:
R27 I/O R2 Port
( Can be determined I/O by R2DD )
In MPmode, Thisfunctionsas8-bit higher address
output pins.(A8~A15)
I/OPort 57
:
64
R30
:
R37 I/O R3 Port
( Can be determined I/O by R3DD )
In MPmode, Thisport functionsas8-bit control bus
forthe CPU.
28
:
21
R40
:
R47 I/O R4 Port
( Can be determined I/O by R4DD )
20
:
13
R50
:
R57 I/O R5 Port
( Can be determined I/O by R5DD )
12
:
9
R60
:
R63 IR6 Port
Input Only
8
:
5
R64
:
R65
I/O R6Port
( Can be determined I/O by R6DD )

GMS81508/16
7
2. FUNCTIONS
2.1. REGISTERS
6 registers are built-in the CPU of G8MC. Accumulator(A), Index register X, Y, Stack Pointer (SP)
and Program Status Word(PSW) consists of 8-bit registers. Program Counter(PC) consists of 16-
bit registers. The contents of these registers are undefined after RESET.
Program Counter
15 8
PCH
7 0
PCL
A - Register
7 0
A
15 8
Y( YA 16bit Accumulator )
7 0
A
X - Register
7 0
X
Y - Register
7 0
Y
Program Status Word
7 0
PSW
Stack Pointer
7 0
SP
Carry Flag
Z CH IG BN V
Zero Flag
Interrupt Enable Flag
Half Carry Flag
Break Flag
G ( Direct Page ) Flag
Overflow Flag
Negative Flag

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8
2.1.1. A- Register
The accumulator isthe 8-bit general purpose register. Thisisused register for dataoperation, data
transfer, temporarysavesand conditional judgment.
Accumulator can be used asa 16-bit register with Yregister and hasa lower 8-bit data.
In case of multiplication instruction(MUL), it worksasa multiplier. After execution of MUL
instruction, Accumulator haslower 8-bit data of the results(16-bit).
In case of division instruction(DIV),it hasthe lower 8-bit of dividend (16-bit)
2.1.2. X- Register
In index addressing mode, thisregister isexecuted asa 8-bitindex register within direct page(RAM
area). also, Inindirect addressing mode, itisdestination address register.
Thisregister canbe used asa increment, decrement,comparison, and data transfer function.
In case of division instruction(DIV),it worksasa divisor.
2.1.3. Y- Register
In index addressing mode, thisregister isexecuted asa index register.
In case of 16-bit operation instruction, thisregister hasupper 8-bit of YA (16-bit accumulator).
In case of multiplication instruction(MUL), thisregister isexecuted asa multiplicand register. After
multiplication operation, it hasthe upper 8-bit ofthe result.
In case of division instruction, itisexecuted asa dividend(upper 8-bit). Afterdivision operation, it
hasquotient.
Thisregister canbe used asa loop counter of conditional branch command. (e.g. DBNE Y, rel)
2.1.4. Stack Pointer
The stack pointer(SP)isan 8-bitregister used during subroutine calling and interrupts.
Whenbranching out from an on-going routine to subroutine or interrupt routine, itisnecessary to
rememberthe return address. normally, internal RAMisused forstoring the return address and
thisarea iscalled stack area. SPispointerto showwhere the stack data are stored withinthe
stack area.
The stack area islocated in 1-Page ofinternal RAM. SPmust be initialized byS/W because the
contentsof SP isundefined after RESET.
ex)LDX #0FEH ;0FEH -> Xregister
TXSP ;X-> SP
caution)You can'tuse !01FFH as stack. If you use thisarea, mal-function would be
occurred.

GMS81508/16
9
The bellows shows data store and restore sequence to/from stack area.
Interrupt
RETI
Subroutine CALL
RET
PUSH A ( X, Y, PSW )
POP A ( X, Y, PSW )
M (sp)
( PCH )
sp
sp
1
M (sp)
( PCL )
sp
sp
1
M (sp)
A
M (sp)
( PCH )
sp
sp
1
M (sp)
( PCL )
sp
sp
1
M (sp)
( PSW )
sp
sp
1
sp
sp
1
sp
sp
1
( PCL )
M (sp)
sp
sp
1
( PCH)
M (sp)
sp
sp
1
A
M (sp)
( PSW )
M (sp)
sp
sp
1
( PCL )
M (sp)
sp
sp
1
( PCH)
M (sp)
sp
sp
1
15 8
Stack Address ( 0100H
01FFH)
01H
7 0
SP
Hardware fixed

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10
2.1.5. ProgramCounter
The program counter(PC)isa 16-bit counter which consistsof 8-bit register PCH and PCL. The
addressing space is64K bytes.
Thiscounter indicatesthe address of the nextinstruction to be executed.
In reset state, theprogram counter (PC) hasreset routine address in addressFFFFH and FFFEH .
2.1.6. ProgramStatus Word
PSWisan 8-bit register which iscomposed offlagsto maintainthe condition of theprocessor
immediately after an operation.
After RESET,The contentsof PSWisset to "00H".
PSW
Carry Flag ( C)
After anoperation, it isset to "1"when there isa carryfrom bit7 of ALU or not a borrow.
SETC,CLRC instructionsallowdirect access forsetting and resetting.
it can be used asa 1-bit accumulator.
Itisa branch condition flag of BCS, BCC instructions.
Zero Flag ( Z)
After anoperation including 16-bit operation, it isset to "1"when the resultis“0”.
Itisa branch condition flag of BEQ,BNE.
Interrupt EnableFlag ( I)
Thisflag isused to enable/disable all interruptsexcept interrupt caused by BRK instruction.
Whenthisflag is"1",itmeansinterrupt enable condition.When an interrupt isaccept, thisflag is
automatically set to "0"thereby preventing other interrupts. also it isset to "1"by RETI instruction.
Thisflag isset and cleared by EI, DI instructions.
Half Carry Flag ( H)
After anoperation, it isset when there isa carry from bit3ofALU or isnot a borrowfrom bit4of
ALU.
It cannot be set by anyinstruction. it iscleared by CLRV instruction likeV flag.
7
N
6
V
5
G
4
B
3
H
2
I
1
Z
0
C

GMS81508/16
11
Break Flag ( B)
This flag is set by BRK (S/W interrupt) instruction to distinguish BRK and TCALL instruction having
the same vector address.
Direct Page Flag ( G)
This flag assign direct page (0-page, 1-page) for direct addressing mode. When G-flag is "0", the
direct addressing space is in 0-page(0000H~00FFH). When G-flag is "1", the direct addressing
space is in 1-page(0100H~01FFH).
It is set and cleared by SETG, CLRG instruction
Overflow Flag ( V)
This flag functions when one word is added or subtracted in binary with the sign. When results
exceeds +127 or -128, this flag is set.
When BIT instruction is executed, The bit6 of memory is input into V-flag.
This flag is cleared by CLRV instruction, but set instruction is not exist.
It is a branch condition flag of BVS, BVC.
Negative Flag ( N)
N-flag is set when the result of a data transfer or operation is negative (bit7 is “1”).
it means the bit-7 of memory is sign bit. thereby data is valid in the range of -128 ~ +127.
When BIT instruction is executed, The bit7 of memory is input into N-flag.
Set or clear instruction is not exist.
It is a branch condition flag of BPL, BMI instruction.

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12
2.2. MEMORY SPACE
All RAM ,ROM,I/O, Peripheral Register are placed inthe samememoryarea. Therefore, same
instructionsenable both data transfer and operation without the need to distinguishmemoryand
I/O. The program counterofGMS81508/16 consistsof 16-bit and memory addressing space is64K
byte.
2.2.1. RAMarea
RAM(includesstack area) is448 Bytes( 0000H
01FFH).
The internal RAM isused fordata storage, subroutine calling or stackarea when interruptsoccur.
WhenRAM isused asthe stack area, the depth of the subroutine "nesting" and the interrupt levels
should be kept inmindinorder to avoid destruction of the RAM contents.
2.2.2. Peripheral Register area
Address00C0H
00FFHare assigned for peripheral register.
2.2.3. ProgramROMarea
PCALL subroutinesmust be located inPCALL area (FF00H
FFBFH).
TCALL vector area (FFC0H
FFDFH)hasthe vector address corresponding to TCALL
instruction.
InterruptVectorarea( FFE0H
FFFFH)hasthe vector address of interrupts,inclusive RESET.

GMS81508/16
13
RAM
(192 byte)
Peripheral Registers
RAM(STACK)
(256 byte)
Program ROM
PCALL Area
TCALL Vector Area
Interrupt Vector Area
!0000H
!00C0H
!0100H
!0200H
!C000H
!E000H
!FF00H
!FFC0H
!FFE0H
Not Used Area
0-Page
1-Page
Direct Page(dp)
U-Page
G
M
S
8
1
5
0
8
G
M
S
8
1
5
1
6
Absolute Address
VECTOR TABLE
TCALL INTERRUPT
Address Vector Address Vector
FFC0H - FFC1H TCALL 15 FFE0H - FFE1H not used
FFC2H - FFC3H TCALL 14 FFE2H - FFE3H not used
FFC4H - FFC5H TCALL 13 FFE4H - FFE5H Serial I/O
FFC6H - FFC7H TCALL 12 FFE6H - FFE7H Basic Interval Timer
FFC8H - FFC9H TCALL 11 FFE8H - FFE9H Watch Dog Timer
FFCAH - FFCBH TCALL 10 FFEAH - FFEBH A/D Converter
FFCCH - FFCDH TCALL 9 FFECH - FFEDH Timer 3
FFCEH - FFCFH TCALL 8 FFEEH - FFEFH Timer 2
FFD0H - FFD1H TCALL 7 FFF0H - FFF1H Timer 1
FFD2H - FFD3H TCALL 6 FFF2H - FFF3H Timer 0
FFD4H - FFD5H TCALL 5 FFF4H - FFF5H Ext. Int. 3
FFD6H - FFD7H TCALL 4 FFF6H - FFF7H Ext. Int. 2
FFD8H - FFD9H TCALL 3 FFF8H - FFF9H Ext. Int. 1
FFDAH - FFDBH TCALL 2 FFFAH - FFFBH Ext. Int. 0
FFDCH - FFDDH TCALL 1 FFFCH - FFFDH not used
FFDEH - FFDFH TCALL 0 FFFEH - FFFFH RESET

HYUNDAI MicroElectronics
14
2.2.4. Peripheral Register List
Address Register Name SYMBOLR/WRESET VALUE
76543210
00C0HR0PORT DATA REGISTER R0 R/WUndefined
00C1HR0PORT I/O DIRECTION REGISTER R0DD W00000000
00C2HR1PORT DATA REGISTER R0 R/WUndefined
00C3HR1PORT I/O DIRECTION REGISTER R0DD W00000000
00C4HR2PORT DATA REGISTER R0 R/WUndefined
00C5HR2PORT I/O DIRECTION REGISTER R0DD W00000000
00C6HR3PORT DATA REGISTER R0 R/WUndefined
00C7HR3PORT I/O DIRECTION REGISTER R0DD W00000000
00C8HR4PORT DATA REGISTER R4 R/WUndefined
00C9HR4PORT I/O DIRECTION REGISTER R4DD W00000000
00CAHR5PORT DATA REGISTER R5 R/WUndefined
00CBHR5PORT I/O DIRECTION REGISTER R5DD W00000000
00CCHR6PORT DATA REGISTER R6 R/WUndefined
00CDHR6PORT I/O DIRECTION REGISTER R6DD W0000----
00D0HPORT R4MODE REGISTER PMR4W00000000
00D1HPORT R5MODE REGISTER PMR5W--00----
00D2HTEST MODE REGISTER TMRW-----000
00D3HBASIC INTERVAL REGISTER BITRRUndefined
CLOCK CONTROLREGISTER CKCTLRW--010111
00E0HWATCH DOG TIMER WDTR W-0111111
00E2HTIMER MODE REGISTER 0 TM0R/W00000000
00E3HTIMER MODE REGISTER 2 TM2R/W00000000
00E4HTIMER0DATAREGISTER TDR0R/WUndefined
00E5HTIMER1DATAREGISTER TDR1R/WUndefined
00E6HTIMER2DATAREGISTER TDR2R/WUndefined
00E7HTIMER3DATAREGISTER TDR3R/WUndefined
00E8HA/D CONVERTER MODE REGISTER ADCM R/W--000001
00E9HA/D CONVERTER DATA REGISTER ADRRUndefined
00EAHSERIAL I/O MODE REGISTER SIOMR/W-0000001

GMS81508/16
15
Address Register Name SYMBOLR/WRESET VALUE
76543210
00EBHSERIAL I/O REGISTER SIORR/W Undefined
00ECHBUZZER DRIVER REGISTER BURWUndefined
00F0HPWM0DATA REGISTER PWMR0 WUndefined
00F1HPWM1DATA REGISTER PWMR1 WUndefined
00F2HPWMCONTROLREGISTER PWMCR W00
00F3HINTERRUPT MODE REGISTER IMODR/W--000000
00F4HINTERRUPT ENABLE REGISTER LOWIENLR/W0000----
00F5HINTERRUPT REQUEST FLAG REGISTER LOWIRQLR/W0000----
00F6HINTERRUPT ENABLE REGISTER HIGH IENHR/W00000000
00F7HINTERRUPT REQUEST FLAG REGISTER HIGH IRQHR/W00000000
00F8HEXT.INTERRUPT EDGE SELECTION REGISTER IEDSW00000000
-: Not Used
Write OnlyRegister can notbe accessed by bit manipulation instruction.
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2
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