Icom IC-7800 User manual

S-14015HZ-C1-e
Oct. 2007
THE TRANSCEVER

This service manual describes the latest service information
for the IC-7800 THE TRANSCEVER at the time of
publication.
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than specifed. This will ruin
the transceiver.
DO NOT expose the transceiver to rain, snow or any liquids.
DO NOT reverse the polarities of the power supply when
connecting the transceiver.
DO NOT apply an RF signal of more than 20 dBm (100 mW) to
the antenna connector. This could damage the transceiver’s
front-end.
To upgrade quality, any electrical or mechanical parts and
internal circuits are subject to change without notice or
obligation.
MODEL VERSION SYMBOL
IC-7800
USA U.S.A.
EUR Europe
FRA France
ITR Italy
KOR Korea
ESP Spain
UK U.K.
CHN China
Be sure to include the following four points when ordering
replacement parts:
1. 10-digit Icom parts numbers
2. Component name
3. Equipment model name and unit name
4. Quantity required
<ORDER EXAMPLE>
1110003491 S.IC TA31136FNG IC-7800 MAIN UNIT 5 pieces
8820001210 Screw 2438 screw IC-7800 Top cover 10 pieces
Addresses are provided on the inside back cover for your
convenience.
Icom, Icom Inc. and logo are registered trademarks of Icom Incorporated (Japan) in the United States, the United
Kingdom, Germany, France, Spain, Russia and/or other countries.
ORDERING PARTS
1. Make sure the problem is internal before disassembling
the transceiver.
2. DO NOT open the transceiver until the transceiver is
disconnected from its power source.
3. DO NOT force any of the variable components. Turn
them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An
insulated tuning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the
transceiver is defective.
6. DO NOT transmit power into a Standard Signal
Generator or a Sweep Generator.
7. ALWAYS connect a 50 dB to 60 dB attenuator between
the transceiver and a Deviation Meter or Spectrum
Analyzer when using such test equipment.
8. READ the instructions of test equipment throughly
before connecting a test equipment to the transceiver.
REPAIR NOTES
INTRODUCTION CAUTION

CONTENTS
SECTION 1 SPECIFICATIONS
SECTION 2 INSIDE VIEWS
2 - 1 TOP VIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 1
2 - 2 BOTTOM VIEW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 1
2 - 3 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 2
2 - 4 DSP-A/DSP-B BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 3
2 - 5 DSP-TX BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 3
2 - 6 LOGIC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 4
2 - 7 SCOPE UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 4
2 - 8 RXPLL-A UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 5
2 - 9 RXPLL-B UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 5
2 - 10 OSC UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 6
2 - 11 PA200W BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 - 6
SECTION 3 CIRCUIT DESCRIPTION
SECTION 4 ADJUSTMENT PROCEDURES
SECTION 5 PARTS LIST
SECTION 6 MECHANICAL PARTS AND DISASSEMBLY
SECTION 7 SEMI-CONDUCTOR INFORMATION
SECTION 8 BOARD LAYOUTS
8 - 1 DISPLAY BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 1
8 - 2 SW-A BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 3
8 - 3 SW-B BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 3
8 - 4 SW-C BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 3
8 - 5 VR-A BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 6 VR-B BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 7 VR-C BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 8 VR-D BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 9 JACK BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 10 MIC BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 11 CF BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 5
8 - 12 TENKEY BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 7
8 - 13 LED BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 7
8 - 14 PBT1 BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 7
8 - 15 PBT2 BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 7
8 - 16 LOGIC UNIT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 9
8 - 17 MEMORY BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 11
8 - 18 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 13
8 - 19 DSP-A/DSP-B BOARDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 13
8 - 20 DSP-TX BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 17
8 - 21 SCOPE UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 19

8 - 21 SCOPE UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 19
8 - 22 RXPLL-A UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 21
8 - 23 RXPLL-B UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 23
8 - 24 DIGISEL UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 25
8 - 25 OSC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 27
8 - 26 ANT-SW UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 29
8 - 27 FILTER UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 31
8 - 28 NETWORK BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 33
8 - 29 CTRL BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 35
8 - 30 BPF UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 37
8 - 31 PA200W BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 39
8 - 32 DC-DC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 - 41
SECTION 9 BLOCK DIAGRAMS
SECTION 10 WIRING DIAGRAMS
SECTION 11 VOLTAGE DIAGRAMS
11 - 1 DISPLAY BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 1
11 - 2 CF BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 1
11 - 3 SW-A BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 4 VR-B BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 5 VR-C BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 6 VR-A BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 7 MIC BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 8 JACK BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 9 VR-D BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 10 SW-B BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 2
11 - 11 TENKEY BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 3
11 - 12 SW-C BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 4
11 - 13 PBT1 BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 4
11 - 14 PBT2 BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 4
11 - 15 LED BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 4
11 - 16 LOGIC UNIT AND MEMORY BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 5
11 - 17 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 9
11 - 18 DSP-A/DSP-B BOARDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 12
11 - 19 DSP-TX BOARD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 13
11 - 20 SCOPE UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 14
11 - 21 RXPLL-A/RXPLL-B UNITS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 18
11 - 22 DIGISEL UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 21
11 - 23 OSC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 23
11 - 24 ANT-SW UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 24
11 - 25 FILTER UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 24
11 - 26 BPF UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 25
11 - 27 NETWORK BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 26
11 - 28 CTRL BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 27
11 - 29 PA200W BOARD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 28
11 - 30 DC-DC UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 - 29

1 - 1
MGENERAL
• Frequency coverage:
Receive 0.030–60.000 MHz*1, *2
Transmit 0.1357–0.1378 MHz*21.800–1.999 MHz*2
3.500–3.999 MHz*2
5.3305, 5.3465, 5.3665, 5.3715, 5.4035 MHz*2
7.000–7.300 MHz*210.100–10.150 MHz*2
14.000–14.350 MHz*218.068–18.168 MHz*2
21.000–21.450 MHz*224.890–24.990 MHz*2
28.000–29.700 MHz*250.000–54.000 MHz*2
*
1Some frequency bands are not guaranteed.
*
2Depending on version.
• Mode : USB, LSB, CW, RTTY, AM, FM,
PSK31
• Number of memory channels
: 101 (99 regular, 2 scan edges)
• Antenna connector :
SO-239 × 4 [antenna impedance; 50 Ω]
• Usable temp. range : 0˚C to +50˚C (32˚F to 122˚F)
• Frequency stability : Less than ±0.05 ppm
(IC-7800’s condition: After 5 min. since
turns power ON on the rear panel)
• Freq. resolution : 1 Hz
• Power supply : 85–265 V AC (universal input)
voltage
•
Power consumption :
Transmit at 200 W 800 VA
Receive stand-by 200 VA (typical)
max. audio 210 VA (typical)
• Dimensions : 424 (W)
× 149(H) × 435(D) mm
(Proj. not included) 1611⁄16(W) × 57⁄8(H) × 171⁄8(D) in
• Weight : Approximate 25 kg (55 lb)
• ACC 1 connector : 8-pin DIN connector
• ACC 2 connector : 7-pin DIN connector
• CI-V connector : 2-conductor 3.5(d) mm (1⁄8")
• Display : 7-inch diagonal wide TFT color LCD
(800
× 480)
MTRANSMITTER
• Output power :
HF: SSB/CW/RTTY/FM/PSK31 5–200 W
AM 5–50 W
137 kHz: CW More than –20 dBm
(except for [USA] and [KOR])
• Modulation system :
SSB PSN modulation
AM Low power modulation
FM Phase modulation
• Spurious emission : More than 60 dB (HF bands)
More than 70 dB (50 MHz band)
• Carrier suppression: More than 63 dB (HF bands)
More than 73 dB (50 MHz band)
• Unwanted sideband suppression: More than 80 dB
• Mic. connector : 8-pin connector (600
Ω )
• ELE-KEY connector: 3-conductor 6.35(d) mm (1⁄4")
• KEY connector : 3-conductor 6.35(d) mm (1⁄4")
• SEND connector : Phono (RCA)
• ALC connector : Phono (RCA)
MRECEIVER
• Receive system : Double-conversion superheterodyne
• Intermediate frequencies:
1st IF frequency 64.455 MHz (Main band)
64.555 kHz (Sub band)
2nd IF frequency 36 kHz
• Sensitivity (Typ.) :
SSB, CW, RTTY (at 2.4 kHz bandwidth)
0.1–1.799 MHz*10.5 µV (10 dB S/N)
1.8–29.99 MHz*10.16 µV (10 dB S/N)
50.0–54.0 MHz*2 0.13 µV (10 dB S/N)
AM (at 6.0 kHz bandwidth)
0.1–1.799 MHz*16.3 µV (10 dB S/N)
1.8–29.99 MHz*12.0 µV (10 dB S/N)
50.0–54.0 MHz*21.0 µV (10 dB S/N)
FM (at 15 kHz bandwidth)
28.0–29.99 MHz*1 0.5 µV (12 dB SINAD)
50.0–54.0 MHz*2 0.32 µV (12 dB SINAD)
*
1Pre-amp1 is ON *2Pre-amp2 is ON
• Squelch sensitivity : (Pre-amp OFF)
SSB/CW/RTTY/PSK31 Less than 5.6 µV
FM Less than 1.0 µV
• Selectivity :
SSB/RTTY (at 2.4 kHz bandwidth)
More than 2.4 kHz/–3 dB
Less than 3.6 kHz/–60 dB
CW (at 500 Hz bandwidth)
More than 500 Hz/–3 dB
Less than 700 Hz/–60 dB
AM (at 6 kHz bandwidth)
More than 6.0 kHz/–3 dB
Less than 15.0 kHz/–60 dB
FM (at 15 kHz bandwidth)
More than 12 kHz/–6 dB
Less than 20 kHz/–60 dB
• Spurious and image rejection response ratio:
More than 70 dB
• RIT variable range : ±9.999 kHz
• Audio output power : More than 2.6 W at 10 % distortion
with an 8
Ω load
• PHONES connector: 3-conductor 6.35 (d) mm (1⁄4")
• EXT SP connector : 2-conductor 3.5 (d) mm (1⁄8") 8 Ω × 2
(for Main and Sub)
MANTENNA TUNER
• Output matching range:
HF bands 16.7–50 Ω unbalanced*1
50 MHz band 20–125 Ω unbalanced*2
*
1VSWR better than 3:1; *2VSWR better than 2.5:1
• Minimum operating input power:
HF bands : 8 W
50 MHz band : 15 W
• Tuning accuracy : VSWR 1.5:1 or better
• Insertion loss : Less than 1.0 dB
(after tuning)
All stated specifications are subject to change without notice or obligation.
SECTION 1 SPECIFICATIONS

SECTION 2 INSIDE VIEWS
2 - 1
2-1 UPPER LAYER
2-2 UNDER LAYER
BPF unit
Front panel
Rear panel
ANT-SW unit
FILTER unit
PA200W board
CTRL board
TUNER unit
FRONT unit DIGISEL unit
LOGIC unit
DC-DC unit
OSC unit
REG unit
Front panel
Rear panel
MAIN unit
RXPLL-A unit
SCOPE unit
RXPLL-B unit

A
NT-SW UNIT
FILTER UNIT
BPF UNIT
DIGISEL UNIT
LOGIC UNIT
FRONT UNIT
DC-DC UNIT
OSC UNIT
TUNER UNI
T
PA UNIT
SCOPE UNIT
RXPLL-B UNIT RXPLL-A UNIT
DSP-TX BOARD
MAIN UNIT
DSP-B BOARD
DSP-A BOARD
SCOPE UNIT
RXPLL-B UNIT RXPLL-A UNIT
DSP-TX BOARD
MAIN UNIT
DSP-B BOARD
DSP-A BOARD
2-3 TOP VIEW
2-4 BOTTOM VIEW
2 - 2

SQL gate
(Q100,Q101: 2SJ144)
AF power amplifier
(IC140: LA4485)
VCA
(IC105,IC180: NJM2172V)
Head phone amplifier
(IC182: TPA6111A2DGN)
Limit amplifier
(IC230: μPC4570G2)
RF amplifier
(IC820: μPC4094G2)
YGR amplifier
(Q801: 2SC5551)
ALC/APC circuit
(IC60: NJM2058M)
IF amplifier
(Q506: 2SK882)
IF amplifier
Q501: 3SK294
Q504: 2SK882
AF selection circuit
(IC100,IC101: TC4W53F)
ACC AF output circuit
MIC amplifier
(IC821: NJM2172V)
2nd mixer
(D505: HSB88WS)
1st mixer
(D506: HSB88WS)
RF amplifier
(Q508: 2SC5501)
3rd mixer
(IC503: TA4107F)
IF input switch
(IC490: TC4W53F)
SQL gate
(Q100,Q101: 2SJ144)
AF power amplifier
(IC140: LA4485)
VCA
(IC105,IC180: NJM2172V)
Head phone amplifier
(IC182: TPA6111A2DGN)
Limit amplifier
(IC230: μPC4570G2)
RF amplifier
(IC820: μPC4094G2)
YGR amplifier
(Q801: 2SC5551)
ALC/APC circuit*
(IC60: NJM2058M)
IF amplifier*
(Q506: 2SK882)
IF amplifier*
Q501: 3SK294
Q504: 2SK882
AF selection circuit
(IC100,IC101: TC4W53F)
ACC AF output circuit
MIC amplifier
(IC821: NJM2172V)
2nd mixer
(D505: HSB88WS)
1st mixer
(D506: HSB88WS)
RF amplifier
(Q508: 2SC5501)
3rd mixer
(IC503: TA4107F)
IF input switch*
(IC490: TC4W53F)
*Located under side of the point
2-5 MAIN UNIT
2 - 3

Analog switch
(IC331: TC7W53FK)
D/A converter
(IC551: AK4394)
D/A converter
(IC771: BU9480F)
DSP IC
(IC1: TMS320C6713GFN)
A/D converter
(IC401: AK5394A)
Clock amplifier
IC451: TC7S04FU
IC452: SN74LVC1GU04DCKR
Analog switch
(IC331: TC7W53FK)
D/A converter [AF]
(IC551: AK4394)
D/A converter [AGC]
(IC771: BU9480F)
DSP IC
(IC1: TMS320C6713GFN)
A/D converter [IF]
(IC401: AK5394A)
Clock amplifier
IC451: TC7S04FU
IC452: SN74LVC1GU04DCKR
2-6 DSP-A/DSP-B BOARDS
D/A converter
(IC551: AK4394)
DSP IC
(IC1: TMS320C6713GFN)
A/D converter
(IC401: AK5394A)
D/A converter [IF]
(IC551: AD1855JRS)
DSP IC
(IC1: TMS320C6713GFN)
A/D converter [AF]
(IC401: AK5394A)
Clock amplifier
IC451: TC7S04FU
IC452: SN74LVC1GU04DCKR
2-7 DSP-TX BOARD
2 - 4

SDRAM
(IC201*,IC202*: MT48LC16M16A2TG)
RGB converter
(IC204: ADV7123KST50)
CPLD
(IC605*:XC9572XL)
CPLD
(IC52*: XC9572XL)
MAIN CPU2
(IC604*: HD64F2377VFQ33V)
Dual port SRAM
(IC51*: IDT70V24L25PF)
MAIN CPU1
(IC103: HD6417751RBP200)
CF controller
(IC401: PCI1410APGE)
GDC
(IC203: HD64404BT)
SDRAM
(IC1*,IC2: MT48LC16M16A2TG)
FAN controller
(IC821: NJM2904M)
LAN controller
(IC404: RTL8139C+)
SDRAM*
(IC201,IC202: MT48LC16M16A2TG)
RGB converter
(IC204: ADV7123KST50)
CPLD*
(IC605: XC9572XL)
CPLD
(IC52*: XC9572XL)
MAIN CPU2*
(IC604: HD64F2377VFQ33V)
Dual port SRAM*
(IC51: IDT70V24L25PF)
MAIN CPU1
(IC103: HD6417751RBP200)
CF controller*
(IC401: PCI1410APGE)
GDC
(IC203: HD64404BT)
SDRAM
(IC1*,IC2: MT48LC16M16A2TG)
FAN controller*
(IC821: NJM2904M)
LAN controller*
(IC404: RTL8139C+)
*Located under side of the point
2-8 LOGIC UNIT
5V/RC-232C
level converter
(IC903: ADM202EARN)
1.26V regurator
(IC201: SI-3012KS)
14bit DDS IC
(IC820: AD9857AST)
Switching IC
(IC1,IC31: μPG2009TB)
A
/D con
A/D converter
(
IC501:
(IC501: AD7650AST)
S
3 mix
S3 mixer
(
D4:
(D4: HSB88WS)
P
LL IC
PLL IC
(
IC801:
(IC801: LMX2306TM)
V
CO
VCO
(
Q821:
(Q821: 2SK210)
1
IF amplifier
1IF amplifier
(
Q2:
(Q2: 2SC5551)
S
2LO amplifier
S2LO amplifier
(
Q101:
(Q101: 2SC4673)
S
2 mix
S2 mixer
(
D101:
(D101: HSB88WS)
SCOPE ATT
D1: CPH5513
D2: CPH5513
D3: 1SV263
DSP IC
IC601:
TMS320C6711CGDP200
5V/RC-232C
level converter
(IC903: ADM202EARN)
1.26V regulator
(IC201: SI-3012KS)
14bit DDS IC
(IC820: AD9857AST)
Switching IC
(IC1,IC31: μPG2009TB)
A
/D converter
(
IC501: AD7650AST)
S
3 mixer
(
D4: HSB88WS)
P
LL IC
(
IC801: LMX2306TM)
V
CO
(
Q821: 2SK210)
1
IF amplifier
(
Q2: 2SC5551)
S
2LO amplifier
(
Q101: 2SC4673)
S
2 mixer
(
D101: HSB88WS)
SCOPE ATT
D1: CPH5513
D2: CPH5513
D3: 1SV263
DSP IC
IC601:
TMS320C6711CGDP200
2-7 SCOPE UNIT
2 - 5

Mixer
(D821: HSB88WS)
2nd IF amplifier
IC1503,IC1504
: NJM5534MD
Marker switch
(IC602: TC7S08F)
2nd mixer
(IC1501,IC1502: 9A41)
1st mixer [50M RF]
(Q1211,Q1212:
MMBFU310)
MMBFU310)
1st mixer [HF RF]
(IC1051: SD5400CY)
50/HF selection switch
(IC1081: mPG2009TB)
1st IF amplifier
Q1401: 2SC5501
Q1402: 2SC4402
Q1403: 2SC4402
Pre-amplifier [50M RF]
(Q1209,Q1210: 2SC5551)
Pre-amplifier [HF RF]
Q1006-Q1008
:2SC5551
DDS IC [3rd LO]
(IC651: SC-1287)
DDS IC [2nd LO]
(IC501: SC-1246A)
VCO [2nd LO]
(Q541: 2SK210)
REF buffer amplifier
(Q30: 2SC4081)
DDS IC [1st LO]
(IC101: SC-1246A)
VCO [1st LO]
(Q150: 2SK210)
PLL IC
(IC201: LMX2306TM)
VCO circuit [1st LO]
TX/RX LO switch
(D421,D422: MA77)
Mixer
(D821: HSB88WS)
2nd IF amplifier
IC1503,IC1504
: NJM5534MD
Marker switch*
(IC602: TC7S08F)
2nd mixer
(IC1501,IC1502: 9A41)
1st mixer [50M RF]
(Q1211,Q1212: MMBFU310)
1st mixer [HF RF]
(IC1051: SD5400CY)
50/HF selection switch*
(IC1081: μPG2009TB)
1st IF amplifier
Q1401: 2SC5501
Q1402: 2SC4402
Q1403: 2SC4402
Pre-amplifier* [50M RF]
(Q1209,Q1210: 2SC5551)
Pre-amplifier* [HF RF]
Q1006-Q1008
:2SC5551
DDS IC [3rd LO]
(IC651: SC-1287)
DDS IC [2nd LO]
(IC501: SC-1246A)
VCO [2nd LO]
(Q541: 2SK210)
REF buffer amplifier
(Q30: 2SC4081)
DDS IC [1st LO]
(IC101: SC-1246A)
VCO [1st LO]
(Q150: 2SK210)
PLL IC
(IC201: LMX2306TM)
VCO circuit [1st LO]
TX/RX LO switch
(D421,D422: MA77)
*Located under side of the point
2-9 RXPLL-A BOARD
Mixer
(D821: HSB88WS)
2nd IF amplifier
IC1503,IC1504
: NJM5534MD
Marker switch
(IC602: TC7S08F)
2nd mixer
(IC1501,IC1502: 9A41)
1st mixer [50M RF]
(Q1211,Q1212: MMBFU310)
1st mixer [HF RF]
(IC1051: SD5400CY)
50/HF selection switch
(IC1081: mPG2009TB)
1st IF amplifier
Q1401: 2SC5501
Q1402: 2SC4402
Q1403: 2SC4402
Pre-amplifier [50M RF]
(Q1209,Q1210: 2SC5551)
Pre-amplifier [HF RF]
Q1006-Q1008
:2SC5551
DDS IC [3rd LO]
(IC651: SC-1287)
DDS IC [2nd LO]
(IC501: SC-1246A)
VCO [2nd LO]
(Q541: 2SK210)
REF buffer amplifier
(Q30: 2SC4081)
DDS IC [1st LO]
(IC101: SC-1246A)
VCO [1st LO]
(Q150: 2SK210)
PLL IC
(IC201: LMX2306TM)
VCO circuit [1st LO]
TX/RX LO switch
(D421,D422: MA77)
2nd IF amplifier
IC1503,IC1504
: NJM5534MD
Buffer amplifier
[SCOPE clock]
(Q601: 2SC4215)
2nd mixer
(IC1501,IC1502: 9A41)
1st mixer [50M RF]
(Q1211,Q1212: MMBFU310)
1st mixer [HF RF]
(IC1051: SD5400CY)
50/HF selection switch*
(IC1081: μPG2009TB)
1st IF amplifier
Q1401: 2SC5501
Q1402: 2SC4402
Q1403: 2SC4402
Pre-amplifier* [50M RF]
(Q1209,Q1210: 2SC5551)
Pre-amplifier* [HF RF]
Q1006-Q1008
:2SC5551
DDS IC [DSP clock]
(IC651: SC-1287)
DDS IC [2nd LO]
(IC501: SC-1246A)
VCO [2nd LO]
(Q541: 2SK210)
REF buffer amplifier
(Q30: 2SC5226)
DDS IC [1st LO]
(IC101: SC-1246A)
VCO [1st LO]
(Q150: 2SK210)
PLL IC
(IC201: LMX2306TM)
VCO circuit [1st LO]
*Located under side of the point
2-10 RXPLL-B UNIT
2 - 6

10MHz OCXO
(X1: CR-772)
I/O controller
(Q12,Q13: DTC114EU)
Buffer amplifier
(Q70: 2SC4081)
Switching relay
(RL10: FTR-B4CA012Z)
D/A converter
(IC91: AD5260BRU50)
Switching relay
(RL11: FTR-B4CA012Z)
10MHz OCXO
(X1: CR-772)
I/O controller
(Q12,Q13: DTC114EU)
Buffer amplifier
(Q70: 2SC4081)
Switching relay
(RL10: FTR-B4CA012Z)
D/A converter
(IC91: AD5260BRU50)
Switching relay
(RL11: FTR-B4CA012Z)
2-11 OSC UNIT
Power amplifier
(Q401,Q402: SD2931)
RF amplifier
(Q101: RD01MUS1)
Drive amplifier
(Q301: SD2918)
Pre-drive amplifier
(Q201: PD55003)
Power amplifier
(Q401,Q402: SD2931)
RF amplifier
(Q101: RD01MUS1)
Drive amplifier
(Q301: SD2918)
Pre-drive amplifier
(Q201: PD55003)
2-12 PA200W BOARD
2 - 7

SECTION 3 CIRCUIT DESCRIPTION
3 - 1
3-1 RECEIVER CIRCUITS
3-1-1 ANTENNA SWITCHING CIRCUIT
(ANT-SW UNIT)
The ANTENNA switching circuit leads receive signals to
bandpass filters from an antenna connector while receiving.
However, the circuit leads the signal from the RF power
amplifier to the antenna connector while transmitting.
RF signals are applied to the RX-A, RX-B or RX-ONLY
circuits.
• RX-A CIRCUIT
RF signals from [ANT1], [ANT2], [ANT3] or [ANT4] pass
through one of the antenna selectors (RL51; passing
through [ANT1], RL61; passing through [ANT2], RL71;
passing through [ANT3], RL81; passing through [ANT4]),
and are then applied to the CTRL board via J1.
The RF signals pass through the current detector (CTRL
board; D301, D302), and are then applied to the BPF unit
via J351 on the CTRL board.
• RX-B CIRCUIT
RF signals from [ANT1], [ANT2], [ANT3] or [ANT4] pass
through one of the antenna selectors (RL52; passing
through [ANT1], RL62; passing through [ANT2], RL72;
passing through [ANT3], RL82; passing through the ANT4),
and are then applied to the BPF unit via J2.
• RX-ONLY CIRCUIT
RF signals from [ANT4] pass through the antenna selector
(RL84), and are then applied to the BPF unit via J3.
3-1-2 BANDPASS FILTER CIRCUIT
(BPF, AND DIGISEL UNITS)
RF bandpass filters pass only the desired band signals and
suppress any undesired band signals. The RF circuit has
11 bandpass filters and 1 low-pass filter.
• RX-A OR RX-ONLY CIRCUITS
RF signals from RX-A circuit (CTRL board; J351) or
RX-ONLY circuit (ANT-SW unit; J3) are applied to the RF
signal switching circuit (BPF unit; RL402). The filtered
signals pass through (or bypass) splitter (BPF unit; L371–
L373) via the RL371 and RL355 (BPF unit), and are then
attenuated at RL354 (3 dB), RL353 (6 dB) and RL352 (12
dB) on the BPF unit. A portion of the filtered signals are
separated at the splitter, and are then applied to the RX-B
circuit’s DW selector (BPF unit; RL855).
The attenuated signals pass through the low-pass filter or
one of the bandpass filters via the 6M selector (BPF unit;
RL851).
(1) 0.03–30 MHz (BPF AND DIGISEL UNITS)
The signals pass through the low-pass filter or one of the
9 bandpass filters. The filtered signals pass through (or
bypass) the bandpass filter and the RF amplifier (DIGISEL
unit; Q201) via the D_S_THRU selectors (RL21, RL2) on
the DIGISEL unit, and are then applied to the pre-amplifier
circuit on the RXPLL-A unit.
(2) 50–60 MHz (BPF UNIT)
The signals pass through the one of the 2 bandpass filters,
and are then amplified (or bypass) at the DW amplifier
(Q901) via the DW selectors (RL900, RL901). The signals
are applied to (or bypass) the pre-amplifier circuit.
• RX-B CIRCUIT
RF signals from RX-B circuit (ANT-SW unit; J2) pass
through the REV_Po detector (BPF unit; Q873, D872). The
signals are applied to the DW selector (BPF unit; RL855).
A portion of RF signals from RX-A or RX-ONLY circuits are
applied to the this selector too.
The signals are attenuated at RL854 (3 dB), RL853 (6 dB)
and RL852 (12 dB) on the BPF unit, and are then applied
to the 6M selector (BPF unit; RL851).
The attenuated signals pass through the low-pass filter or
one of the bandpass filters.
(1) 0.03–30 MHz (BPF AND DIGISEL UNITS)
The signals pass through the low-pass filter or one of the
9 bandpass filters. The filtered signals pass through (or
bypass) the bandpass filter and the RF amplifier (DIGISEL
unit; Q701) via the D_S_THRU selectors (RL521, RL502)
on the DIGISEL unit, and are then applied to the pre-
amplifier circuit on the RXPLL-B unit.
(2) 50–60 MHz (BPF UNIT)
The signals pass through the one of the 2 bandpass filter,
and are then amplified (or bypass) at the DW amplifier
(Q951) via the DW selectors (RL950, RL951). The signals
are applied to the pre-amplifier circuit.
3-1-3 PRE-AMPLIFIER CIRCUITS
(BPF, RXPLL-A, AND RXPLL-B UNITS)
The IC-7800 has 2 gain levels of pre-amplifier circuits
which is composed of the pre-amplifier1 and pre-amplifier2.
The circuit is controlled by [P.AMP] switch.
• RX-A OR RX-ONLY CIRCUITS
(1) 0.03–30 MHz (RXPLL-A UNIT)
The RF signals from the DIGISEL unit are applied to (or
bypass) the DW amplifier (Q1001) via the DW selectors
(RL1001, RL1002), and are then applied to the pre-
amplifier circuit.
When [P.AMP] switch is set to [P.AMP 1] or [P.AMP 2], the
signals are applied to the pre-amplifier1 (Q1007, Q1008) or
pre-amplifier2 (Q1006) circuit via the P.AMP_ON selectors
(RL1003, RL1006) and P.AMP selectors (RL1004, RL1005),
respectively. Pre-amplified or bypassed signals are applied
to the 1st mixer circuit after being passed through the low-
pass filter (L1052–L1054, C1053–C1057, C1067).

3 - 2
(2) 50–60 MHz (BPF AND RXPLL-A UNITS)
When [P.AMP] switch is set to [P.AMP 1] or [P.AMP 2],
the amplified signals from the DW amplifier (BPF unit;
Q901) are applied to the pre-amplifier2 (BPF unit; Q903)
or pre-amplifier1 (RXPLL-A unit; Q1209, Q1210) via the
P.AMP2_ON selectors (BPF unit; RL902, RL903) and
P.AMP1_ON selectors (RXPLL-A unit; RL1203, RL1206),
respectively. Pre-amplified or bypassed signals are applied
to the 1st mixer circuit after being passed through the low-
pass filter (RXPLL-A unit; L1217–L1219, C1244–C1250,
C1268).
• RX-B CIRCUIT
(1) 0.03–30 MHz (RXPLL-B UNIT)
The RF signals from the DIGISEL unit are applied to (or
bypass) the DW amplifier (Q1001) via the DW selectors
(RL1001, RL1002), and are then applied to the pre-
amplifier circuit.
When [P.AMP] switch is set to [P.AMP 1] or [P.AMP 2], the
signals are applied to the pre-amplifier1 (Q1007, Q1008) or
pre-amplifier2 (Q1006) circuit via the P.AMP_ON selectors
(RL1003, RL1006) and P.AMP selectors (RL1004, RL1005),
respectively. Pre-amplified or bypassed signals are applied
to the 1st mixer circuit after being passed through the low-
pass filter (L1052–L1054, C1053–C1057, C1067).
(2) 50–60 MHz (BPF AND RXPLL-B UNITS)
When [P.AMP] switch is set to [P.AMP 1] or [P.AMP 2],
the amplified signals from the DW amplifier (BPF unit;
Q961) are applied to the pre-amplifier2 (BPF unit; Q953)
or pre-amplifier1 (RXPLL-B unit; Q1209, Q1210) via the
P.AMP2_ON selectors (BPF unit; RL952, RL953) and
P.AMP1_ON selectors (RXPLL-B unit; RL1203, RL1206),
respectively. Pre-amplified or bypassed signals are applied
to the 1st mixer circuit after being passed through the low-
pass filter (RXPLL-B unit; L1217–L1219, C1244–C1250,
C1268).
3-1-4 1ST MIXER CIRCUIT
(RXPLL-A AND RXPLL-B UNITS)
The 1st mixer circuit mixes the receive signals with the 1st
LO signal to convert the receive signal frequencies into
a 64.455 MHz (main) or 64.555 MHz (sub) 1st IF signal.
The IC-7800 has four 1st mixer circuits for the dualwatch
function.
• RX-A OR RX-ONLY CIRCUITS (RXPLL-A UNIT)
(1) 0.03–30 MHz
The filtered signals pass through the L1055, and are
then applied to the 1st mixer circuit (IC1051). The applied
signals are mixed with 1st LO signal from the RXPLL-A
circuit to convert into a fixed 64.455 MHz 1st IF signal.
The converted 1st IF signal is applied to the 50/HF selector
(IC1081, pin 1).
(2) 50–60 MHz
The filtered signals pass through the L1220, and are then
applied to the 1st mixer circuit (Q1211, Q1212). The applied
signals are mixed with 1st LO signal from the RXPLL-A
circuit to convert into a fixed 64.455 MHz 1st IF signal.
The converted 1st IF signal is applied to the 50/HF selector
(IC1081, pin 3).
The selected 1st IF signal passes through the low-pass
filter (L1058, L1060, L1062, L1063, C1061, C1062, C1064,
C1066, C1070, C1074, R1054), and is then applied to the
1st IF circuit.
• RX-B CIRCUIT (RXPLL-B UNIT)
(1) 0.03–30 MHz
The filtered signals pass through the L1055, and are
then applied to the 1st mixer circuit (IC1051). The applied
signals are mixed with 1st LO signal from the RXPLL-B
circuit to convert into a fixed 64.555 MHz 1st IF signal.
The converted 1st IF signal is applied to the 50/HF selector
(IC1081, pin 1).
(2) 50–60 MHz
The filtered signals pass through the L1220, and are then
applied to the 1st mixer circuit (Q1211, Q1212). The applied
signals are mixed with 1st LO signal from the RXPLL-B
circuit to into a fixed 64.555 MHz 1st IF signal.
The converted 1st IF signal is applied to the 50/HF selector
(IC1081, pin 3).
The selected 1st IF signal passes through the low-pass
filter (L1058, L1060, L1062, L1063, C1061, C1062, C1064,
C1066, C1070, C1074, R1054), and is then applied to the
1st IF circuit.
1st LO Main
1st LO Sub
Crystal
filter
FI401,
FI402,
FI403
FI401,
FI402,
FI403
Main 1st mixer
IC1051,
Q1211, Q1212
Sub 1st mixer
IC1051,
Q1211, Q1212
2nd LO Main
PWR amp.
IC140
Main 2nd mixer
IC1051,
IC1052
Sub 2nd mixer
IC1051,
IC1052
2nd LO Sub
Crystal
filter
0.03 60.0 MHz
0.03 60.0 MHz
DSP-A
board
MAIN unit
CHASSIS
unit
DSP-B
board
RXPLL-B UNIT
RXPLL-A UNIT
• RECEIVER CONSTRUCTION

3 - 3
3-1-5 1ST IF CIRCUIT
(RXPLL-A AND RXPLL-B UNITS)
The 1st IF circuit filters and amplifies the 1st IF signal. The
1st IF signal from the 1st mixer circuit is applied to an MCF
(Monolithic Crystal Filter) to suppress out-of-band signals.
• RX-A OR RX-ONLY CIRCUITS (RXPLL-A UNIT)
The filtered 1st IF signal from the low-pass filter passes
through the one of the three crystal bandpass (roofing)
filters (FI1401: bandwidth is 15 kHz, FI402: bandwidth is
6 kHz or FI403: bandwidth is 3 kHz) via the FIL selectors
(IC1402, IC1403). The filtered signal is amplified at the
1st IF amplifiers (Q1401–Q1403) via the low-pass filter
(L1405, L1406, C1420, C1421). The amplified 1st IF signal
is applied to the 2nd mixer circuit.
• RX-B CIRCUIT (RXPLL-B UNIT)
The filtered 1st IF signals from the low-pass filter passes
through the one of the three crystal bandpass (roofing)
filters (FI1401: bandwidth is 15 kHz, FI1402: bandwidth is
6 kHz or FI1403: bandwidth is 3 kHz) via the FIL selectors
(IC1402, IC1403). The filtered signal is amplified at the 1st
IF amplifiers (Q1401–Q1403) via the low-pass filter (L1405,
L1406, C1420, C1421), and is then applied to the 2nd
mixer circuit.
3-1-6 2ND MIXER CIRCUIT
(RXPLL-A AND RXPLL-B UNITS)
The 2nd mixer circuit mixes the amplified 1st IF signal and
2nd LO signal for conversion into the 2nd IF signal.
• RX-A OR RX-ONLY CIRCUITS (RXPLL-A UNIT)
The 1st IF signal from the 1st IF amplifiers (Q1401–Q1403)
is applied to the 2nd mixer circuit (IC1501, pin 4, IC1502,
pin 4) respectively. The applied signals are mixed with 2nd
LO signal from the RXPLL-A circuit to convert into 36 kHz
2nd IF signal.
The 2nd IF signal from the 2nd mixer circuit (IC1501, pin
5) is amplified at the buffer amplifier (Q1501), and is then
applied to the 2nd IF amplifier (IC1503, pin 3). The signal is
applied to the 90 degrees transphasor (IC1505, pin 6).
The 2nd IF signal from the other 2nd mixer circuit (IC1502,
pin 5) is amplified at the buffer amplifier (Q1502), and is
then applied to the 2nd IF amplifier (IC1504, pin 3). The
signal is applied to the 90 degrees transphasor (IC1505,
pin 2).
The signals from the 90 degrees transphasor (IC1505, pins
1, 7) are applied to the compositor (IC1505, pins 9, 10).
The signal is amplified at other 2nd IF amplifier (IC1506),
and is then applied to the DSP-A board to demodulate 2nd
IF signal.
A portion of 2nd IF signal from the compositor (IC1505, pin
8) is applied to the AGC detector circuit.
The 2nd mixer circuit has 2 mixers and 90 degrees
transphasor to improve image rejection ratio.
• RX-B CIRCUIT (RXPLL-B UNIT)
The 1st IF signal from the 1st IF amplifiers (Q1401–Q1403)
is applied to the 2nd mixer circuit (IC1501, pin 4, IC1502,
pin 4) respectively. The applied signals are mixed with 2nd
LO signal from the RX-B circuit to convert into 36 kHz 2nd
IF signal.
The 2nd IF signal from the 2nd mixer circuit (IC1501, pin
5) is amplified at the buffer amplifier (Q1501), and is then
applied to the 2nd IF amplifier (IC1503, pin 3). The signal is
applied to the 90 degrees transphasor (IC1505, pin 6).
The 2nd IF signal from the other 2nd mixer circuit (IC1502,
pin 5) is amplified at the buffer amplifier (Q1502), and is
then applied to the 2nd IF amplifier (IC1504, pin 3). The
signal is applied to the 90 degrees transphasor (IC1505,
pin 2).
The signals from the 90 degrees transphasor (IC1505, pins
1, 7) are applied to the compositor (IC1505, pins 9, 10).
The signal is amplified at other 2nd IF amplifier (IC1506),
and is then applied to the DSP-B board to demodulate 2nd
IF signal.
A portion of 2nd IF signal from the compositor (IC1505, pin
8) is applied to the AGC detector circuit.
The 2nd mixer circuit has 2 mixers and 90 degrees
transphasor to improve image rejection ratio.
IF_IN 6
7
1
IC331
switch
RXPLL-A/B
units
DSP-A/B units
36 kHz
3rd IF
signal
Ò
ADS
Ó
signal IC341,
IC371
IC301
IC501 IC771
IC701
to AF amplifier circuit
IC601,
IC651
Low-pass
filter
AGC
"AGC OUT" signal to
RXPLL-A/B units
"AGC DET" signal from
RXPLL-A/B units
Low-pass
filter
A/D
converter
(IC401)
5
DSP IC
(IC1)
D/A
D/A
converter
(IC551)
• DSP CIRCUIT (RECEIVER)

3 - 4
3-1-7 DSP RECEIVER CIRCUIT
(DSP-A AND DSP-B BOARDS)
The DSP (Digital Signal Processor) circuit enables digital
IF filter, digital noise reduction, digital PSN (Phase Shift
Network)/Low Power/Phase demodulation, digital automatic
notch, etc.
• RX-A AND RX-ONLY CIRCUITS (DSP-A BOARD)
The 36 kHz 2nd IF signal from the 2nd IF amplifier
(RXPLL-A unit, IC1506) passes through the analog switch
(IC331, pins 1, 7) with limiter function, and is then applied
to the buffer amplifiers (IC301, pin 2, IC341, pin 2, IC371,
pin 2) to convert to balancing signal. The signal is applied
to the A/D convertor (IC401, pins 4, 5).
The converted digital signals are applied to the DSP IC (IC1)
to do filtering, demodulate and so on. The demodulated
digital signals are applied to the D/A convertor (IC551) to
convert into analog AF signals.
The converted analog AF signals pass through the low-
pass filter (IC601, pins 3, 6, IC651, pins 3, 6), and are then
applied to the buffer amplifier (IC701, pins 2, 3) to convert
into unbalancing signals.
The signals are applied to the AF amplifier circuit.
• RX-B CIRCUIT (DSP-B BOARD)
The 36 kHz 2nd IF signal from the 2nd IF amplifier
(RXPLL-B unit, IC1506) passes through the analog switch
(IC331, pins 1, 7) with limiter function, and is then applied
to the buffer amplifiers (IC301, pin 2, IC341, pin 2, IC371,
pin 2) to convert to balancing signal. The signal is applied
to the A/D convertor (IC401, pins 4, 5).
The converted digital signals are applied to the DSP IC (IC1)
to do filtering, demodulate and so on. The demodulated
digital signals are applied to the D/A convertor (IC551) to
convert into analog AF signals.
The converted analog AF signals pass through the low-
pass filter (IC601, pins 3, 6, IC651, pins 3, 6), and are then
applied to the buffer amplifier (IC701, pins 2, 3) to convert
into unbalancing signals.
The signals are applied to the AF amplifier circuit.
3-1-8 AF AMPLIFIER CIRCUITS (MAIN UNIT)
The AF amplifier circuits amplifies the AF input signals to
the suitable driving level for the speaker.
• MAIN SPEAKER OUTPUT
The AF signals from the DSP-A and DSP-B boards are
applied to the AF switch (MAIN unit: IC100, pin 7 for
DSP-A, pin 6 for DSP-B), and pass through the SQL switch
(Q100) which is controlled by “SQLM” signal. The signals
are applied to the buffer amplifier (IC102, pin 3), and are
then amplified at the VCA (Voltage Control Amplifier) circuit
(IC105, pin 14). The amplified signals from the VCA circuit
(pin 11) are applied to the AF power amplifier (IC140, pin 1)
to obtain the suitable driving level for speaker. The output
signals from pin 13 pass through the mute switch (Q141,
RL140), and are then applied to the internal speaker jack
(J142, pin 1) via the MAIN speaker phone jack (J140).
• SUB SPEAKER OUTPUT
The AF signals from the DSP-A and DSP-B boards are
applied to the AF switch (MAIN unit: IC101, pin 6 for
DSP-A, pin 7 for DSP-B), and pass through the SQL switch
(Q101) which is controlled by “SQLS” signal. The signals
are applied to the buffer amplifier (IC102, pin 5), and are
then amplified at the VCA (Voltage Control Amplifier) circuit
(IC105, pin 1). The amplified signals from VCA circuit from
pin 4 are applied to the AF power amplifier (IC140, pin 2)
to obtain the suitable driving level for speaker. The output
signals from pin 12 pass through the mute switch (Q141,
RL140), and are then applied to the SUB speaker jack
(J141).
[Main SP out]
[Sub SP out]
Int. SP
"PHI" signal to the Front CPU.
DRAF
7
6
1
IC100
Mute
DSP-A board
CHASSIS unit
FRONT unit
DSP-B board
“CROSS” signal
5
7
Q100
Q101
6
1
IC101
“CROSS” signal
IC102 IC105 IC140
IC180 IC182
5
Amp.
Amp.
SQL
SW
VCA
VCA
SQL
SW
VCA
VCA
PA
PA
AF
AF
• AF AMPLIFIER CIRCUIT

3 - 5
3-1-9 AGC CIRCUIT
( RXPLL-A AND RXPLL-B UNITS AND DSP-A AND
DSP-B BOARDS)
The AGC (Automatic Gain Control) circuit reduces IF
amplifier gain and attenuates IF signal to keep the audio
output at a constant level.
• RX-A CIRCUIT (RXPLL-A UNIT AND DSP-A BOARD)
A part of signals from the compositor circuit (RXPLL-A
unit; IC1505, pin 8) are applied to the AGC detector circuit
(IC1652, D1653), and are then amplified at the AGC
amplifier (RXPLL-A unit; IC1653, pin 3). The amplified
signals are applied to the DSP-A board via the J921, pin 1
on the DSP-A board as “AGCDET_A” line.
The amplified signals are applied to the amplifier (DSP-A
board; IC501, pin 2), and are then applied to the A/D
converter (DSP-A board; IC401, pin 25). The converted
digital signals are applied to the DSP IC (DSP-A board;
IC1), and then applied to the D/A converter (DSP-A board;
IC771). The converted analog signals are amplified at the
AGC amplifier (DSP-A board; IC501, pin 5), and are then
applied to the MAIN unit via the J921, pin 6 as “AGCOUT_A”
line.
The amplified signals are applied to the RXPLL-A unit via
the J1701, pin 9 as “DAGC” line after being passed through
the J400, pin 8 on MAIN unit as “AGC1A” line. The applied
signals are amplified at the AGC amplifier (RXPLL_A unit;
IC1653, pin 5), and are then applied to the IF amplifier
(RXPLL-A unit; Q1403) as AGC signal.
• RX-B CIRCUIT (RXPLL-B UNIT AND DSP-B BOARD)
A part of signals from the compositor circuit (RXPLL-B
unit; IC1505, pin 8) are applied to the AGC detector circuit
(IC1652, D1653), and are then amplified at the AGC
amplifier (RXPLL-B unit; IC1653, pin 3). The amplified
signals are applied to the DSP-B board via the J921, pin 1
on the DSP-B board as “AGCDET_B” line.
The amplified signals are applied to the amplifier (DSP-B
board; IC501, pin 2), and are then applied to the A/D
converter (DSP-B board; IC401, pin 25). The converted
digital signals are applied to the DSP IC (DSP-B board;
IC1), and then applied to the D/A converter (DSP-B board;
IC771). The converted analog signals are amplified at the
AGC amplifier (DSP-B board; IC501, pin 5), and are then
applied to the MAIN unit via the J921, pin 6 as “AGCOUT_B”
line. The amplified signals are applied to the RXPLL-B unit
via the J1701, pin 9 as “DAGC” line after being passed
through the J400, pin 8 on MAIN unit as “AGC1B” line. The
applied signals are amplified at the AGC amplifier (RXPLL_B
unit; IC1653, pin 5), and are then applied to the IF amplifier
(RXPLL-B unit; Q1403) as AGC signal.
3-2 TRANSMITTER CIRCUITS
3-2-1 MICROPHONE AMPLIFIER CIRCUIT (MAIN UNIT)
The microphone amplifier circuit amplifies microphone
audio signals to a level needed for the DSP circuit.
Audio signals from [MIC] connector (MIC board; J1, pin 1)
are amplified at the audio amplifier section in IC821 (pin 2),
then applied to the VCA section. The gain controlled signals
are output from (IC821, pin 4) and passed through the
analog switch (IC201, pins 1, 7). The signals pass through
the analog switch (IC460, pins 1, 6), and are then applied
to the DSP circuit after being passed through the limiter
amplifier (IC230, pins 1, 3) as the “AFIN” signal.
The VCA section in IC821 controls microphone input gain
according to [MIC GAIN] control level using the MIGV signal
coming from the main CPU via the I/O expander (IC330,
pin 2).
3-2-2 DSP TRANSMITTER CIRCUIT (DSP-TX BOARD)
The DSP (Digital Signal Processor) circuit enables digital
IF filter, digital noise reduction, digital PSN (Phase Shift
Network)/Low Power/Phase demodulation, digital automatic
notch, and etc.
The AF signals from the limiter amplifier (MAIN unit; IC230,
pin 1) are then applied to the buffer amplifiers (IC301;
pins 2, 6, IC341, pins 2, 6, IC371, pins 2, 6) to convert
to balancing signal. The signals are applied to the A/D
convertor (IC401, pins 4, 5).
The converted digital signals are applied to the DSP IC (IC1)
to do filtering, modulate and so on. The modulated signals
are applied to the D/A converter (IC551) to convert into a
36 kHz IF signal.
MAIN unit
DSP-TX unit
AF signal
IC341,
IC371
IC301
"ANVOX"
signal
IC701
36 kHz TX IF signal
to the MAIN unit
IC601,
IC651
Low-pass
filter
L+
R+
R
L
LPF
Low-pass
filter
A/D
converter
(IC401)
DSP IC
(IC1)
D/A
converter
(IC551)
• DSP TRANSMITTER CIRCUIT

3 - 6
The converted analog IF signal passes through the low-
pass filter (IC601, pins 3, 6, IC651, pins 3, 6), and is then
applied to the IF amplifier (IC701, pins 2, 3) to convert to
unbalancing IF signal.
The 36 kHz IF signal from the IF amplifier (pin 6) is applied
to the 3rd mixer circuit.
3-2-3 3RD MIXER CIRCUIT (MAIN UNIT)
The modulated 36 kHz IF signal from the DSP-TX board
pass through the two low-pass filters (IC501, pins 3, 6,
IC502, pins 3, 6), and is then applied to the 3rd mixer
circuit (IC503, pin 3). The 36 kHz IF signal is mixed with
491 kHz 3rd LO signal (from RXPLL-A unit) to produce the
455 kHz 3rd IF signal.
The signal is amplified at the IF amplifier (Q501), and
passes through the one of the ceramic bandpass filters
(FI501; 20 kHz, FI502; 4 kHz). The filtered signal is
amplified at the other IF amplifier (Q504), and is then
applied to the 2nd mixer circuit via the attenuator (R545–
R547).
3-2-4 2ND MIXER CIRCUIT (MAIN UNIT)
The 3rd IF signal from the 3rd mixer circuit is applied to the
2nd mixer circuit (D505). The applied 3rd IF signal is mixed
with 64 MHz 2nd LO signal (from the RXPLL-A unit) to
produce the 64.455 MHz 2nd IF signal.
The signal passes through the bandpass filter (FI503;
Fc=64.455 MHz) to suppress unwanted signals, and is
then applied to the IF amplifier (Q506). The 2nd IF signal is
applied to the 1st mixer circuit.
3-2-5 1ST MIXER AND RF CIRCUITS (MAIN UNIT)
The 2nd IF signal from the 2nd mixer circuit is applied to
the 1st mixer circuit (D506). The 1st IF signal is mixed with
1st LO signal (from the RXPLL-A unit) to produce the RF
signal.
The RF signal passes through the low-pass filter (L518,
L519, C564–C568) and 3 dB attenuator (R578–R580). The
signal is then applied to the RF amplifier and bandpass
filter circuits.
3-2-6 RF AMPLIFIER AND BANDPASS FILTER
CIRCUITS (MAIN UNIT)
The RF signal is amplified at the RF amplifier (Q508), and
applied to the one of the 10 bandpass filters via the 5 dB
attenuator (R575–R577).
The filtered signal is applied to the YGR amplifier (Q801),
and passes through the 3 dB attenuator (R805–R807). The
signal is applied to the power amplifier circuit via the J801.
3-2-7 POWER AMPLIFIER CIRCUIT (PA200W BOARD)
The signal from the attenuator (MAIN unit; R805–R807)
passes through the 3 dB attenuator (R101–R103) via the
J1, and is then amplified at the RF amplifier (Q101). The
signal is applied to the pre-drive (Q201) and drive amplifier
(Q301), and is then amplified at the power amplifier (Q401,
Q402) to obtain 200 W output power.
The output signal is applied to the FILTER circuit via the
J401.
3-2-8 FILTER CIRCUIT (FILTER UNIT)
The power amplified signal passes through the one of the
9 low-pass filters which is depended on the RF frequencies
to suppress the unwanted frequency components. The
filtered signal is applied to the CONTROL circuit via the
J904.
3-2-9 CONTROL CIRCUIT (CTRL BOARD)
The filtered signal from the FILTER unit is applied to the
SWR-DET circuit (D101, D102) to detect SWR level, and
then passes through the P-DET (D151, D152) and R-DET
circuit (D201, D202). The signal is applied to the T/R switch
(RL251), and is then applied to (or bypass) the antenna
tuner circuit (NETWORK board) via the antenna tuner
selector switch (RL252, RL253).
The tuned signal from J252 (or bypass signal) passes
through the CRNT DET circuit (D301, D302) to detect the
driving current, and is then applied to the antenna switching
circuit.
The detected signal at CRNT DET circuit is amplified at
the amplifier (IC301, pin 3), and is then applied to the
TUNER_CPU (IC1, pin 16).
3-2-10 ANTENNA SWITCHING CIRCUIT
(ANT-SW UNIT)
The signal from the CTRL board is applied to the ANT-SW
unit via the J1, and is applied to the one of the 4 relays
(RL51, RL61, RL71, RL81). The signal is output from the
one of the 4 antenna connectors, J51, J61, J71 or J81.
1st LO
D506
Ceramic
filter
FI501
20 kHz
BPF
FI503
20 kHz
4 kHz
Ceramic
filter
FI502
MIC 455 kHz
DSP-TX
board
3rd LO
(491 kHz)
IF
IC503 Q501
IF
Q504
IF
Q506
BPFs
RF
Q508
to PA200W board
64.455 kHz
2nd LO
(64.00 MHz)
D505
36 kHz IF
• TRANSMITTER CONSTRUCTION

3 - 7
The antenna switching relays are controlled by the
RL-CTRL CPU (IC11, pins 6, 9, 12, 15) as the “ANT1A”,
“ANT2A”, “ANT3A” and “ANT4A” signals respectively.
3-2-11 ALC CIRCUIT
(CTRL BOARD, LOGIC AND MAIN UNITS)
The ALC (Automatic Level Control) circuit controls the gain
of IF amplifiers in order for the IC-7800 to output a constant
RF power set by [RF PWR] control even when the supplied
voltage shifts, etc.
The RF power level is detected at one of the SWR detector
circuits (CTRL board; D102) to be converted into DC
voltage and applied to the MAIN unit as the FORV signal
via the LOGIC unit.
The FORV signal from the LOGIC unit is applied to the
comparator (MAIN unit; IC60, pin 2). The POCV signal,
controlled by [RF POWER] control via the I/O expander
(MAIN unit; IC330, pin 4), is also applied to the other input
(pin 3) for reference. The compared signal is output from
pin 1 and applied to the IF amplifiers (MAIN unit; Q504,
Q506) to control amplifying gain.
When the FORV signal exceeds the POCV voltage, ALC
bias voltage from the comparator controls the IF amplifiers.
This adjusts the output power to a specified level from
[RF POWER] control until the FORV and POCV voltages
are equalized.
In AM mode, the comparator operates as an averaging ALC
amplifier. Q61 (MAIN unit) turns ON and shift the POCV
voltage to adjust the TX output power for 50 W (maximum)
through R82.
The ALC bias voltage is also applied to the ALC meter
amplifier (MAIN unit; IC61, pin 9) to obtain an ALC meter
signal (ALCL). The amplified signal is applied to the main
CPU2 (LOGIC unit; IC604, pin 115) to drive the S/RF meter
via the front CPU (IC6) on the DISPLAY board.
An external ALC input from [ALC] jack, [ACC1] or [ACC2]
sockets is applied to the ALC amplifier (Q62). External ALC
operation is identical to that of the internal ALC.
The FORV signal is also applied to the power meter
amplifier (LOGIC unit; IC851, pin 5). The amplified signal is
applied to the main CPU2 (LOGIC unit; IC604, pin 113) to
drive the S/RF meter as an FORL signal when the power
meter is selected.
3-2-12 APC CIRCUIT
(MAIN UNIT, CTRL AND PA200W BOARDS)
The APC (Automatic Power Control) circuit protects the
power amplifiers on the PA 200W board from high SWR
and excessive current.
The reflected wave signal appears and increases when
the connected antenna is mismatched to 50 . The SWR
detector (CTRL board; D101) detects the reflected signal,
and applies it to the APC circuit (MAIN unit; IC60, pin 13)
as a REFV signal via the LOGIC unit.
When the REFV signal level increases, the APC circuit
decreases the ALC voltage to activate the APC.
For the current APC, the power transistor current is
obtained by detecting the voltages (IDH and IDL) which
appear at both terminals of the ID detector (PA200W board;
R521–R523). The detected voltages are applied to the
differential amplifier (IC60, pins 5, 6). When the current of
transistors is increased, the amplifier controls the ALC line
to prevent excessive current flow.
3-2-13 TEMPERATURE PROTECTION CIRCUIT
(PA200W BOARD)
The cooling fan (CHASSIS; MF1) is activated while
transmitting or when the temperature of the power amplifier
exceeds the preset value. The temperature protection
circuit consists of IC604, IC330, IC821, Q821, Q822 and
R3.
While transmitting, IC821 and Q821 are turned ON, and
provide a voltage to the cooling fan to rotate at medium
speed. The thermistor (R3) detects the temperature of the
power amplifiers (Q401, Q402). The detected signal is
applied to the CPU (IC604, pin 118) to analyze the power
amplifier’s temperature via “THML” signal. The signal is
applied to the D/A converter (IC330), and is then applied
to the FAN controller (IC821, pin 1, Q821, Q822) via “FANI”
signal. The control signal outputs from the controller (IC821,
pin 7) as “FANV” signal, and then controls cooling fan via
the J824.
3-3 PLL CIRCUITS
3-3-1 GENERAL
The PLL circuits consist of OSC, RXPLL-A and RXPLL-B
units.
The OSC unit oscillates 10 MHz reference frequency for
RXPLL-A, RXPLL-B units and external reference frequency.
The RXPLL-A unit oscillates 6 LO frequencies for the
RX-A unit’s receive 1st and 2nd LO frequencies, MAIN
unit’s transmit 1st, 2nd and 3rd LO frequencies, marker
frequency.
The RXPLL-B unit oscillates 6 LO frequencies for the RX-B
unit’s receive 1st and 2nd LO frequencies, SCOPE unit’s
reference frequency, clock signal of DSP-TX, DSP-A and
DSP-B board.
1st and 2nd LO frequency lists for RX, 3rd IF and LO
frequency lists and 2nd IF and LO frequency list are shown
at page 3-28.
1st IF and 1st LO frequency lists for TX are shown at page
3-29.
3-3-2 OSCILLATOR CIRCUIT (OSC UNIT)
The reference oscillator (IC91, X1) generates a 10 MHz
frequency which field intensity is 0 dBm. The signal is used
for the RXPLL-A and RXPLL-B unit’s system clock, etc.
• IN CASE OF USING AS RXPLL-A AND RXPLL-B UNIT’S
SYSTEM CLOCK
The oscillated signal is amplified at the buffer amplifier
(Q21), and is the applied to the amplifier (Q22). The
amplified signal passes through the oscillated signal
selector (RL11), and is then amplified at the buffer amplifier
(Q70). The amplified signal is applied to the RXPLL-A and
RXPLL-B units via the J72 and J73, respectively.

3 - 8
• USING REFERENCE SIGNAL TO EXTERNAL
The oscillated signal is amplified at the buffer amplifier
(Q21), and is then applied to the amplifier (Q42). The
amplified signal is applied to the input-output switch (RL10)
via the low-pass filter (L43, L44, C46–C51), and is then
output from J71 after being passed through the 6 dB
attenuator (R71–R73).
• USING REFERENCE SIGNAL FROM EXTERNAL
The reference signal from the external equipment is applied
to the J71, and is then applied to the input-output switch
(RL10) via the 6 dB attenuator (R71–R73). The signal is
applied to the amplifier (Q61, Q62), and passes through
the bandpass filter (L61, L62, C66). The filtered signal is
applied to the reference signal switch (RL11), and is then
amplified at the buffer amplifier (Q70). The amplified signal
is applied to the RXPLL-A and RXPLL-B units via the J72
and J73, respectively.
3-3-3 RXPLL-A CIRCUIT (RXPLL-A UNIT)
The 10 MHz oscillated signal from the OSC unit is applied
to the amplifier (Q30) via the J10, and is then amplified at
the quadrupler (Q702) to produce 40 MHz reference signal.
The amplified signal passes through the bandpass filter
(L702, L703, C709–C713), and is then applied to the 1st
LO, maker, 2nd LO and 3rd LO circuits, respectively.
• 1ST LO CIRCUIT
The 40 MHz reference signal is applied to the amplifier
(Q104) via the “40M” line, and is then applied to the DDS
IC (IC101, pin 88) as the system clock signal. The output
signals from pins 7–20 pass through the D/A convertor
(R110–R133). The converted signal passes through the
ceramic filter (FI101) to pass the 10.5 MHz signal, and is
then applied to the amplifier (IC102, pin 2). The amplified
signal is applied to the DDS IC (IC101, pin 47) again, and
is then applied to the phase detector section of the DDS
IC. The signal which outputs from the DDS IC (IC101, pin
56) passes through the loop filter (L151, C152–C155), and
is then applied to the oscillator circuit (Q150). The circuit
oscillates 10.4122038–10.4963312 MHz signal.
The oscillated signal is applied to the amplifier (Q151), and
is then applied to the PLL IC (IC201).
A part of the oscillated signal is fed back to the DDS IC
(IC101, pin 46) via the amplifier (Q152) as the comparison
signal.
The amplified signal from Q151 is applied to the PLL IC’s
1/21 divider section (IC201, pin 8), and is then applied to
the PLL section. The signal outputs from pin 2, and passes
through the loop filter (L211, C221, C222). The filtered
signal is applied to the one of the 6 VCOs as follow.
RXPLL-A 1ST LO VCO TABLE
The oscillated signal is amplified at the buffer amplifier
(Q301), and passes through the high-pass (L331, C331–
C333) and low-pass (D341, L332, C334–C337) filters. The
filtered signal is applied to the amplifier (Q302).
A portion of buffer amplified signal from Q301 is fed back to
the PLL IC’s 1/N (N=130–250) divider section (IC201, pin 6)
via the buffer amplifier (Q303).
The amplified signal from Q302 is applied to another
amplifier (Q351), and is then amplified at the buffer
amplifier (Q352).
The signal passes through the low-pass
(D441, L441, L442, C442–C446) and high-pass (L451, C447,
C451, C452) filters and attenuator (R364–R366), and is then
output from J351/J421 as the RX 1st LO signal (64.485–
124.455 MHz)/TX 1st LO signal (64.485–124.455 MHz) to
the TX/RX-A circuits respectively via the LO switches (D421,
D422).
• MARKER CIRCUIT
The 40 MHz reference signal is applied to the amplifier
(Q104) via the “40M” line, and is then applied to the DDS
IC (IC101, pin 88) as the system clock signal.
The signal passes through the DDS IC’s 1/400 divider
section, and outputs from the IC (pin 49). The signal is
applied to the marker switch (IC602, pin 1), and is then
output from the IC (pin 4) as the 100 kHz marker signal.
• 2ND LO CIRCUIT
The 40 MHz reference signal is applied to the amplifier
(IC503) via the “40M” line, and is then applied to the DDS
IC (IC501, pin 88) as the system clock signal. The signals
which are output from pins 6–20 are applied to the D/A
convertor (R510–R533), and then passes through the low-
pass filter (L530–L532, C531–C536) to suppress more than
4.5 MHz signals. The filtered signal (4.0–4.0306875 MHz)
is applied to the amplifier (IC502, pin 2), and is then
applied to the DDS IC’s phase detector section (IC501, pin
47). The output signal from pin 56 passes through the loop
filter (D542, L541, C543, C543–C547, R548, R554), and is
then applied to the oscillator circuit (Q541) to oscillate the
64 MHz reference signal.
The 64 MHz signal is applied to the buffer amplifier (Q561)
and the hybrid divider and then applied to the TX or RX
2nd LO circuits.
A portion of 64 MHz signal passes through the attenuator
(R571, R572), and is then applied to the amplifier (Q580).
The amplified signal is applied to the DDS IC’s quarter
detector section (IC501, pin 80) as the comparison signal.
(1) TX 2ND LO CIRCUIT
The signal from the hybrid divider passes through the
attenuator (R587–R589), and is then applied the amplifier
(Q591). The signal passes through the bandpass filter (L565,
L566, C573–C575) to suppress unwanted signals, and is
then applied to the TX 2nd mixer circuit (RX-A unit; D505)
via the J561.
VCO No. Parts No. Oscillating frequencies
1 Q220 64.485–72.454999 MHz
2 Q230 72.455–79.454999 MHz
3 Q240 79.455–86.454999 MHz
4 Q250 86.455–94.454999 MHz
5 Q260 94.455–109.454999 MHz
6 Q270 109.455–124.455 MHz