Infineon PSoC 4000S User manual

Application Note Please read the Important Notice and Warnings at the end of this document 001-86233 Rev. *I
www.infineon.com page 1 of 38 2021-11-04
AN86233
PSoC™ 4 MCU low-power modes and power
reduction techniques
About this document
Scope and purpose
AN86233 discusses how to use the PSoC™4 MCU low-power modes and features to operate at very low power
levels while retaining essential functionality. Major topics include the five power modes, PSoC™Creator power
management functions, and other power-saving techniques and considerations. Three PSoC™Creator example
projects are included to demonstrate various aspects of low-power programming.
Note: PSoC™ Creator supports all PSoC™4 devices, but ModusToolbox™software supports PSoC™
4S-series devices only. Supported devices are 4000S, 4100S, 4100S plus, 4100S plus 256KB, 4100S
max, and 4500s.
Intended audience
This application note is for anyone who uses PSoC™ 4 MCU devices.
Table of contents
About this document....................................................................................................................... 1
Table of contents............................................................................................................................ 1
1Introduction .......................................................................................................................... 3
2Power mode summary............................................................................................................ 4
3Low-power mode details......................................................................................................... 6
3.1 Sleep mode..............................................................................................................................................6
3.1.1 Sleep mode wakeup sources.............................................................................................................6
3.1.2 Sleep mode transitions......................................................................................................................7
3.1.3 Sleep mode use cases........................................................................................................................7
3.2 Deep sleep mode.....................................................................................................................................7
3.2.1 Deep sleep mode wakeup sources....................................................................................................7
3.2.2 Deep sleep mode transitions.............................................................................................................7
3.2.3 Peripheral deep sleep configuration.................................................................................................8
3.2.4 Deep sleep mode use cases...............................................................................................................8
3.3 Hibernate mode with PSoC™ Creator.....................................................................................................8
3.3.1 Hibernate mode wakeup sources......................................................................................................8
3.3.2 Hibernate mode transitions...............................................................................................................9
3.3.3 Hibernate mode use cases.................................................................................................................9
3.4 Stop mode with PSoC™ Creator..............................................................................................................9
3.4.1 Stop mode wakeup sources ............................................................................................................10
3.4.2 Stop mode transitions .....................................................................................................................10
3.4.3 Stop mode use cases........................................................................................................................10
4Power mode wakeup summary...............................................................................................11
5Power reduction techniques...................................................................................................12
5.1 Turn OFF peripherals in ModusToolbox™ software.............................................................................12

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Table of contents
5.2 Turn OFF components in PSoC™ Creator.............................................................................................12
5.3 Run components at a lower speed .......................................................................................................13
5.4 Reduce supply voltage..........................................................................................................................13
5.5 Use PSoC™ 4 MCU device to gate current paths...................................................................................14
5.6 Use DMA to move data ..........................................................................................................................15
6Other low-power mode considerations....................................................................................16
6.1 Clocks.....................................................................................................................................................16
6.2 WDT........................................................................................................................................................18
6.3 GPIOs .....................................................................................................................................................18
6.4 TCPWM...................................................................................................................................................18
6.5 SAR ADC .................................................................................................................................................19
6.6 Deep sleep and hibernate regulators...................................................................................................19
6.7 Debug interface .....................................................................................................................................20
6.7.1 PSoC™ Creator..................................................................................................................................20
6.7.2 ModusToolbox™ software................................................................................................................20
7Code examples......................................................................................................................22
7.1 ModusToolbox™ software code examples ...........................................................................................22
7.2 PSoC™ Creator projects.........................................................................................................................22
7.3 PSoC™ 4 MCU code examples ...............................................................................................................24
7.3.1 Power modes code example............................................................................................................24
7.3.2 Project 2: Low power comp .............................................................................................................26
7.3.3 Project 3: Deep sleep ADC................................................................................................................26
7.3.3.1 Average power ............................................................................................................................27
8ModusToolbox™ hardware configuration.................................................................................29
9PSoC™ Creator hardware configuration...................................................................................30
9.1 CY8CKIT-042 kit (PSoC™ 4200)..............................................................................................................30
9.2 CY8CKIT-049-42xx kit (PSoC™ 4200) .....................................................................................................31
9.3 CY8CKIT-043 kit (PSoC™ 4200M) ...........................................................................................................32
10 Measuring current with a DMM................................................................................................33
10.1 Approximating the power consumption ..............................................................................................33
11 Reusing the examples............................................................................................................34
12 Summary .............................................................................................................................35
13 Related application notes ......................................................................................................36
Revision history.............................................................................................................................37

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PSoC™ 4 MCU low-power modes and power reduction techniques
Introduction
1Introduction
PSoC™ 4 MCU low-power modes allow a reduction in overall power consumption while retaining essential
functionality, especially when implemented with other power-saving features and techniques. This application
note describes the device low-power modes, provides information on active mode power-saving methods, and
discusses other low-power considerations.
The document assumes that you are familiar with developing applications using the ModusToolbox™ software
environment or PSoC™ Creator. If you are new to PSoC™ 4 MCU, you can find an introduction in AN79953 –
Getting started with PSoC™ 4 MCU. If you are new to ModusToolbox™ software or PSoC™ Creator, see the
ModusToolbox™ software or PSoC™ Creator home page. See Related application notes for more resources.
Note: References to ‘PSoC’ or ‘device’ henceforth refer to PSoC™ 4 MCU devices, unless specified
otherwise.

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Power mode summary
2Power mode summary
PSoC™ 4 MCU features up to five power modes of operation. In order of power consumption and functionality,
they are: active, sleep, deep sleep, hibernate, and stop. Table 1 lists the typical current and wakeup times for
each power mode. See the product line datasheet for other values and specific conditions.
•Active mode is the normal operating mode in which all peripherals are available, and the CPU is executing
instructions.
•In sleep mode, all peripherals except the CPU are available.
•In deep sleep mode, the CPU, most peripherals, and the MHz clocks are disabled.
•In hibernate mode, no clocks are available, but logical states are retained.
•In stop mode, the CPU, clocks, and all peripherals are halted, and logical states are not retained, but GPIO
states are retained or frozen.
Note: Table 1 also shows that some PSoC™ 4 MCU devices do not support all five power modes.
Table 1 Power mode specs
Power
mode
Current
range
(typical)
(VDD =
3.3 V to
5.0 V )
PSoC™
4000/
4000S/
4100S/
4100S plus/
4100S plus
256k/ 4100S
max
PSoC™
4100
BLE
PSoC™
4200
BLE
PSoC™
4200DS
PSoC™
4500S
PSoC™
4700S
PSoC™
analog
coprocessor
PSoC™
4100PS
PSoC™
4100/
4200
PSoC™
4100M/
4200M
PSoC™
4200L
Active
1.3 mA to
14 mA
–
–
–
–
–
–
–
–
–
–
–
Sleep
1.0 mA to
3 mA
0
0
0
0
0
0
0
0
0
0
0
Deep sleep
1.3 µA to
15 µA
35 µs
25 µs
25 µs
35 µs
35 µs
35 µs
35 µs
35 µs
25 µs
25 µs
25 µs
Hibernate
150 nA to
1 µA
Not
applicable
2 ms
0.7 ms
Not applicable
2 ms
0.7 ms
0.7 ms
Stop
20 nA to
80 nA
Not
applicable
2 ms
2.2 ms
2 ms
2 ms
1.9 ms
The differences among the low-power modes are related to CPU and peripheral availability, wakeup and reset
sources, power mode transition behaviors, and power consumption. Table 2 shows the PSoC™ 4 MCU
resources and their availability in different power modes.

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Power mode summary
Table 2 PSoC™ 4 MCU power modes and resources availability
Subsystem
Active
Sleep
Deep sleep
Hibernate
Stop
CPU
ON
Retention1
Retention
OFF
OFF
SRAM
ON
ON
Retention
Retention
OFF
High-speed peripherals (SPI, UART, etc.)
ON
ON
Retention
OFF
OFF
Universal digital blocks (UDBs)
ON
ON
Retention2
OFF3
OFF
VDAC
ON
ON
Retention2
OFF
OFF
SPI slave and I2C slave (SCB-based)
ON
ON
ON
OFF
OFF
High-speed clock (IMO, ECO, and PLLs)
ON
ON
OFF
OFF
OFF
Low-speed clock (32 kHz) (ILO and WCO)
ON
ON
ON
OFF
OFF
Brown-out detection
ON
ON
ON
ON
OFF
Continuous time block (CTB) (opamp and
comparators)
ON
ON
ON
OFF
OFF
Continuous time block mini (CTBm)
(opamp and comparators)
ADC
ON
ON
OFF
OFF
OFF
Low-power comparators
ON
ON
ON
ON
OFF
GPIO (output state)
ON
ON
ON
ON
Frozen4
1
Retention: The configuration and state of the peripheral are retained. The peripheral resumes its operation when the
device enters active mode.
2
The state of VDAC, as well as any UDB-based function, is preserved by calling a _Sleep() function before entering deep
sleep, and restored by calling a _WakeUP() function after exiting deep sleep mode.
3
When exiting hibernate mode, all UDB-based functions are reinitialized because the PSoC™ 4 MCU device goes through a
reset.
4
Frozen: The configuration, mode, and state of all GPIOs are locked. Changing the GPIO state is not possible until the
device enters active mode and the GPIOs are unlocked.

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Low-power mode details
3Low-power mode details
The ModusToolbox™software environment currently supports PSoC™ 4 MCU devices that have sleep and deep
sleep power modes. PSoC™ Creator supports all PSoC™ 4 MCU devices, with all power modes. ModusToolbox™
software and PSoC™ Creator both have code examples that demonstrate these power modes; see Project 1
Power Modes.
Figure 1 shows the transitions between the power modes in PSoC™ MCU. Table 3 lists the available wakeup
sources for each mode.
Active
Deep sleep
Hibernate
Wakeup
interrupt
Wakeup
interrupt
Internal
resets
Stop WAKEUP
asserts
XRES / brownout /
power-on reset
Firmware
action
Reset
Internal reset event
External reset event
Firmware action
Other external event
Power mode Action
KEY:
Sleep
Figure 1 PSoC™ power mode transitions diagram
Note: Blocks in grey are not available in the PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S plus 256k,
4100S max, 4200DS, 4500S, 4700S, 4100PS, and analog coprocessor product lines.
3.1 Sleep mode
In Sleep mode, the PSoC™ 4 Arm®Cortex®-M0/M0+ CPU does not run instructions; instead, it waits for an
interrupt to occur. The SRAM is retained but not written to or read by the CPU. It can be accessed by DMA in
those parts that support DMA. All other peripherals and clocks continue to run.
3.1.1 Sleep mode wakeup sources
Any interrupt source in the device can wake the device from sleep mode. All peripherals can remain active and
generate interrupts.

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Low-power mode details
3.1.2 Sleep mode transitions
ModusToolbox™ and PSoC™ Creator supply API functions to enter sleep. These functions configure the device
for sleep. No other API calls are necessary.
ModusToolbox™ software:Cy_SysPm_CPU_EnterSleep() –Sets the system into deep sleep power mode and
calls the registered callback functions. This is a CPU-centric power mode. It means that the CPU has indicated
that it is in sleep mode and its main clock can be removed. Returns the current sleep status.
PSoC™ Creator: CySysPmSleep() –Sets the system into deep sleep power mode and calls the registered
callback functions. This is a CPU-centric power mode. It means that the CPU has indicated that it is in sleep
mode and its main clock can be removed. No return value.
Exit from sleep mode occurs when an interrupt is triggered. Upon exiting sleep mode, the device re-enters
active mode. The configuration of sleep wakeup sources requires only that their interrupts be enabled.
3.1.3 Sleep mode use cases
Sleep mode should be used when peripherals such as the ADC, CAPSENSE™, digital communication, or others
must remain active, but CPU activity is not required. This can reduce current consumption between events
such as ADC conversions and digital communication transactions.
3.2 Deep sleep mode
In deep sleep mode, the high-frequency clocks and peripherals that require high-frequency clocks are disabled.
The high-frequency clocks include the internal main oscillator (IMO), external crystal oscillator (ECO), and
phase-locked loops (PLLs). Note that the ECO and PLLs are not available in all PSoC™ 4 MCU devices.
The internal low-speed oscillator (ILO) clock remains active and can be used to clock the watchdog timer
(WDT), which can be used as a sleep timer to wake the system from deep sleep. Some PSoC™ 4 MCU devices
also include a watch crystal oscillator (WCO) that can operate during deep sleep.
The I2C block can continue operating in slave mode to monitor the I2C bus, allowing wakeup upon I2C address
match.
3.2.1 Deep sleep mode wakeup sources
An I2C address match, the WDT, GPIO interrupts, CTB/CTBm comparator interrupts, and low-power comparator
interrupts can wake the device from deep sleep. The WDT block contains multiple counters that can be
configured independently to generate interrupts, resets, or both. This allows the WDT to function as a sleep
timer as well.
3.2.2 Deep sleep mode transitions
ModusToolbox™ software and PSoC™ Creator supply API functions to enter deep sleep. These functions
configure the device for deep sleep. No other API calls are necessary.
ModusToolbox™ software:Cy_SysPm_CpuEnterDeepSleep() –Sets the system into deep sleep power mode.
If firmware attempts to enter this mode before the system is ready, the device will go into sleep mode instead
and automatically enter the originally intended mode when the hold-off expires. Returns the current sleep
status.

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Low-power mode details
PSoC™ Creator: CySysPmDeepSleep() –Sets the system into deep sleep power mode. If firmware attempts
to enter this mode before the system is ready, then the device will go into sleep mode instead and
automatically enter the originally intended mode when the hold-off expires. No return value.
Exit from deep sleep mode occurs when an interrupt is triggered. Upon exiting deep sleep, PSoC™ 4 re-enters
Active mode. The configuration of deep sleep wakeup sources requires only that their interrupts be enabled.
3.2.3 Peripheral deep sleep configuration
When a device goes into deep sleep some peripherals need to be configured so that they can continue to
operate in deep sleep or wake the device from deep sleep.
ModusToolbox™ software:To ensure that a peripheral is configured correctly for deep sleep, ModusToolbox™
has specific API functions _DeepSleepCallback() and _DeepSleep(). These configure the peripheral
for operation in deep sleep and waking up from deep sleep. See the peripheral driver library(PDL) for more
information.
PSoC™ Creator: Components can be configured to operate in deep sleep to save power, save their current
state, or both. In these cases, use the component’s specific API function _Sleep() to store the current
component state before calling CySysPmDeepSleep(); and _WakeUp() after waking up from Deep
Sleep. Depending on your application, it may be faster to simply call the component’s _Stop() function
before entering deep sleep mode and _Start() after waking.
3.2.4 Deep sleep mode use cases
The deep sleep mode should be used when the PSoC™ 4 high-performance analog and digital peripherals are
not needed, but the device still needs to be able to wake up periodically using the WDT, or upon other events
such as an I2C address match.
Regular wakeup intervals enable periodic use of active mode peripherals, such as the ADC, to take readings or
scan CAPSENSE™ button inputs.
3.3 Hibernate mode with PSoC™ Creator
In hibernate mode, all clocks and synchronous peripherals in PSoC™ 4 MCU are disabled. The pins and low-
power comparators may remain active, and the SRAM and UDB register states are retained. Currently
ModusToolbox™ software does not support any PSoC™ 4 MCU device that supports hibernate mode.
Note: The PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S plus 256k, 4100S max, 4200DS, 4500S, 4700S,
4100PS and analog coprocessor product lines do not support hibernate mode.
3.3.1 Hibernate mode wakeup sources
Pin and low-power comparator interrupts can wake the device from hibernate mode. Any wakeup from
hibernate mode causes a device reset, but SRAM and some register states are retained, allowing the wakeup
reset reason to be detected.
Although SRAM is retained, after reset, the C startup code initializes all global and static variables to either an
initial value or zero. To prevent a variable from getting reinitialized after waking from hibernate, use the
CY_NOINIT attribute in the definition of the variable.
To make sure a variable does get initialized, your code should determine if the reset was not caused by a
wakeup from hibernate mode. After the return to active mode from a reset, call the

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Low-power mode details
CySysPmGetResetReason() API function to determine if the reset was a wakeup from hibernate, or from
some other reset condition. The following code shows how to define a non-initialized variable, and initialize it if
the reset was not due to a hibernate wakeup.
/* Define non-initialized global variable */
int32 CY_NOINIT testVarNoInit;
/* Inside of main() */
/* Initialize variable when PSoC™ is not reset from hibernation wakeup */
if( CySysPmGetResetReason() != CY_PM_RESET_REASON_WAKEUP_HIB )
{
testVarNoInit = 0;
}
3.3.2 Hibernate mode transitions
Enter Hibernate mode using the CySysPmHibernate() API function. This function configures the device for
Hibernate mode. No other function calls are necessary because all components including clocks are powered
down and will be reinitialized when exiting hibernate mode with a reset. The only exception is that the low-
power comparator may remain active to cause a wakeup from hibernate mode.
Exit from Hibernate mode occurs when a pin or low-power comparator interrupt is triggered. Upon exiting
Hibernate mode, PSoC™ MCU resets. After the return to active mode from a reset, you can call
CySysPmGetResetReason() to detect the hibernate wakeup reset. The specific pin or comparator
interrupt can then be detected using the component APIs, as those register states are retained.
Although not required, you have the option to lock the state of all I/O cells (GPIOs) by calling
CySysPmfreezeIo() before entering Hibernate mode. The CySysPmUnfreezeIo() function should be
called after a wakeup from hibernate mode before the pins can again change state. Using these functions
prevents unexpected GPIO transitions during and after reset.
3.3.3 Hibernate mode use cases
Hibernate mode should be used when periodic wakeup is not required, and the device must use less than 1 µA
current. It may also be useful for a wakeup on an analog or digital signal transition, while requiring minimal
current.
Note that hibernate mode can be used effectively if your code is organized as a state machine, and the CPU can
start executing the code from the previously known state before wakeup once the device wakes up from
hibernate mode. You must use the CY_NOINIT attribute in the definition of the state variables to make sure
that the state variables are not reinitialized after wakeup from hibernate mode. You can call
CySysPmGetResetReason() to detect the hibernate wakeup reset, as mentioned in the previous section.
3.4 Stop mode with PSoC™ Creator
Stop mode offers the lowest possible current consumption without removing power from the PSoC™ 4 MCU
supply pins. All peripherals are disabled, and the SRAM and register states are not retained. The device pins
may be “frozen” and retain their drive modes and logical states. A dedicated wakeup pin, P0[7], is available to

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Low-power mode details
wake the device from stop mode. Currently, ModusToolbox™ software does not support any PSoC™ 4 MCU
device that supports stop mode.
Note: The PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S plus 256k, 4100S max, 4200DS, 4500S, 4700S,
4100PS and analog coprocessor product lines do not support stop mode.
3.4.1 Stop mode wakeup sources
The dedicated wakeup pin P0[7] is the only wakeup source available in stop mode. You can set its input wakeup
polarity to rising or falling edge by calling the CySysPmSetWakeupPolarity() function.
3.4.2 Stop mode transitions
To enter stop mode, call CySysPmStop(). This function configures the device for Stop mode, including
freezing the I/O states. If you use the dedicated wakeup pin, set its input wakeup polarity before entering stop
mode with the CySysPmSetWakeupPolarity() function.
Exit from stop mode occurs when the dedicated pin wakeup is triggered, the reset signal goes LOW, or if power
is cycled. Upon exiting stop mode, PSoC™ 4 MCU resets. Upon return to active mode after reset, you can call
CySysPmGetResetReason()to determine whether stop mode was exited by toggling the wakeup pin or a
power cycle. After a wakeup pin reset, the GPIO states remain frozen and must be unfrozen using the
CySysPmUnfreezeIo() function before the pin states can be changed. There is no need to call
CySysPmfreezeIo()before entering stop mode because CySysPmStop()freezes I/O cells implicitly.
3.4.3 Stop mode use cases
Use stop mode when the absolute minimum power consumption and functionality are required. It is most
useful in applications where a host controller or a user input such as a button press can trigger the dedicated
wakeup pin, and the power supply topology does not allow disconnecting power from the device.
For more information on the power mode transition APIs, see the system reference guide.

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Power mode wakeup summary
4Power mode wakeup summary
All power modes exit upon two conditions: power cycling or driving the reset input LOW. All states are lost in
either case for all power modes. Table 3 provides a summary of the events and hardware that can be used to
exit the current low-power mode and return to active mode.
Table 3 Low-power modes and wakeup sources
Low-power mode
Wakeup source
Wakeup action
Sleep
Any interrupt source
Interrupt
Any reset source
Device reset
Deep sleep
GPIO interrupt
Interrupt
Low-power comparator
Interrupt
CTB/CTBm comparator
Interrupt
SCB (I2C address match)
Interrupt
WDT5
Interrupt or device reset
XRES (external reset pin)6
Device reset
Hibernate*
GPIO interrupt
Device reset
Low-power comparator
Device reset
XRES (external reset pin)6
Device reset
Stop*
WAKEUP pin (P0[7])
Device reset
XRES (external reset pin)6
Device reset
* ModusToolbox™ software environment does not support hibernate or stop modes.
5
The WDT can be configured to generate both interrupts and resets at different intervals. See the technical reference
manual (TRM) for the applicable PSoC™ 4 MCU device family.
6
XRES triggers a full system reset. All states including frozen I/Os are lost. In this case, the cause of wakeup is not
detectable after the device restarts.

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Power reduction techniques
5Power reduction techniques
In many applications, you can gain additional power reductions by properly managing PSoC™ 4 MCU blocks as
well as powering down external components. This section presents some techniques for doing so.
5.1 Turn OFF peripherals in ModusToolbox™ software
You can save unnecessary current consumption by disabling unused blocks. The power saved depends on the
block disabled.
Any block that can be disabled in active or sleep mode is supported by__Enable() and _Disable()
functions. The _Disable() function immediately halts all operations of the peripheral. The peripheral may
be actively performing a task, so check its status before disabling it. The following code snippet uses the
timer/counter from the TCPWM block as an example.
/* <Check task status here.> */
/* Disable the peripheral. */
Cy_TCPWM_Counter_Disable(TCPWM, MY_TCPWM_CNT_NUM);
Restart the peripheral by calling the _Enable() function. It is recommended that the peripheral be re-
initialized before enabling.
/* Initialize the peripheral */
Cy_TCPWM_Counter_Init(TCPWM, MY_TCPWM_CNT_NUM, &config);
/* Enable the peripheral. */
Cy_TCPWM_Counter_Enable(TCPWM, MY_TCPWM_CNT_NUM);
Some peripherals such as the TCPWM may need to be trigger started. This is a software trigger that ensures that
all TCPWM counters are started at the same time. Call this function when the when one or more TCPWM
counters need to be started.
/* Trigger start the peripheral. */
Cy_TCPWM_TriggerStart(TCPWM, MY_TCPWM_CNT_MASK);
Note: Not all peripherals need to be trigger started, check the peripheral driver library(PDL) for more
information.
5.2 Turn OFF components in PSoC™ Creator
The easiest way to reduce power in active mode is to turn OFF unused PSoC™ Creator components.
Any component that can be disabled in active or Sleep mode includes a _Stop()function in its API. This
function immediately halts all operation of the component and sets it to its lowest power state. The component
may be actively performing a task, so check its status before stopping it.

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Power reduction techniques
/* <Check task status here.> */
/* Stop the Component. */
MyComponent_Stop();
Restart a component by calling its start function:
/* Start the Component. */
MyComponent_Start();
Any component that must preserve its configuration data before powering down includes a _Sleep()
function in its API. The _Sleep() function saves all necessary component settings and then calls the
_Stop() function. In some cases, the _Sleep() function does nothing but call _Stop().
/* < Check task status here.> */
/* Sleep the Component. */
MyComponent_Sleep();
When a component is put to sleep, it should be awakened by calling its _Wakeup() function. This restores the
component to its pre-sleep state. The _Start() function also brings the component back into operation, but
it is reinitialized to its default state.
/* Wake the Component. */
MyComponent_Wakeup();
_Sleep() and _Stop() both result in the same amount of power savings. The difference lies in whether the
component needs to resume from exactly where it left off.
5.3 Run components at a lower speed
Clocked integrated circuits consume more current as their clock rates increase. This is because parasitic and
designed capacitances are charged and discharged more rapidly, requiring more current. Reducing the
operating frequency of PSoC™ MCU components can greatly reduce the current consumption. This technique
can be applied to the CM0/CM0+ CPU, SAR ADC, digital components, and others.
5.4 Reduce supply voltage
Reducing the supply voltage is probably the easiest thing you can do to reduce the overall power consumption.
Even if the current stays the same, reducing the supply voltage from 5 V to 3 V reduces power consumption by
40 percent! Although the PSoC™ MCU device can operate below 1.8 V, you still need to consider the voltage
requirements of other devices in the system.

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Power reduction techniques
5.5 Use PSoC™ 4 MCU device to gate current paths
Your PCB may contain other components that draw power; the PSoC™ 4 MCU device can be used to control the
current consumed by them. Note that the maximum pin source and sink capabilities listed in the datasheet
must not be exceeded. The following example is shown using a PSoC™ Creator component, the same theory
applies to ModusToolbox™ software.
A good example of this scenario is a thermistor application, as Figure 2 shows. In this case, the PSoC™ 4 MCU
device measures the temperature using the voltage on an analog pin, which changes as the thermistor
resistance changes.
Figure 2 Typical thermistor application
The ADC can be turned OFF when not in use, but external components still consume power because the current
path through the resistor and thermistor remains. A simple solution with PSoC™ 4 MCU is to use a second pin as
a switch to ground, as Figure 3 shows.
Figure 3 Using a GPIO as a ground switch
In this configuration, the current flow can be stopped by writing a ‘1’ to Pin_3, allowing the pin to float. This
removes the current consumption by reducing the voltage differential across the two resistors to 0 V. Writing a
‘0’ resumes the current flow. The resource use of this power-saving feature is only one pin and a few lines of
code.
Alternatively, when the measurement is not required, Pin_3 drive mode can be changed to High-Z analog so
that there is no path for the current to flow. For the measurement, Pin_3 drive mode should be set to strong
and logic 0 should be written at the pin.

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5.6 Use DMA to move data
You can save power any time you offload a task from the CPU and either halt the CPU or let it do something else
in parallel. The DMA engine can be used in both active and sleep modes to transfer data with no CPU use. The
power saved is either the difference between CPU active and CPU stop power modes if the CPU can be halted,
or lower CPU active current if the CPU can be clocked at a slower frequency and still get the same work done.
The following devices support DMA: 4000DS, 4100 BLE, 4100M, 4100PS, 4100S plus, 4100S max, 4200 BLE,
4200DS, 4200L, 4200M, 4100S pus 256k, 4500S, and analog coprocessor.

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Other low-power mode considerations
6Other low-power mode considerations
This section presents tips, tricks, and recommendations related to the use of PSoC™ low-power modes.
6.1 Clocks
In some cases, running the clocks faster can result in a lower average current consumption. For example,
consider a PSoC™ MCU design that takes a reading from a sensor once every second, performs several
calculations, and then transmits the results to another device.
You can use sleep or deep sleep mode to reduce the power when the PSoC™ MCU device is idle, but the average
current consumption is higher because of the time spent in active mode. Figure 4 is a representation of the
current consumption of this example with the system clocks set at 3 MHz.
Average
current
Current
Time Active
Sleep
Figure 4 Example current profile with 3-MHz clock
Depending on the tasks or calculations that are being performed when the PSoC™ 4 MCU device is awake, it
may be possible to complete them sooner by running the system clocks faster. This can reduce the average
current consumption because the PSoC™ 4 MCU device is in active mode for less time. Figure 5 is a
representation of active mode timing, broken up into tasks.
A B C D E
A – Wake from sleep
B – Read sensor data
C – Manipulate data
D – Transmit result
E – Go back to sleep
Current
Time
Figure 5 Analysis of tasks in active mode at 3 MHz

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The time required for some tasks does not change even if the system clock frequency increases. Sensor reading
and data transmitting fall into this category. Other tasks, however, require less time if the CPU operates at a
faster frequency.
At some point, the benefit of a shorter active time is overcome by the energy required to drive the clocks at a
higher rate. Assume that the optimal speed is 12 MHz, as Figure 6 shows. With a 12-MHz clock, the time spent in
active mode is about half as long as with a 3-MHz clock. Figure 7 shows that the peak current consumption is
greater when the clocks are faster, but the overall average is lower.
A B C D E
A – Wake from sleep
B – Read sensor data
C – Manipulate data
D – Transmit result
E – Go back to sleep
Current
Time
Figure 6 Analysis of tasks in active mode at 12 MHz
Average
current
Current
Time Active
Sleep
Figure 7 Example current profile with a 12-MHz clock
You may also be able to reduce the peak active current by applying other suggestions in this application note.
Project 3 deep sleep ADC is an example project that wakes once a second, takes a temperature reading with
the ADC, transmits the data via a UART, and then goes back to deep sleep.

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6.2 WDT
The WDT can operate in active, sleep, and deep sleep modes. The counters in the WDT can generate interrupts
or resets, depending on the configuration and operating conditions. This allows the WDT to replace a
traditional sleep timer in addition to guaranteeing reliable operation.
Increasing the WDT interval or disabling it entirely before entering low-power modes can reduce the time spent
in active mode and the overall power consumption. The WDT is not active in hibernate or stop modes.
More information on the operation of the WDT and the associated API is available in the PSoC™ TRM,
peripheral driver library (PDL), and the PSoC™ Creator system reference guide.
6.3 GPIOs
GPIOs can continue to drive the external circuitry when the PSoC™ device is in a low-power mode. This is
helpful when you need to hold external logic at a fixed level, but it can lead to wasted power if the pins
needlessly source or sink current. The specific power savings of this technique depend on the circuit attached
to the specific GPIO pin.
You should analyze your design and determine the best state for your GPIOs during low-power operation. If
holding a digital output pin at logic 1 or 0 is best, then use the GPIO or Pin _Write() function to set it.
ModusToolbox™ software:
/* Set MyPin to ‘0’ for low power. */
Cy_GPIO_Write(MYPIN_0_PORT, MYPIN_0_NUM, 0u);
Configure all unused GPIOs to analog High-Z unless there is a specific reason to use a different drive mode. A
port-wide drive mode may be set using the _SetDriveMode() function.
/* Set MyPin to Alg HI-Z for low power. */
Cy_GPIO_SetDriveMode(MYPIN_0_PORT, MYPIN_0_NUM, CY_GPIO_DM_HIGHZ);
PSoC™ Creator:
/* Set MyPin to ‘0’ for low power. */
MyPin_Write(0);
Configure all unused GPIOs to analog High-Z unless there is a specific reason to use a different drive mode. A
port-wide drive mode may be set using the _SetDriveMode() function.
/* Set MyPin to Alg HI-Z for low power. */
MyPin_SetDriveMode(MyPin_DM_ALG_HIZ);
PSoC™ 4 MCU’s flexibility makes it easy to manage GPIO drive modes to prevent unwanted current leakage. See
AN86439 –PSoC™ 4 –Using GPIO pins for more information on the GPIO pin configurations.
6.4 TCPWM
When using a counter, timer or PWM, you should configure the clock sourcing the channel as to have as low a
frequency as possible while still meeting your frequency and accuracy requirements. For example, if you need
to generate a 1-second interrupt with a timer, it is better to use a clock frequency of 1 kHz with the period
equaling 1,000 counts than a clock frequency of 1 MHz with a period equal to 1,000,000 counts. The power

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savings from reducing the TCPWM clock is mostly linear based on clock frequency. Figure 8 shows a
comparison between the clock settings for the TCPWM block.
HFCLK
24 MHz
Clk_Peri
16 MHz
CLK/2
Clk_TCPWM
1 MHz
Period =
1000000
CLK/16 1 Hz
HFCLK
24 MHz
Clk_Peri
16 MHz
CLK/2
Clk_TCPWM
125 KHz
Period =
125000
CLK/128 1 Hz
High-power
scheme
Low-power
scheme
Figure 8 TCPWM clock settings comparison
The TCPWM block has a clock prescaler feature. For minimum power consumption, maximize the peripheral
clock divider Clk_Peri before using the TCPWM clock prescaler.
6.5 SAR ADC
If the full-rated accuracy of ADC results is not required, use a lower resolution and do not use averaging, which
reduces the number of ADC clocks required for the same sample rate.
If the maximum sample rate is not required, consider using the single-shot mode instead of continuous mode.
This avoids the SAR ADC operating all the time. In single shot mode, the ADC samples only when triggered by
software or hardware.
6.6 Deep sleep and hibernate regulators
PSoC™ 4 MCU has two low-power regulators that are used to maintain logic states in deep sleep and hibernate:
•The deep sleep regulator supplies the circuits that remain powered in deep sleep mode, such as the ILO and
SCB. The deep sleep regulator is available in all power modes except the hibernate mode. In active and
sleep power modes, the main output of this regulator is connected to the output of the active digital
regulator (VCCD). This regulator also has a separate replica output that provides a stable voltage for the ILO.
This output is not connected to VCCD in active and sleep modes.
•The hibernate regulator supplies the circuits that remain powered in hibernate mode, such as the sleep
controller, low-power comparator, and SRAM. The hibernate regulator is available in all power modes. In
active and sleep modes, the output of this regulator is connected to the output of the digital regulator. In
deep sleep mode, the output of this regulator is connected to the output of the deep sleep regulator.
Neither of these regulators powers the VCCD supply. Each regulator powers an internal power supply domain and
is not brought out on a pin of the device.

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Note: The hibernate regulator is not available in PSoC™ 4000, 4000S, 4100S, 4100S plus, 4100S Plus 256k,
4100S max, 4200DS, 4500S, 4700S, 4100PS, and analog coprocessor product lines. These devices
do not support hibernate mode.
6.7 Debug interface
PSoC™ 4 MCU supports on-chip debugging. You may observe a higher current consumption than expected
while in debug mode. This is normal because the programming and debug interface remains active in all low-
power modes.
Power measurements may also be skewed if the debug pins are set to SWD mode and a MiniProg3
programmer/ debugger is attached, even if the PSoC™ 4 MCU device is not in debug mode.
6.7.1 PSoC™ Creator
Debug interface pins are set to GPIO mode on all chips from the factory, but a new PSoC™ Creator project sets
them to SWD mode by default. The registers that control the debug interface can be changed only at
programming time. Use the System tab in the .cydwr file of the PSoC™ Creator project to set the pins to GPIO
mode, as Figure 9 shows.
Figure 9 Disable debug interface to reduce power
6.7.2 ModusToolbox™ software
Debug interface pins are set to GPIO mode on all chips from the factory, but a new ModusToolbox™ project sets
them to SWD mode by default.
Do the following to change the debug interface pins to GPIO mode:
1. Go to Quick panel > Tools > Device configurator.
2. In the device configurator, go to Pins and look for the pins labeled “CYBSP_SWDIO”and “CYBSP_SWDCK”,
as Figure 10 shows.
3. Deselect these pins to set the device in GPIO mode.