Intersil ISL75052SEHEVAL1Z User manual

USER’S MANUAL
AN1850
Rev.1.01
Oct 24, 2022
ISL75052SEHEVAL1Z
High Performance 1.5A LDO Evaluation Board User Guide
AN1850 Rev.1.01 Page 1 of 15
Oct 24, 2022 © 2013-2022 Renesas Electronics
The ISL75052SEH is a high-performance, adjustable,
low-voltage, high-current, low-dropout linear regulator
specified at 1.5A rated output current for input voltages from
4.0V to 13.2V. The LDO outputs can be adjusted from 0.6V to
12.7V by means of two preset resistors. Salient features of the
part include:
• TID, ELDRS, and SEE rated
• Very fast load transient response
• ±2.0% guaranteed VOUT accuracy over line, load and
temperature
• Typical dropout of 225mV at 1.5A
•ENfeature
•PGfeature
• OCP feature
• Short-circuit and over-temperature protection
The ISL75052SEHEVAL1Z evaluation board provides a simple
platform to evaluate performance of the ISL75052SEH. The
device output voltage is adjustable, and jumpers are provided
to easily set popular output voltages.
Features
• Five preprogrammed output voltages
• Potentiometer to adjust the output voltage
• LED to monitor proper operation
• Test points to easily measure the control loop
Specifications
This board has been configured and optimized for the following
operating conditions:
•V
IN = 4V to 13.2V
•I
L= 1.5A
Ordering Information
PART NUMBER DESCRIPTION
ISL75052SEHEVAL1Z ISL75052SEH evaluation board
FIGURE 1. BLOCK DIAGRAM
ISL75052SEH
CIN
RTOP
RBOTTOM
VIN VOUT
EN
OCP
PG
COUT
ADJ
GND

AN1850 Rev.1.01 Page 2 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
What’s Inside
Items shipped with board:
• ISL75052SEHEVAL1Z evaluation board
• ISL75052SEH datasheet
• AN1850 application note
Test Steps
1. Select the desired output voltage by shorting one of the
jumpers from J1 through J5. The option of JP6 provides for
continuous adjustment of VOUT using potentiometer R6.
2. Set the OCP limit by using jumpers JP8 and JP9.
JP9 = 0.275A min, and JP8 = 2.75A min.
3. Close JP7. Also closing jumper JP11 (2 and 3) selects
R16 = 5.49k as pull-up for PGOOD. Close JP12 (1 and 2).
4. Connect the input supply to VIN/GND and the load to
VOUT/GND. Select the VIN to VOUT ratio to keep dissipation
within the thermal limits of the device.
5. Use JP10 to enable/disable the IC; Open = Enable, and
Close = Disable. (Note: For REVB boards, Close = Enable and
Open = Disable.)
Optimizing LDO Performance
Performance of the ISL75052SEH can be optimized by following
the guidelines provided in this application note.
Input and Output Capacitor Selection
RH operation requires the use of a combination of tantalum and
ceramic capacitors to achieve a good volume-to-capacitance
ratio. The recommended combination is a 2x100µF, 60mΩ, 25V
KEMET T541 series tantalum capacitor in parallel with a 0.1µF
MIL-PRF-49470 CDR04 ceramic capacitor. This is to be
connected between VIN to GND pins and VOUT to GND pins of the
LDO, with PCB traces no longer than 0.5cm. The stability of the
device depends on the capacitance and ESR of the output
capacitor. The usable ESR range for the device is 6mΩto
100mΩ. At the lower limit of ESR = 6mΩ, the phase margin is
about 51°C. On the high side, an ESR of 100mΩis found to limit
the gain margin at around 10dB. The typical GM/PM seen on the
ISL75052SEHEVAL1Z evaluation board for VIN = 3.3V,
VOUT = 1.8V, and IOUT = 3A, with a 220µF, 10V, 25mΩcapacitor,
is GM = 16.3dB, and PM = 69.16°C.
Output Voltage Adjustment
The output voltage can be adjusted by means of the resistor
divider shown in Figure 1 as RTOP and RBOTTOM.
The resistor values for typical output voltages are given in
Table 1. The values listed provide for an evaluation board output
voltage that is about 50mV higher than the desired set point to
allow for the drop on the line connecting the evaluation board to
the desired load.
The resistor divider values can be calculated using the equation:
VOUT = (0.6X(1+RTOP/RBOTTOM)
Assuming a value RTOP = 15.8k and knowing the required output
voltage setting one can calculate the RBOTTOM.
Output Voltage Soft-Start Adjustment
The output voltage soft-start can be adjusted by means of the
capacitor value on the BYP pin, examples are shown in Figure 28
and Figure 29. The BYP cap being 0.2µF and 1.9µF, respectively.
Output Voltage Start-Up Delay Adjustment
The output voltage start can be adjusted by means of the capacitor
value on the VCCX pin examples shown in Figure 28 and Figure 30.
The VCCX cap being 0.1µF and 33µF, respectively.
Layout Guidelines
Good PCB layout is important to achieving expected
performance. When placing components and routing traces,
minimize ground impedance and keep parasitic inductance low.
Give the input and output capacitors a good ground connection,
and place them as close to the IC as possible. Route the traces
connecting the ADJ pin away from noisy planes and traces, and
keep the board capacitance of the ADJ net to GND as low as
possible.
Thermal Guidelines
If the die temperature exceeds +175°C typical, then the LDO
output shuts down to zero until the die temperature cools to
+155°C typical. The level of power combined with the thermal
impedance of the package (JC of 4°C/W for the 18 Ld CDFP
package) determines whether the junction temperature exceeds
the thermal shutdown temperature specified in the “Electrical
Specifications” table of the ISL75052SEH datasheet. Mount the
device on a high effective thermal conductivity PCB with thermal
vias, per JESD51-7 and JESD51-5. Place a silpad between the
package base and the PCB copper plane. Select the VIN and VOUT
ratios to ensure that dissipation for the selected VIN range keeps
TJwithin the recommended operating level of 150°C for normal
operation.
TABLE 1. RECOMMENDED OUTPUT CAPACITOR VALUES
VOUT
(V)
RTOP
(kΩ)
RBOTTOM
(kΩ)
COUT
(µF)
10.0 15.8 1.0 200
9.0 15.8 1.13 200
5.0 15.8 2.15 200
4.0 15.8 2.74 200
2.5
(Note 1)
15.8 4.87 47
2.5 15.8 4.87 200
NOTE:
1. Either option could be used depending on cost/performance
requirements.

AN1850 Rev.1.01 Page 3 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 2. ISL75052SEHEVAL1Z EVALUATION BOARD

AN1850 Rev.1.01 Page 4 of 15 Oct 24, 2022
ISL75052SEHEVAL1Z
Schematic
FIGURE 3. ISL75052SEHEVAL1Z SCHEMATIC
DRAWN BY: DATE: ENGINEER: DATE:
TIM KLEMANN
ADJ.
VOUT
GND
GND
5.0V 2.5V 9.0V 4.0V
GND
10.0V
VOUT OPTIONS
OCP_MAX
OCP_MIN
BYP
COMP
ENABLE
OCP
PGOOD
VADJ
VCC5
VCC5
VIN
VOUT
VOUTP
E
E
E
E
E
E
EE
E
E
E
E
E
E
OUT
IN
JP3
JP12
1 2 3
100000PF
C3
1000PF
C10
TP5
680
R18
VIN COMP
GND
ADJ
BYP
EN
GND
PG
VCC5
VOUT
NC
OCP
NC
PAD METAL
VIN
VIN
VOUT
ISL75052SEHVFE
U1
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
17
10K R12
100000PF
C8
J4
2.15K
R3
TP10
TP14
JP1
TP6
22.1K
R13
J3
5.49K
R16
300
R11
JP6
100UF
C5
NC
A
C
MMBZ5231B
D1
1 2
3
4.87K
R1
R15
549
0.1UF
C7
C11
DNP
TP2
R8
DNP
TP3
JP8
10K
R6
1
2
3
C1
100UF
R9
100
0
R14
C5A
DNP
JP5
TP1
100000PF
C13
JP7
TP9
C1A
DNP
1K R5
J2
JP4
680 R17
3K
R10
1K
R19
SP1
JP2
TP8
TP7
TP13
J1
R4
1.13K
Q1
2N7002-7-F
1
2 3
JP9
JP10
C4A
DNP
R2
2.74K
TP15
100000PF
C6
100UF
C4
R7
15.8K
RED GRN
LED1
12 34
C2
100UF
TP11
JP11
1 2 3
DNP
C2A
TP4
TP12
OPEN
C12
C9
100000PF

AN1850 Rev.1.01 Page 5 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
Bill of Materials
QTY
REFERENCE
DESIGNATOR DESCRIPTION MFR MANUFACTURER PART MFR
1SEELABEL-RENAME
BOARD
PWB-PCB, ISL75052SEHEV1Z,
REVB, ROHS
TBD ISL75052SEHEV1ZREVBPCB
1 C10 CAP-MILPRF-55681, SMD,
1808, 0.001µF, 100V, 10%,
ROHS
AVX CDR03BP102BKMR
5 C3, C6, C8, C9, C13 CAP-MILQUAL, SMD, 1812,
0.1µF, 50V, 10%, BX, ROHS
AVX CDR04BX104AKMR
1 C7 CAP, SMD, 0603, 0.1µF, 16V,
10%, X7R, ROHS
MURATA GRM39X7R104K016AD PANASONIC
4 C1, C2, C4, C5 CAP-TANT, LOW ESR, SMD, E,
100µF, 25V, 10%, 100mΩ,
ROHS
KEMET T495E107K025ATE100
4 J1-J4 CONN-JACK, BANANA-SS-
SDRLESS, VERTICAL, ROHS
JOHNSON
COMPONENTS
108-0740-001
1 SP1 CONN-SCOPE PROBE TEST PT,
COMPACT, PCB MNT, ROHS
TEKTRONIX 131-4353-00
6 TP1-TP6 CONN-TURRET, TERMINAL
POST, TH, ROHS
KEYSTONE 1514-2
9 TP7-TP15 CONN-MINI TEST POINT,
VERTICAL, WHITE, ROHS
KEYSTONE 5002
2 JP11, JP12 CONN-HEADER, 1x3,
BREAKAWY 1x36, 2.54mm,
ROHS
BERG/FCI 68000-236HLF
10 JP1-JP10 CONN-HEADER, 1x2,
RETENTIVE, 2.54mm,
0.230x0.120, ROHS
BERG/FCI 69190-202HLF
1 D1 DIODE-ZENER, SMD, SOT-23,
3P, 5.1V, 350mW, ROHS
DIODES INC. MMBZ5231B-7-F
1 LED1 LED, SMD, 3x2.5mm, 4P,
RED/GREEN, 12/20MCD, 2V
LUMEX SSL-LXA3025IGC-TR
1 Q1 TRANSISTOR, N-CHANNEL,
3LD, SOT-23, 60V, 115mA,
ROHS
DIODES, INC. 2N7002-7-F ON
SEMICONDUCTOR
1 R6 POT-TRIM, TH, 3P, 10k, 1/2W,
10%, 3/8SQ, 25TURN, TOPADJ,
ROHS
BOURNS 3299W-1-103LF
0 R8 RESISTOR, SMD, 0805, DNP,
DNP, DNP, TF
1 R14 RES, SMD, 0603, 0Ω, 1/10W,
TF, ROHS
VENKEL CR0603-10W-000T ROHM
1 R9 RES, SMD, 0603, 100Ω,
1/10W, 1%, TF, ROHS
VENKEL CR0603-10W-1000FT ROHM
1 R5 RES, SMD, 0603, 1k, 1/10W,
1%, TF, ROHS
PANASONIC ERJ-3EKF1001V VENKEL
1 R12 RES, SMD, 0603, 10k, 1/10W,
1%, TF, ROHS
KOA RK73H1JT1002F VENKEL
1 R4 RES, SMD, 0603, 1.13k,
1/10W, 1%, TF, ROHS
YAGEO RC0603FR-071K13L ROHM

AN1850 Rev.1.01 Page 6 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
1 R7 RES, SMD, 0603, 15.8k,
1/10W, 1%, TF, ROHS
VENKEL CR0603-10W-1582FT PANASONIC
1 R3 RES, SMD, 0603, 2.15k,
1/10W, 1%, TF, ROHS
YAGEO RC0603FR-072K15L VENKEL
1 R13 RES, SMD, 0603, 22.1k,
1/10W, 1%, TF, ROHS
PANASONIC ERJ-3EKF2212V VENKEL
1 R2 RES, SMD, 0603, 2.74k,
1/10W, 1%, TF, ROHS
VENKEL CR0603-10W-2741FT YAGEO
1 R11 RES, SMD, 0603, 300Ω,
1/10W, 1%, TF, ROHS
ROHM MCR03EZPFX3000 VISHAY/DALE
1 R10 RES, SMD, 0603, 3k, 1/10W,
1%, TF, ROHS
YAGEO RC0603FR-073KL VENKEL
1 R1 RES, SMD, 0603, 4.87k,
1/10W, 1%, TF, ROHS
PANASONIC ERJ-3EKF4871V VISHAY/DALE
1 R15 RES, SMD, 0603, 549Ω,
1/10W, 1%, TF, ROHS
VENKEL CR0603-10W-5490FT PANASONIC
1 R16 RES, SMD, 0603, 5.49k,
1/10W, 1%, TF, ROHS
VENKEL CR0603-10W-5491FT YAGEO
2 R17, R18 RES, SMD, 0603, 680Ω,
1/10W, 1%, TF, ROHS
ROHM MCR03EZPFX6800 VENKEL
1 R19 RES, SMD, 2010, 1k, 1/2W,
1%, TF, ROHS
PANASONIC ERJ-12SF1001U VISHAY/DALE
4 Four corners SCREW, 4-40X1/4in, PAN, SS,
PHILLIPS
4 Four corners STANDOFF, 4-40X3/4in, F/F,
HEX, ALUMINUM, ROHS
KEYSTONE 2204 (.250 OD)
1 Place assy in bag BAG, STATIC, 8X8, ZIP LOC,
ROHS
ULINE S-5092
0U1
(ISL75052SEHQF)
DO NOT POPULATE OR
PURCHASE
1LABEL-DATECODE_BOM
REV#_SERIAL# LABEL ON ZIL &
QUEL
INTERSIL LABEL-DATE CODE
1RENAMEPCBTO:
ISL75052SEHEVAL1Z
LABEL, TO RENAME BOARD INTERSIL LABEL-RENAME BOARD
Bill of Materials (Continued)
QTY
REFERENCE
DESIGNATOR DESCRIPTION MFR MANUFACTURER PART MFR

AN1850 Rev.1.01 Page 7 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
Layout
FIGURE 4. SILK SCREEN TOP
FIGURE 5. TOP LAYER COMPONENT SIDE

AN1850 Rev.1.01 Page 8 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 6. LAYER 2
FIGURE 7. LAYER 3
Layout (Continued)

AN1850 Rev.1.01 Page 9 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 8. BOTTOM LAYER SOLDER SIDE
FIGURE 9. SILK SCREEN BOTTOM
Layout (Continued)

AN1850 Rev.1.01 Page 10 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 10. SILK SCREEN BOTTOM MIRROR
Layout (Continued)

AN1850 Rev.1.01 Page 11 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 2.5V, CIN = COUT = 200µF, TJ= +25°C,
ILOAD =0A.
FIGURE 11. START-UP WAVEFORMS: VIN = 4.0V, VOUT = 2.5V,
IOUT = 0.1A, EN LOW TO HIGH
FIGURE 12. START-UP WAVEFORMS: VIN = 4.0V, VOUT = 2.5V,
IOUT =1.5A,ENLOWTOHIGH
FIGURE 13. SHUTDOWN WAVEFORM: VIN = 4.0V, VOUT = 2.5V,
IOUT = 0.1A EN HIGH TO LOW
FIGURE 14. SHUTDOWN WAVEFORM: VIN = 4.0V, VOUT = 2.5V,
IOUT =1.5A,ENHIGHTOLOW
FIGURE 15. LOAD TRANSIENT, VIN = 13.2.0V, VOUT = 10.0V,
IOUT = 0A TO 1.6A, COUT = 200µF 30mΩ
FIGURE 16. LOAD TRANSIENT, VIN = 13.2V, VOUT = 4.0V,
IOUT = 0.15A TO 1.6A, COUT = 200µF 30mΩ
1ms/DIV
EN
VIN
VOUT
PGOOD
1ms/DIV
EN
VIN
VOUT
PGOOD
5ms/DIV
EN
VIN
VOUT
PGOOD
1ms/DIV
EN
VIN
VOUT
PGOOD
500µs/DIV
IOUT
VOUT
500µs/DIV
IOUT
VOUT

AN1850 Rev.1.01 Page 12 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 17. DROPOUT vs IOUT AT VOUT = 3.6V FIGURE 18. DROPOUT vs IOUT AT VOUT = 12.7V
FIGURE 19. LOAD REGULATION VOUT vs IOUT FIGURE 20. LOAD REGULATION VADJ vs IOUT
FIGURE 21. LOAD REGULATION VOUT vs IOUT FIGURE 22. LOAD REGULATION VADJ vs IOUT
Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 2.5V, CIN = COUT = 200µF, TJ= +25°C,
ILOAD =0A. (Continued)
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
DROPOUT V AT +25°C
DROPOUT V AT +125°C
DROPOUT V AT +150°C
DROPOUT VOLTAGE (V)
IOUT (A)
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
DROPOUT V AT +25°C
DROPOUT V AT +125°C
DROPOUT V AT +150°C
DROPOUT VOLTAGE (V)
IOUT (A)
2.52
2.53
2.54
2.55
2.56
2.57
2.58
2.59
2.60
2.61
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
VIN = 4.0V, VOUT +25°C
VIN = 4.5V, VOUT +25°C
VIN = 5.0V, VOUT +25°C
VIN = 5.5V, VOUT +25°C
2.57V +1.5%
2.57V -1.5%
2.52
2.53
2.54
2.55
2.56
2.57
2.58
2.59
2.60
2.61
0 0.20.40.60.81.01.21.41.6
VOUT (V)
IOUT (A)
VIN = 10.5V, VOUT +125°C
VIN = 12.0V, VOUT +125°C
VIN = 13.2V, VOUT +125°C
VIN = 14.7V, VOUT +125°C
2.57V +1.5%
2.57V -1.5%
VIN = 10.5V, VOUT -55°C
VIN = 12.0V, VOUT -55°C
VIN = 13.2V, VOUT -55°C
VIN = 14.7V, VOUT -55°C
2.57V +1.5%
2.57V -1.5%
VOUT (V)
IOUT (A)
2.52
2.53
2.54
2.55
2.56
2.57
2.58
2.59
2.60
2.61
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
10.00
10.05
10.10
10.15
10.20
10.25
10.30
10.35
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
10.17V +1.5%
10.17V -1.5%
VIN = 10.8V, VOUT +25°C
VIN = 12.0V, VOUT +25°C
VIN = 13.2V, VOUT +25°C
VIN = 14.7V, VOUT +25°C

AN1850 Rev.1.01 Page 13 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 23. LOAD REGULATION VOUT vs IOUT FIGURE 24. LOAD REGULATION VADJ vs IOUT
FIGURE 25. LOAD REGULATION VOUT vs IOUT FIGURE 26. LOAD REGULATION VOUT vs IOUT
FIGURE 27. LOAD REGULATION VOUT vs IOUT
Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 2.5V, CIN = COUT = 200µF, TJ= +25°C,
ILOAD =0A. (Continued)
10.00
10.05
10.10
10.15
10.20
10.25
10.30
10.35
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
IOUT (A)
VOUT (V)
VIN = 10.8V, VOUT +125°C
VIN = 12.0V, VOUT +125°C
VIN = 13.2V, VOUT +125°C
VIN = 14.7V, VOUT +125°C
10.17V +1.5%
10.17V -1.5%
10.00
10.05
10.10
10.15
10.20
10.25
10.30
10.35
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
VIN = 10.8V, VOUT -55°C VIN = 12.0V, VOUT -55°C
VIN = 13.2V, VOUT -55°C
VIN = 14.7V, VOUT -55°C
10.17V +1.5%
10.17V -1.5%
12.50
12.55
12.60
12.65
12.70
12.75
12.80
12.85
12.90
12.95
13.00
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
12.75V +1.5%
12.75V -1.5%
VIN = 13.2V, VOUT +25°C
VIN = 14.7, VOUT +25°C
VIN = 16.2V, VOUT +25°C
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
12.50
12.55
12.60
12.65
12.70
12.75
12.80
12.85
12.90
12.95
13.00
12.75V +1.5%
12.75V -1.5%
VIN = 13.2V, VOUT +125°C
VIN = 14.7, VOUT +125°C VIN = 16.2V, VOUT +125°C
12.50
12.55
12.60
12.65
12.70
12.75
12.80
12.85
12.90
12.95
13.00
00.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
VOUT (V)
IOUT (A)
12.75V +1.5%
12.75V -1.5%
VIN = 13.2V, VOUT -55°CVIN = 14.7, VOUT -55°C
VIN = 16.2V, VOUT -55°C

AN1850 Rev.1.01 Page 14 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
FIGURE 28. SOFT-START with BYP CAP = 0.2µF and
EN to VOUT DELAY with VCCX CAP =0.1µF
VIN = 6.5V, VOUT = 5V, RL= 5Ω, COUT = 220µF, ROCP = 300Ω
FIGURE 29. SOFT-START with BYP CAP = 1.9µF and
EN to VOUT DELAY with VCCX CAP = 0.1µF
VIN = 6.5V, VOUT = 5V, RL= 5Ω, COUT = 220µF, ROCP = 300Ω
FIGURE 30. SOFT-START with BYP CAP = 0.2µF and
EN to VOUT DELAY with VCCX CAP = 33µF
VIN = 6.5V, VOUT = 5V, RL= 5Ω, COUT = 220µF, ROCP = 300Ω
Typical Performance Curves Unless otherwise specified, VIN = VOUT + 0.4V, VOUT = 2.5V, CIN = COUT = 200µF, TJ= +25°C,
ILOAD =0A. (Continued)
IIN
VOUT
VBYP
EN
VOUT
VBYP
EN
IIN
EN
IIN
VBYP
VOUT

AN1850 Rev.1.01 Page 15 of 15
Oct 24, 2022
ISL75052SEHEVAL1Z
Revision History
DATE REVISION CHANGE
Oct 24, 2022 1.01 Removed Related Literature section.
Added Output Voltage Soft-Start Adjustment and Output Voltage Start-Up Delay Adjustment sections.
Added Figures 28 - 30.
Added Revision History section.
Aug 10, 2017 1.00 Applied New Header/Footer
Updated Title
Added Features, Specifications, Ordering Information, and Related Literature sections.
Fixed order of user guide.
Updated Schematic to new format.
Corrected first label on Figures 17 and 18.
July 2, 2013 0.00 Initial release

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RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL
SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING
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These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible
for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3)
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Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims,
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(Rev.1.0 Mar 2020)