Intersil ISL75051ASEHEV1Z User manual

Evaluation Board Manual
UG148 Rev.1.00 Page 1
Jan 23, 2023 © 2017-2023 Renesas Electronics
ISL75051ASEH is a high-performance, adjustable,
low-voltage, high-current, low-dropout linear regulator
specified at 3A rated output current for input voltages
from 2.2V to 6V. The LDO outputs can be adjusted
from 0.8V to 5V using two preset resistors.
The ISL75051ASEHEV1Z evaluation board provides
a simple platform to evaluate the performance of the
ISL75051ASEH. The same board can be used to
evaluate the ISL73051ASEH which is the same die
offered with different radiation assurance screening.
The device output voltage is adjustable, and jumpers
are provided to easily set popular output voltages.The
device output voltage is adjustable, and jumpers are
provided to easily set popular output voltages.
What’s Inside
The evaluation kit contains the following:
▪ISL75051ASEHEV1Z evaluation board
▪ISL75051ASEH datasheet
▪This user manual
Key Features
▪TID, ELDRS, and SEE Rated
▪Very fast load transient response
▪±2.0% guaranteed VOUT accuracy over line, load,
and temperature
▪Typical dropout of 287mV at 3A
▪EN, PG, and OCP features
▪Short-circuit and over-temperature protection
Specifications
▪VIN = 2.2V to 6.0V
▪Temperature range: -55°C to 125°C
Related Literature
For a full list of related documents, visit our website
▪ISL75051ASEH and ISL73051ASEH product
pages
Figure 1. ISL75051ASEHEV1Z Simplified Schematic
ROCP
220µF 0.1µF
PG
VIN
ISL75051ASEH
0.1µF 220µF
0.1µF
2.67k
4.7nF
100pF
VOUTVIN
EN
VOUT
R2
R1
PG
VIN
OCP
EN
GND
ADJ
BYP
ISL75051ASEHEV1Z

UG148 Rev.1.00 Page 2
Jan 23, 2023
ISL75051ASEHEV1Z Evaluation Board Manual
Contents
1. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Quick Start Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Test Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Input and Output Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 Pole Capacitor (CP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 PCB Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3 ISL75051ASEHEV1Z Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.5 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3. Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

UG148 Rev.1.00 Page 3
Jan 23, 2023
ISL75051ASEHEV1Z Evaluation Board Manual
1. Functional Description
Use the following information to optimize the performance of the ISL75051ASEH.
1.1 Operating Range
▪VIN = 2.2V to 6.0V
1.2 Quick Start Guide
1. Configure the EN pin. Shorting JP11 disables the part, while leaving it open enables the LDO.
2. Set the OCP level.
a. Use the 2 resistor locations provided on the board to configure the OCP trip point. R3and R14, which are
connected to JP8 and JP9, respectively.
b. JP9 is set to provide an OCP trip point of 6.7A, JP8 is set for a trip point of 1.2A.
3. Ensure that JP10 is shorted.
a. R4(100Ω) is connected across the terminals of JP10. This is used for measuring the loop stability. Apply
the AC signal across R4using JP10 and use TP7 (VOUT) and TP12 (VOUT’) for the measurement.
4. Short pins 2 and 3 of JP1.
5. Set the VOUT level by shorting JP2 – JP7.
▪JP2 – 0.8V
▪JP3 – 1.5V
▪JP4 – 1.8V
▪JP5 – 2.5V
▪JP6 – 4.0V
▪JP7 – Adjustable, use R13 (potentiometer) to set your required voltage.
6. Apply 5.0V between VIN and GND (J1 – J2)
7. Monitor VOUT using J3 – J4.
8. SP1 is a scope probe jack on VOUT for evaluating load step transients on VOUT.
1.3 Test Steps
9. Select the required output voltage by shorting one of the jumpers from J2 through J6. The option of JP7
provides for continuous adjustment of VOUT using potentiometer R13.
10. Set the OCP limit by using jumpers JP8 and JP9. JP9 = 0.8A min and JP8 = 4A min.
11. Close JP10. Also closing jumper JP1 (2 and 3) selects R2= 5.49k as pull-up for PGOOD.
12. Ensure that the output capacitor and CPare set according to recommended values shown in Table 1 .
13. Connect the input supply to VIN/GND and the load to VOUT/GND. Select the VIN to VOUT ratio to keep
dissipation within the thermal limits of the device.
14. Use JP11 to enable/disable the IC; Open = Enable, and Close = Disable.
Note: For REVB boards, Close = Enable and Open = Disable.

UG148 Rev.1.00 Page 4
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ISL75051ASEHEV1Z Evaluation Board Manual
1.4 Input and Output Capacitor Selection
RH operation requires a combination of tantalum and ceramic capacitors to achieve a good
volume-to-capacitance ratio. The recommended combination is a 220µF, 25mΩ, 10V DSSC 04051-032 rated
tantalum capacitor in parallel with a 0.1µF MIL-PRF-49470 CDR04 ceramic capacitor. This is to be connected
between VIN to GND pins and VOUT to GND pins of the LDO, with PCB traces no longer than 0.5cm. The stability
of the device depends on the capacitance and ESR of the output capacitor. The usable ESR range for the device
is 6mΩto 100mΩ. At the lower limit of ESR = 6mΩ, the phase margin is about 51°C. On the high side, an ESR of
100mΩis found to limit the gain margin at around 10dB. The typical GM/PM seen on the ISL75051ASEHEV1Z
evaluation board for VIN = 3.3V, VOUT = 1.8V, and IOUT = 3A, with a 220µF, 10V, 25mΩcapacitor, is GM = 16.3dB
and PM = 69.16°C.
1.5 Pole Capacitor (CP)
A small capacitor (CP) can be placed on the ADJ pin of the ISL75051ASEH, as shown in Figure 2, across the
bottom resistor in the feedback resistor divider. This is effectively a pole. The value of the capacitor can be
calculated using Equation 1:
The pole should be set to have the break frequency at 1MHz.
Table 1 gives the recommended values for output capacitors (MLCC X5R/X7R) and CPfor different voltage rails.
Correct selection of the output capacitor and CPalso helps increase PSRR at high frequencies. The board,
however, uses a 100pF capacitor as a typical value most suited for the application range.
(EQ. 1)
Figure 2. ISL75051ASEH Typical Application
Table 1. Recommended Output Capacitor Values
VOUT (V) RTOP (kΩ)R
BOTTOM (Ω)C P (pF) COUT (µF)
5.0 4.32 499 120 220
4.0 4.32 634 120 220
2.5 4.32 1.13k 120 220
1.8 4.32 1.74k 100 220
1.5[1]
1. Either option can be used depending on cost/performance requirements.
4.32 2.26k 100 47
1.5 4.32 2.26k 100 220
0.8 4.32 7.87k 68 220
FP12piR
BOTTOM CP
=
ISL75051ASEH
CIN
RTOP
RBOTTOM
CP
VIN VOUT
EN
OCP
PG
COUT
ADJ

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ISL75051ASEHEV1Z Evaluation Board Manual
2. Board Design
Figure 3. ISL75051ASEHEV1Z Evaluation Board, Top
Figure 4. ISL75051ASEHEV1Z Evaluation Board, Bottom

UG148 Rev.1.00 Page 6
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ISL75051ASEHEV1Z Evaluation Board Manual
2.1 PCB Layout Guidelines
Good PCB layout is important for achieving expected performance. When placing components and routing traces,
minimize ground impedance and keep parasitic inductance low. Give the input and output capacitors a good
ground connection, and place them as close to the IC as possible. Route the traces connecting the ADJ pin away
from noisy planes and traces, and keep the board capacitance of the ADJ net to GND as low as possible.
2.2 Thermal Guidelines
If the die temperature exceeds +175°C typical, then the LDO output shuts down to zero until the die temperature
cools to +155°C typical. The level of power combined with the thermal impedance of the package (RθJC of 4°C/W
for the 18 Ld CDFP package) determines whether the junction temperature exceeds the thermal shutdown
temperature specified in the “Electrical Specifications” table of the ISL75051ASEH Datasheet. Mount the device
on a high-effective thermal conductivity PCB with thermal vias, per JESD51-7 and JESD51-5. Place a silpad
between the package base and PCB copper plane. Select the VIN and VOUT ratios to ensure that dissipation for
the selected VIN range keeps TJwithin the recommended operating level of 150°C for normal operation.

UG148 Rev.1.00 Page 7
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ISL75051ASEHEV1Z Evaluation Board Manual
2.3 ISL75051ASEHEV1Z Schematic
Figure 5. Schematic
DRAWN BY: RELEASED BY:
DATE: DATE:
ENGINEER: DATE: TITLE:
10/02/2017
TIM KLEMANN
KIRAN BERNARD
4.0V
ADJ.
VOUT OPTIONS
GND
PGOOD
VOUT'
1.5V
1.8V
OCP_MAX
**
2.5V
ENABLE
GND
*
*
*
**
VOUT
**
*
**
OCP_MIN
**
0.8V
E
E
E
E
E
E
E
E
E
E
E
JP10
TP6
DNP
C3B
TP4
0
R11
680
R16
R8
1.13K
TP2
JP3
C6D
0.1UF
RED GRN
LED1
1 2 3 4
C8
100PF
TP5
OPEN
C5A
R14
4.99K
R15
680
4.32K
R10
TP1
R6
2.26K
TP11
DNP
C4A
JP11
R1
549
TP12
JP9
JP6
J1
JP4
DNP
C3C
OPEN
C1A
0.1UF
C5B
C6B
DNP
634
R9
J2
1.74K
R7
TP7
TP8
C1
0.1UF
C7A
OPEN
TP3
VOUT
VOUT
BYP
ADJ
METAL PAD
VIN
VIN
EN
OCP
VIN
VIN
PG
VIN
VIN
VOUT
VOUT
VOUT
VOUT
GND
U1
ISL75051ASEHVFE
1
2
3
4
5
6
7
8
910
11
12
13
14
15
16
17
18
19
DNP
C4B
R3
511
SP1
JP2
DNP
C3A
OPEN
C7B
R12
DNP
220UF
C3D
JP8
JP1
1 2 3
7.87K
R5
TP10
DNP
C4C
JP7
J4
R17
10K
Q1
2N7002L
1
2 3
TP9
0.1UF
C1B
100
R4
OPEN
C6C
220UF
C4D
R13
10K
1
2
3
J3
OPEN
C6A
5.49K
R2
JP5
BYP
ENABLE
OCP
PGOOD
UNNAMED _1_2N7002_I653_D
UNNAMED _1_CDR_I618_B
UNNAMED _1_JUMPER2_I602_IN1 UNNAMED _1_JUMPER2_I602_IN2UNNAME D_1_JUMPER2_I606_IN2UNNAME D_1_JUMPER2_I607_IN2UNNA MED_1_JUMPER2_I608_IN2UNNA MED _1_JUMPER2_I609_IN2 UNNAMED_1_JUMPER2_I641_IN2
UNNAMED _1_JUMPER2_I642_IN1UNNAME D_1_JUMPER2_I643_IN1
UNNAMED _1_JUMPER3_I593_IN1 UNNAMED_1 _JUMPE R3_I593_IN3
UNNAMED _1_SMRES_I580_B
UNNAMED _1_SMRES_I650_B UNNAMED _1_SMRES_I651_B
VADJ
VIN
VOUT

UG148 Rev.1.00 Page 8
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ISL75051ASEHEV1Z Evaluation Board Manual
2.4 Bill of Materials
Qty Reference
Designator Description Manufacturer Manufacturer Part
1PWB-PCB, ISL75051ASEHEV1Z,
REVA, ROHS IMAGINEERING INC ISL75051ASEHEV1ZREVAPC B
1C7B CAP-MILQUAL, SMD, 0805, 4700pF,
50V, 10%, BX, ROHS VISHAY/VITRAMON CDR01BX472AKMR
4C1B, C5B, C6B,
C6D
CAP-MILQUAL, SMD, 1812, 0.1µF, 50V,
10%, BX, ROHS AVX CDR04BX104AKMR
1C8 CAP, SMD, 0603, 100pF, 50V, 10%,
X7R, ROHS KEMET C0603C101K5RACTU
1C1 CAP, SMD, 0603, 0.1µF, 16V, 10%, X7R,
ROHS MURATA GRM39X7R104K016AD
0C1A, C5A, C6A,
C6C
CAP, SMD, 0603, DNP-PLACE
HOLDER, ROHS
0C7A CAP, SMD, 0805, DNP-PLACE
HOLDER, ROHS
4C3B, C3D, C4B,
C4D
CAP-TANT, SMD, 7.3x4.3, 220µF, 10V,
20%, 25mΩ, DF:10, ROHS KEMET T525D227M010ATE025
4J1-J4 CONN-JACK, BANANA-SS-SDRLESS,
VERTICAL, 0.53 Length, ROHS
JOHNSON
COMPONENTS 108-0740-001
1SP1 CONN-SCOPE PROBE TEST PT,
COMPACT, PCB MNT, ROHS TEKTRONIX 131-4353-00
6 TP1-TP6 CONN-TURRET, TERMINAL POST, TH,
ROHS KEYSTONE 1514-2
6 TP7-TP12 CONN-MINI TEST POINT, VERTICAL,
WHITE, ROHS KEYSTONE 5002
10 JP2-JP11 CONN-HEADER, 1x2, BRKAWY 1x36,
2.54mm, ROHS BERG/FCI 68000-236HLF
1JP1 CONN-HEADER, 1x3, BREAKAWY
1x36, 2.54mm, ROHS BERG/FCI 68000-236HLF
11 JP1-Pins 1-2,
JP2-JP11
CONN-JUMPER, SHORTING, 2PIN,
BLACK, GOLD, ROHS SULLINS SPC02SYAN
1LED1 LED, SMD, 3x2.5mm, 4P, RED/GREEN,
12/20MCD, 2V LUMEX SSL-LXA3025IGC-TR
1U1 IC-RADHARD, CMOS 3A LDO
REGULATOR, 18P, CFP, ROHS INTERSIL ISL75051ASEHFE/PROTO
1Q1 TRANSISTOR-MOS, N-CHANNEL,
SMD, SOT23, 60V, 115mA, ROHS
ON
SEMICONDUCTOR 2N7002LT1G
1R13 POT-TRIM, TH, 3P, 10k, 1/2W, 10%,
3/8SQ, 25TURN, TOPADJ, ROHS BOURNS 3299W-1-103LF

UG148 Rev.1.00 Page 9
Jan 23, 2023
ISL75051ASEHEV1Z Evaluation Board Manual
0R12 RESISTOR, SMD, 0805, DNP, DNP,
DNP, TF
1 R11 RES, SMD, 0603, 0Ω, 1/10W, TF, ROHS VENKEL CR0603-10W-000T
1R4 RES, SMD, 0603, 100Ω, 1/10W, 1%, TF,
ROHS VENKEL CR0603-10W-1000FT
1R17 RES, SMD, 0603, 10k, 1/10W, 1%, TF,
ROHS VENKEL CR0603-10W-1002FT
1R8 RES, SMD, 0603, 1.13k, 1/10W, 1%, TF,
ROHS YAGEO RC0603FR-071K13L
1R7 RES, SMD, 0603, 1.74k, 1/10W, 1%, TF,
ROHS PANASONIC ERJ-3EKF1741V
1R6 RES, SMD, 0603, 2.26k, 1/10W, 1%, TF,
ROHS YAGEO RC0603FR-072K26L
1R10 RES, SMD, 0603, 4.32k, 1/10W, 1%, TF,
ROHS
1R14 RES, SMD, 0603, 4.99k, 1/10W, 1%, TF,
ROHS PANASONIC ERJ-3EKF4991V
1R3 RES, SMD, 0603, 511Ω, 1/10W, 1%, TF,
ROHS VENKEL CR0603-10W-5110FT
1R1 RES, SMD, 0603, 549Ω, 1/10W, 1%, TF,
ROHS VENKEL CR0603-10W-5490FT
1R2 RES, SMD, 0603, 5.49k, 1/10W, 1%, TF,
ROHS VENKEL CR0603-10W-5491FT
1R9 RES, SMD, 0603, 634Ω, 1/10W, 1%, TF,
ROHS YAGEO RC0603FR-07634RL
2 R15, R16 RES, SMD, 0603, 680Ω, 1/10W, 1%, TF,
ROHS ROHM MCR03EZPFX6800
1R5 RES, SMD, 0603, 7.87k, 1/10W, 1%, TF,
ROHS YAGEO RC0603FR-077K87L
4 Four corners SCREW, 4-40X1/4in, PHILLIPS,
PANHEAD, STAINLESS, ROHS
BUILDING
FASTENERS PMSSS 440 0025 PH
4 Four corners STANDOFF, 4-40X3/4in, F/F, HEX,
ALUMINUM, 0.25 OD, ROHS KEYSTONE 2204
1 Place assy in bag BAG, STATIC, 6X8, ZIPLOC, ROHS ULINE S-2262
1AFFIX TO BACK
OF PCB
LABEL-DATE CODE_LINE 1:
YRWK/REV#, LINE 2: BOM NAME INTERSIL LABEL-DATE CODE
Qty Reference
Designator Description Manufacturer Manufacturer Part

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ISL75051ASEHEV1Z Evaluation Board Manual
2.5 Board Layout
Figure 6. Silk Screen Top
Figure 7. Top Layer Component Side

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ISL75051ASEHEV1Z Evaluation Board Manual
Figure 8. Layer 2
Figure 9. Layer 3

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ISL75051ASEHEV1Z Evaluation Board Manual
Figure 10. Bottom Layer Solder Side
Figure 11. Silk Screen Bottom

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ISL75051ASEHEV1Z Evaluation Board Manual
Figure 12. Silk Screen Bottom Mirror

UG148 Rev.1.00 Page 14
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ISL75051ASEHEV1Z Evaluation Board Manual
3. Typical Performance Curves
Figure 13. Start-Up Waveforms: VIN = 6.0V, VOUT = 0.8V,
EN Low to High
Figure 14. Start-Up Waveforms: VIN = 2.2V, VOUT = 0.8V,
EN Low to High
Figure 15. Shutdown Waveform: VIN = 6.0V, VOUT = 0.8V,
EN High to Low
Figure 16. Shutdown Waveform: VIN = 2.2V, VOUT = 0.8V,
EN High to Low
Figure 17. Load Transient, VIN = 3.3V, VOUT = 2.5V,
COUT = 47µF 35mΩ
Figure 18. Load Transient, VIN = 3.3V, VOUT = 2.5V,
COUT = 220µF 25mΩ
EN,
VIN, 1V/Div
VOUT,
2ms/Div
PGOOD, 1V/Div
500mV/Div
1V/Div
EN, 1V/Div
VIN, 2V/Div
VOUT,
2ms/Div
PGOOD, 2V/Div
500mV/Div
EN, 1V/Div
VIN, 2V/Div
VOUT , 500mV/Div
2ms/Div
PGOOD, 2V/Div
EN, 1V/Div
VIN, 2V/Div
VOUT, 500mV/Div
2ms/Div
PGOOD, 2V/Div
VOUT, 100mV/Div
500µs/Div
PGOOD, 1A/Div
VOUT, 100mV/Div
500µs/Div
PGOOD, 1A/Div

UG148 Rev.1.00 Page 15
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ISL75051ASEHEV1Z Evaluation Board Manual
Figure 19. ROCP (kΩ) vs OCP A Over Temperature Figure 20. Dropout vs IOUT
Figure 21. Load Regulation VOUT vs IOUT Figure 22. Load Regulation VADJ vs IOUT
Figure 23. Load Regulation VOUT vs IOUT Figure 24. Load Regulation VADJ vs IOUT
0
1
2
3
5
6
7
8
0123456
4
OCP A
ROCP (kΩ)
IOCP A = +25°C
IOCP A = +128°C
IOCP A = -58°C
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0123 4
IOUT (A)
Voltage Dropout
+25°C
+125°C
+150°C
1.802
1.804
1.806
1.808
1.810
1.812
1.814
1.816
1.818
1.820
1.822
1.824
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VOUT (mV)
+25°C, VOUT (mV) -58°C, VOUT (mV)
VOUT (V)
VIN = 2.5V
VOUT = 1.8V
0.5165
0.5170
0.5175
0.5180
0.5185
0.5190
0.5195
0.5200
0.5205
0.5210
0.5215
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VADJ (mV)
+25°C, VADJ (mV)
-58°C, VADJ (mV)
VADJ (V)
VIN = 2.5V
VOUT = 1.8V
0.790
0.792
0.794
0.796
0.798
0.800
0.802
0.804
0.806
0.808
0.810
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VOUT (mV)
+25°C, VOUT (mV) -58°C, VOUT (mV)
VOUT (V)
VIN = 2.5V
VOUT = 0.8V
0.508
0.510
0.512
0.514
0.516
0.518
0.520
0.522
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VADJ (mV)
+25°C, VADJ (mV)
-58°C, VADJ (mV)
VADJ (V)
VIN = 2.5V
VOUT = 0.8V

UG148 Rev.1.00 Page 16
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ISL75051ASEHEV1Z Evaluation Board Manual
4. Ordering Information
5. Revision History
Figure 25. Load Regulation VOUT vs IOUT Figure 26. Load Regulation VADJ vs IOUT
Part Number Description
ISL75051ASEHEV1Z ISL75051ASEH evaluation board
Rev. Date Description
1.00 Jan 23, 2023 Applied new template.
Updated page 1 description and related literature section.
0.00 Nov 29, 2017 Initial release
2.485
2.490
2.495
2.500
2.505
2.510
2.515
2.520
2.525
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VOUT (mV)
+25°C, VOUT (mV)
-58°C, VOUT (mV)
VOUT (V)
VIN = 2.5V
VOUT = 0.8V
0.5160
0.5165
0.5170
0.5175
0.5180
0.5185
0.5190
0.5195
0.5200
0.5205
0.5210
0.5215
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
IOUT (A)
+128°C, VADJ (mV)
+25°C, VADJ (mV) -58°C, VADJ (mV)
VADJ (V)
VIN = 3.3V
VOUT = 2.5V

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(Rev.1.0 Mar 2020)