
7
dc2056af
DEMO MANUAL DC2056A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SCHEMATIC DIAGRAM
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BB
B
B
A
A
AA
ON
OFF
2.
VIN
4V - 76V
GND
FBO
VOUT
1.8V/3.3V/5V
1A
GND
BA
1. ALL RESISTORS AND CAPACITORS ARE 0603.
NOTE: UNLESS OTHERWISE SPECIFIED
JP1 JP2VOUT
BA
1.8V
3.3V
5.0V
EXT. R
2
3
1
1
1
3
3
2
2
3. FOR 5VOUTPUT, VIN RANGE IS
6V - 76V.
VOUTVIN
VIN
TECHNOLOGY
1
11/04/13 12:46:41
HIGH EFFICIENCY, 76V, 1A STEP-DOWN
N/A
LTC3637EMSE
DEMO CIRCUIT 2056A
CONVERTER
TECHNOLOGY
1
11/04/13 12:46:41
HIGH EFFICIENCY, 76V, 1A STEP-DOWN
N/A
LTC3637EMSE
DEMO CIRCUIT 2056A
CONVERTER
TECHNOLOGY
1
11/04/13 12:46:41
HIGH EFFICIENCY, 76V, 1A STEP-DOWN
N/A
LTC3637EMSE
DEMO CIRCUIT 2056A
CONVERTER
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
CHARLIE Z.
PROD
111/04/13
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
CHARLIE Z.
PROD
111/04/13
REVISION HISTORY
DESCRIPTION DATE APPROVEDECO REV
CHARLIE Z.
PROD
111/04/13
C6
100uF
10V
1210
C6
100uF
10V
1210
C8
OPT
1210
C8
OPT
1210
R7
OPT
R7
OPT
+
C1
47uF
100V
+
C1
47uF
100V C9
0.1uF
C9
0.1uF
R3
OPT
R3
OPT
R2
OPT
R2
OPT JP3JP3
L1 10uH
CDRH105R
L1 10uH
CDRH105R
C10
OPT
1210
C10
OPT
1210
E3E3
C11
OPT
1210
C11
OPT
1210
U1
LTC3637EMSE
U1
LTC3637EMSE
SW 1
VIN
3
OVLO
12
VPRG1 7
VPRG2 6
GND
8
VFB 9
SS 10
ISET
11
FBO
5
RUN
14
GND
16
GND
17
E4E4
R1
1M
R1
1M
JP2JP2
E5E5
R6
0
R6
0
R5
0
R5
0
R4
255K
1%
R4
255K
1%
C3
47pF
C3
47pF
D1
SBR3U100LP
D1
SBR3U100LP
JP1JP1
E2E2
C2
4.7uF
100V
2220
C2
4.7uF
100V
2220 C7
100uF
10V
1210
C7
100uF
10V
1210
E1E1
C4
47nF
C4
47nF
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