Microchip Technology SAMA7G54-EK User manual

SAMA7G54-EK
SAMA7G54-EK User's Guide
Scope
This user's guide provides detailed information on the overall design of the SAMA7G54 Evaluation Kit (SAMA7G54-
EK) and describes how to use the kit.
The kit is the evaluation platform for the SAMA7G5 Series devices.
Figure 1. SAMA7G54-EK Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 1

1. Introduction
1.1 Document Layout
The document is organized as follows:
• Introduction
• Product Overview—Important information about the evaluation kit
• Function Blocks—Evaluation kit specification and high-level description of the major components and interfaces
• Installation and Operation—How to get started with the evaluation kit
• Appendix A: Schematics and Layout—Evaluation kit schematics and layout diagrams
• Appendix B: Unmounted Elements—List of unmounted components, description of their use in the system and
guidance for manually assembling the Wi-Fi®/Bluetooth® module
1.2 Reference Documents
The following Microchip document are available and recommended as supplemental reference resources.
Table 1-1. Reference Documents
Document Title Document Type Literature No.
SAMA7G5 Series Data sheet DS60001765
MCP16502 Data sheet DS20006275
24AA025E48 Data sheet DS20002124
KSZ8081RNA/RND Data sheet DS00002199
KSZ9131RNX Data sheet DS00002841
MCP2542FD Data sheet DS20005514
ATWILC3000-MR110xA Data sheet DS70005327
ATECC608B Data sheet DS40002239
PAC1934 Data sheet DS20005850
How to Manually Solder the ATWILC3000 Module on an MPU Board Application note AN3227
SAMA7G54-EK
Introduction
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 2

2. Product Overview
The SAMA7G54 Evaluation Kit (SAMA7G54-EK) provides a versatile Total System Solution platform that highlights
Microchip MPU and connectivity ICs.
The board features on-board memories, two Ethernet interfaces, three USB ports, two CAN interfaces, one SD card
connector, two mikroBUS™ click interface headers to support over 450 MikroElektronika Click boards™, an RPi CSI
camera to support a camera module, an RPi extension connector to support several extension boards, and provision
to solder a Microchip ATWILC3000-MR110xA Wi-Fi/Bluetooth module.
Note: RPi stands for “Raspberry Pi”. Raspberry Pi is a trademark of Raspberry Pi Trading.
2.1 SAMA7G54-EK Features
Table 2-1. SAMA7G54-EK Features
Characteristic Specifications Components
Processor 14x14 mm, 0.65 mm pitch, 343-ball
TFBGA Microchip SAMA7G54-V/4HB
External clock
MPU: 24 MHz
MPU: 32.768 kHz Crystal
Ethernet: 25 MHz
Microchip DSC1001DI5-024.0000
NDK NX2012SA-32.768-STD-MUB-1
2 * Microchip DSC1001DI5-025.0000
Memory
One 16-bit, 4-Gbit DDR3L
One 32-Gbit e.MMC
One 1-Gbit Octal SPI Flash
Two EEPROMs with EUI-48™ MAC ID
Alliance Memory AS4C256M16D3LC-12BCNTR
SkyHigh Memory S40FC004C1B1C00000
Micron MX66LM1G45GXDI00
2 * Microchip 24AA02E48
SD/MMC One standard 4-bit SD Card interface
with power control Microchip MIC9085
USB
One Micro-AB host/device with power
switch
One Type-A host with power switch
One Type-C™ host with power switch
3 * Microchip MIC2025
CAN Two CAN interfaces Microchip MCP2542FD
Ethernet
One Ethernet 10/100 port
One Gigabit Ethernet port
Microchip KSZ8081
Microchip KSZ9131
Wi-Fi/BT One optional Wi-Fi/BT interface Slot for Microchip ATWILC3000
Audio
One SPDIF RX port
One SPDIF TX port
Four digital microphones
–
–
SPK0641HT4H-1
Camera One RPi CSI camera interface –
Debug port
One J-Link-OB + CDC
One JTAG interface
Embedded J-Link-OB through the CDC
(Communication Device Class) interface
(ATSAM3U4C TFBGA100)
SAMA7G54-EK
Product Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 3

...........continued
Characteristic Specifications Components
Board monitor
One RGB (red, green, blue) LED
Four push button switches
–
–
Expansion
One RPi Expansion connector
Two mikroBUS connectors
–
Hundreds of possible click extensions featuring
Microchip functions
Power
management
One power management IC
One power consumption measurement
device
Microchip MCP16502
Microchip PAC1934
Board supply From USBA or from wall adapter –
Backup battery SuperCap –
2.2 SAMA7G54-EK Content
The SAMA7G54 evaluation kit includes the following:
• The SAMA7G54-EK board
• Two USB-A to USB Micro-AB cables
2.3 Evaluation Kit Specifications
Table 2-2. Evaluation Kit Specifications
Characteristic Specifications
Board SAMA7G54-EK
Board supply voltage External or USB-powered
Temperature
Operating: 0°C to +70°C
Storage: -20°C to +70°C
Relative humidity 0 to 85% (non-condensing)
Board dimensions 160 x 100 mm
RoHS status Compliant
2.4 Power Sources
Two options are available to power up the SAMA7G54-EK board:
• Through an external AC to DC +5V wall adapter connector (J1)
• Through the USB Micro-AB connector on the USBA port (J7)
Table 2-3. Electrical Characteristics
Electrical Parameter Value
Input voltage 5 VDC
Maximum input voltage 6 VDC
SAMA7G54-EK
Product Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 4

...........continued
Electrical Parameter Value
Maximum 3.3 VDC current 300 mA
CAUTION
The SAMA7G54-EK board runs at a 3.3V voltage level logic. The maximum voltage that the I/O pins can
tolerate is 3.3V. Providing higher voltages (e.g. 5V) to an I/O pin could damage the board.
2.5 On-Board Connectors
The fully-featured SAMA7G54 Evaluation Kit integrates multiple peripherals and interface connectors, as shown in
the following figure.
Figure 2-1. SAMA7G54-EK Connectors
J-Link-OB
Micro-AB
JTAG 20-pin
IDC Connector 3 x User Buttons MIPI CSI Camera
Connector
Disable
Boot
Button
UART DEBUG
External
Power
Jack
2 x CAN
Connector
USB 2.0
Micro-AB
USB Host
Type-C
USB Host
Type-A
SD Card
Connector
Footprint to
solder the
WiFi/BT
Module
WiFi/BT
Debug
Connector
SPDIF
RX
Connector
SPDIF
TX
Connector
Ethernet
10/100
Gigabit
Ethernet
Disable
Boot
Jumper
mikroBUS
Connector
Raspberry Pi
Connector
mikroBUS
Connector
WiFi/BT
Table 2-4. SAMA7G54-EK Board Interface Connectors
Connector Interfaces To
J1 External power jack
J4 Standard SDMMC connector
J5 Gigabit Ethernet RJ45
J6 Ethernet 10/100 RJ45
SAMA7G54-EK
Product Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 5

...........continued
Connector Interfaces To
J7 USB 2.0 Micro-AB (USB-A)
J8 USB 2.0 Type-C (USB-B)
J9 USB 2.0 Type-A (USB-C)
J10 mikroBUS socket (mBUS1)
J11 MIPI CSI camera connector
J12 mikroBUS socket (mBUS2)
J13 40-pin Raspberry Pi connector
J14 Tamper pins connector
J15 ATWILC3000 debug connector
J16 ATWILC3000 UART debug connector
J17 Dual CAN connector
J18 SPDIF RX connector
J19 SPDIF TX connector
J20 UART debug connector (FTDI connector)
J22 Disable boot jumper
J23 PCB connector for factory-programming the SAM3U/J-Link-OB (not to be used by end user)
J24 J-Link-OB USB connection
J27 JTAG, 20-pin IDC
2.6 Default Jumper Settings
The following picture shows the default jumper settings. Jumpers in blue are in open position, jumpers in red are in
closed position.
SAMA7G54-EK
Product Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 6

Figure 2-2. SAMA7G54-EK Default Jumper Settings
Table 2-5. SAMA7G54-EK Jumper Settings
Jumper State Function
J2 Closed VDDBU current measurement
J3
Open (default) RMII Ethernet interface is selected.
Closed The 4-microphone PDMIC interface is selected.
J22
Open (default) Booting from on-board memory is permanently allowed and only disabled during SW4
pressure.
Closed Booting from on-board memory is permanently disabled.
J25
Open (default) Enables UART communication (CDC) between MPU and SAM3U.
Closed Disables UART communication (CDC) between MPU and SAM3U.
J26
Open (default) The on-board J-Link interface is enabled and used for MPU debugging.
Closed The on-board J-Link interface is disabled. MPU debugging is done through the JTAG
connector (J27).
SAMA7G54-EK
Product Overview
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 7

3. Function Blocks
This section covers the SAMA7G45-EK specifications and provides a high-level description of the board's major
components and interfaces.
This document is not intended to provide detailed information about the processor or about any other components
used on the board. Refer to the components documentation for further details.
Figure 3-1. SAMA7G54-EK Block Diagram
SAMA7G54-V/4HB
BGA-343
14x14mm
0.65mm pitch
Power Supply
MCP16502AB
+SuperCap
System
Supplies
Power
Input
Connectivity
2xmikroBUS
Raspberry Pi
40-pin
Connector
USB 2.0 Host Type A
USB 2.0 Host Type C
USB 2.0 Host/Device Type µAB
SDCard
Connector
RPi CSI
Connector
Memories
4Gb 16-bit
DDR3L
AS4C256M16D3LC
12BCNTR
8-bit 32Gb e.MMC
S40FC004C1B1C00000
8-bit 128MB OctaSPI
MX66LM1G45GXDI00
2x EEPROM
24AA025E48
Peripherals
Gigabit Ethernet
KSZ9131RNX
10/100/1000Mbps
Ethernet
KSZ8081RNAIA
10/100Mbps
WiFi/BT
ATWILC3000-
MR110xA (Not
mounted)
SPDIF RX/TX
2x CAN
Interface
User Interface
User, nRST,
WKUP Button
RGB LEDS
JLINK
CDC/JTAG
FTDI DBGU
4x PDM
Microphone
Secure Element
ATECC608B
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 8

3.1 Power Supply Topology and Power Distribution
This section describes the implementation and circuitry that ensure adequate voltage stability for all the devices on
the board and a correct power-up sequence for the MPU. The power-up and power-down sequences indicated in the
SAMA7G5 Series data sheet must be respected for a reliable operation of the device.
3.1.1 Input Power Options
The SAMA7G54-EK board can be powered through:
• An external AC to DC +5V wall adapter connected via a 2.1 mm center-positive plug into the power jack of the
board (J1); the recommended output capacity of the power adapter is 2A
• USB port A (J7)
3.1.1.1 Wall Adapter Input
The 5V_EXT from the wall adapter is protected through a pair of Schottky/Zener diodes (D1 and D2) that limit the
input voltage to 5.1V.
The following figure shows the wall adapter input power supply topology.
Figure 3-2. Wall Adapter Input Power Schematic
2.1mm
EJ508A
2
3
1
J1
GND
5V_EXT
External 5V Input Power and Input Power protection
10uF
25V
1206
C4
5V_DC
GNDGND
TP LOOP Black TH
TP2
GND
10uF
25V
1206
C3
GND
PMEG3030EP
D1
5.1V
MMSZ4689ET1G
D2
3.1.1.2 USB Supply Input
The USB-powered operation comes from the USB device port connected to a PC or a 5 VDC supply. The USB
supply is enough to power the board in most applications. It is important to note that when the USB supply is used,
the USB port has limited power. If a USB host port is required for the application, it is recommended to use the
external DC supply or a more capable micro USB external power supply.
The following figure shows the USB input power supply topology.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 9

Figure 3-3. USB Input Power Schematic
USBA_N
USBA_P
20pF
50V
0402
C194
20k
0402
1%
R188
GNDGND
USBA_VBUSDETECT_PD11
GND_USBA
USBA_VBUS_5V
EN
1
FLG 2 GND
3
NC
4NC 5
OUT 6 IN
7
OUT 8
USB Power Switch
MIC2025-1YM
U16
USBA_VBUS_5V
USBA_OVCUR_PC7
USBA_EN_5V_PB2
5V_MAIN VDD_3V3
GND
GND
GND
10uF
25V
1206
C195
10uF
25V
1206
C197
0475890001
12
34
5 0
ID D+ D- +5VGND
Mini-B Receptacle
J7
USB Micro-AB type connector to the USBA port (HOST/DEVICE)
0.1uF
10V
0402
C198
100uF
10V
1210
C200
22uF
10V
1206
C199
0.1uF
10V
0402
C196
10k
0402
1%
R189
10k
0402
1%
R187
10k
0402
1%
R186
120R
BLM18PG121SN1D
FB9
120R
BLM18PG121SN1D
FB10
DIFF90
DIFF90
0R
0603
R185
USB_VBUS_5V
GND
GND_USBA
90Ω±15% differential trace impedance
Routing top or bottom
Note: USB-powered operation eliminates the need for additional wires and batteries. It is the preferred mode of
operation for any project that requires only a 5V source at up to 500 mA.
3.1.1.3 Automatic Power Switch
The switch between the two powering options is made by four transistors that ensure the separation between the two
when both are plugged. The switch prioritizes powering from the wall adapter to maximize power transfer.
The following figure shows the automatic power switch topology.
Figure 3-4. Automatic Power Switch Schematic
0603
LTST-C191KRKT
D3
3k
0603
1%
R7
GND
5V_MAIN5V_DC
2
71
6
SIA923AEDJ-T1-GE3
Q1A
5
8 4
3
SIA923AEDJ-T1-GE3
Q1B
2
71
6
SIA923AEDJ-T1-GE3
Q2A
5
8 4
3
SIA923AEDJ-T1-GE3
Q2B
GND
GNDGND
GNDGND
External Power Switch
0.1uF
10V
0402
C7
0.1uF
10V
0402
C14
100k
0402
5%
R8
100k
0402
5%
R9
100uF
10V
1210
C8
22uF
10V
1206
C9
0.1uF
10V
0402
C10
10uF
25V
1206
C13
GND
120R
BLM18PG121SN1D
FB1
USB_VBUS_5V
TP4
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 10

3.1.2 Power Management Integrated Circuit
The MCP16502 is a fully-featured PMIC optimized for Microchip MPU devices.
The MCP16502 integrates four DC-DC buck regulators and two auxiliary LDOs, and provides a comprehensive
interface to the MPU, which includes an interrupt flag and an I2C interface.
All buck channels can support loads up to 1A. All bucks are 100% duty cycle capable.
Two 300 mA LDOs are provided so that sensitive analog loads can be supported.
The default power channel sequencing is built-in, according to the requirements of the Microchip MPU device.
The MCP16502 features a low no-load operational quiescent current, and draws less than 10 µA in full shutdown.
Active discharge resistors are provided on each output. All buck channels support safe start-up into pre-biased
outputs.
The MCP16502 is available in a 32-pin 5 mm x 5 mm VQFN package with an operating junction temperature range
from –40°C to +125°C. It is AEC-Q100 Grade 2 (TAMB=105°C) qualified. For more information on the MCP16502,
refer to the product web page.
The MCP16502AB comes preset to supply all the voltage rails required by the system:
• 3.3V DC/DC supplies SAMA7G5 I/O pads and devices.
• 1.35V DC/DC supplies SAMA7G5 DDR3 pads (VDDIODDR) and devices.
• 1.1V DC/DC supplies SAMA7G5 core (VDDCORE).
• 1.275V DC/DC supplies SAMA7G5 CPU (VDDCPU).
• 1.8V LDO supplies the SD Card interface and the e.MMC.
The figure below shows the power management scheme.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 11

Figure 3-5. Power Management Unit Schematic
GND
GND
GND
GND
4.7uF
10V
0402
C1
4.7uF
10V
0402
C5
4.7uF
10V
0402
C11
4.7uF
10V
0402
C15
GND
5V_MAIN
5V_MAIN
5V_MAIN
5V_MAIN
GND
5V_MAIN
VDD_3V3
VDD_3V3
22uF
10V
0603
C2
22uF
10V
0603
C6
22uF
10V
0603
C12
22uF
10V
0603
C16
MCP16502_INT_PD9
nRST
WKUP
SHDN
nSTART
1.5uH
DFE252012P-1R5M=P2
L1
1.5uH
DFE252012P-1R5M=P2
L2
1.5uH
DFE252012P-1R5M=P2
L3
1.5uH
DFE252012P-1R5M=P2
L4
TP1
4.7uF
10V
0402
C17
4.7uF
10V
0402
C19
4.7uF
10V
0402
C20
(5V0)
(5V0)
(5V0)
max 1A
max 1A
max 1A
max 0.3A
max 0.3A
max 1A
LPM
5V_MAIN
TP9
GND
(5V0)
10k
0402
1%
R4
0R 0603
R2
1k 04025%
R3
VDD_1V35
VDD_1V15_OUT3
VDD_1V15_OUT4
VLDO2
VLDO1
MCP16502_TWD
MCP16502_TWCK
MCP16502TAB-E/S8B
PVIN2 15
PVIN1 10
PVIN3 26
PVIN4 31
PGND2 13
PGND3 28
PGND4 29
PGND1 12
SW1 11
SW2 14
SW3 27
SW4 30
OUT1 9
OUT2 16
OUT3 25
OUT4 32
SVIN
4
SGND
3
LVIN20
LOUT1 19
LOUT2 21
SELVL1
18
nSTRT
24
SCL
6
SDA
5
nINTO
1
nRSTO
2
nSTRTO
7
HPM
23
PWRHLD
8
LPM
22
SELV2
17
EP
33
U1
5V_MAIN
GND
10k
0402
1%
R10
10k
0402
1%
R11
TP3
TP5
TP6
TP8 (5V0) TP7
(3V3)
(1V35)
(1V15)
(1V15@800MHz)
(1V8)
(OFF)
PMIC
10k
0402
1%
R5
VDDBU
100k
0402
5%
R6
4.7uF
10V
0402
C18
0R 0603
R1
(1V25@1000MHz)
HPM_PB15
3
1
2
BSS138N
Q3
10k
0402
1%
R12
VDD_3V3
LPM
GND
OSC_STBY
Selected 1.35V for
OUT2 as default
Selected 1.8V for
VLDO1 as default
Table 3-1. MCP16502 TWI Address
Device 7-bit client address Full Address with RD/WR#
MCP16502 TWI Read
1011_011
0xB7
MPC16502 TWI Write 0xB6
3.1.3 Shutdown and Reset Circuitry
The processor controls the Auto-Maintain state and power-down by asserting the SHDN pin. At power-up, the SHDN
signal is asserted at high level, sending the instruction to maintain power to the PMIC device. At power-down, SHDN
is asserted at low level, PMIC shuts down all the supplies and enters Power-down mode.
The board includes three reset sources for the SAMA7G5 MPU:
• Power-on reset from the MCP16502 power management unit
• User push button reset (SW2)
• External JTAG or J-Link-OB reset from an in-circuit emulator
Some elements on the board (such as Ethernet PHYs, octal SPI memory and mikroBUS sockets) can be reset by the
MPU independently from the general reset. They are connected by default to the NRST_OUT signal of the SAMA7G5
device and each of them can be controlled by the general reset line. A resistor swap must be performed for this
configuration.
The figure below shows the shutdown connection and the reset circuitry.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 12

Figure 3-6. SAMA7G54-EK Shutdown and Reset Schematic
SHDN
NRST
J7
SHDN R9
NRST_OUT H4
SAMA7G54
U4G
0402 1%
10k
R23
VDD_3V3
100R
R227
1 4
2 3
TL3301NF260QG
SW2
0.1uF
C239
GNDGND
VDD_3V3
10k
0402
1%
R4
1k 04025%
R3
MCP16502TAB-E/S8B
nRSTO
2
PWRHLD
8
U1
MPU
mikroBUS
connectors
AN
1
RST
2
3
4
5
6
7
8
PWM 16
J10
nRST_MBUS
AN
1
RST
2
CS
3
SCK
4
MISO
5
MOSI
6
+3.3V
7
GND
8
PWM 16
INT 15
RX 14
TX 13
SCL 12
SDA 11
+5V 10
GND 9
mikroBUS HOST
J12
0R 0603
R198
0R 0603
R199
PMIC
MX66LM1G45GXDI00
100R 04021%
R134
100R 04021%
R136
U9
RESET#
A4
Octal SPI
Memory
RESET_N
42
kSZ9131RNXC
100R 04021%
R165
100R 04021%
R166
U14
Gigabit
Ethernet
RST
24
KSZ8081RNAIA-TR
100R 04021%
R179
100R 04021%
R180
U15
Ethernet
10/100
1 2
3
BAT54AL D5
SDMMC1_RSTN_PB28
0R 0402
R119
100R 0402
1%
R253
I0B
5
I1B
6
YB 7
IDTQS3VH257PAG
U27
U26
SAM3U
J27
JTAG Connector
EN
4
MIC94085YFT
U7
SD-CARD
Power Switch
3.1.4 Battery Unit
A 5.0V battery (supercapacitor C23) is implemented to permanently maintain the VDDBU voltage. An LDO (U2 -
MCP1711) is assigned to this supercap to decrease the VDDBU voltage down to 1.8V. That allows the VDDBU
domain power consumption to be decreased. This LDO has an ultra-low quiescent current and can drive a very low
load. For more information on the device, refer to the product webpage.
This function allows the user to shut down the MPU and the system, thus entering a low-power mode, and still keep
the custom configuration that was previously set in the MPU backup area.
Jumper JP1/J2 must be in place for proper operation of the MPU, and can be removed if the user wants to bring the
MPU back to the initial configuration, by resetting the General Purpose Backup Registers (GPBR).
Figure 3-7. SAMA7G54-EK Backup Circuitry
JP1
RB160MM-60TR
D4
100R
0402
5%
R13
GND
2.2uF
16V
0603
C22
GND
5V_MAIN
2.2uF
16V
0603
C21
GND
VDDBU
0.22F
5.5V
C23
12
HDR-2.54 Male 1x2
J2
Backup
GND
VIN
1
SHDN
3
GND2 NC
4
VOUT 5
MCP1711/1.8V
U2
WARNING
Make sure the board is powered off before removing the JP1/J2 jumper.
3.1.5 Power Measurement
One Microchip DC power/energy monitor is embedded on the SAMA7G54-EK board and provides a four-channel
current sense monitoring ensured by the PAC1934 device.
The device communicates with the MPU via a Two-Wire Interface (TWI) and an alert output signal.
The PAC1934 is a four-channel power/energy monitor with current sensor amplifier and bus voltage monitors that
feed high resolution ADCs. A digital circuitry performs power calculations and energy accumulation. The PAC1934
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 13

enables energy monitoring with integration periods ranging from 1 ms to 36 hours. Bus voltage, sense resistor
voltage, and accumulated proportional power are stored in registers for retrieval by the system host or embedded
controller. For more information about the PAC1934, refer to the product web page.
Four current sense resistors are populated on board for measuring voltage and current consumption on the power
rails:
• 10 mΩ on VDD_3V3 node—3.3V power rail power consumtion on SAMA7G5
• 10 mΩ on VDDIODDR node—1.35V power rail power consumption on SAMA7G5 DDR I/Os and on DDR3L
memory
• 10 mΩ on VDDCORE node—1.1V power rail power consumption on SAMA7G5 core
• 10 mΩ on VDDCPU node—1.275V power rail power consumption on SAMA7G5 CPU
Figure 3-8. PAC1934 Power Measurement Schematic
PAC1934
ADDRSEL 6
SLOW/ALERT 1
VDD 2
GND3
VDD/IO15
SENSE3-
7
SENSE3+
8
SENSE4-
9
SENSE4+
10
SENSE1+
11
SENSE1-
12
SENSE2+
13
SENSE2-
14
PWRDN16
SM_DATA 5
SM_CLK4
EP 17
U3
PAC1934_TWCK
PAC1934_TWD
GND
GND
0.1uF
10V
0402
C27
PAC1934_INT_PC8
Power Measurement and Distribution
10k
0402
1%
R14
10k
0402
1%
R15
0402
R16
SENSE1_P
SENSE1_N
SENSE2_P
SENSE2_N
SENSE3_P
SENSE3_N
SENSE4_P
SENSE4_N
4.7uF
10V
0402
C25
0.1uF
10V
0402
C26
4.7uF
10V
0402
C24
VDD_3V3
(3V3)
1 2
3
4
0.01R 1206 1%
0.75W
R20
VDDIODDR
TP13
(1V35)
1 2
3
4
0.01R 1206 1%
0.75W
R22
VDDCORE
TP10
(1V15)
1 2
3
4
0.01R 1206 1%
0.75W
R19
VDDCPU
TP12
(1V25)
1 2
3
4
0.01R 1206 1%
0.75W
R21
SENSE1_P SENSE1_N
SENSE2_P SENSE2_N
SENSE3_P SENSE3_N
SENSE4_P SENSE4_N
VDDUTMII
VDDIN33
VDD_3V3
VDD_1V35
VDD_1V15_OUT3
VDD_1V15_OUT4
(3V3)
(3V3)
VDD_3V3_MPU
4.7uF
10V
0402
C28
4.7uF
10V
0402
C29
GNDGND
0R
0603
R17
0R
0603
R18
VDD_3V3
TP11
Table 3-2. PAC1934 Signal Descriptions
PIO Signal Name Shared PIO Signal Description
PC10 PAC1934_TWCK PMIC TWI clock signal
PC9 PAC1934_TWD PMIC TWI data signal
PC8 PAC1935_INT_PC8 – PAC1934 interrupt
Table 3-3. PAC1934 TWI Address
Device 7-bit Client Address Full Address with RD/WR#
PAC1934 TWI Read
0010_000
0x21
PAC1934 TWI Write 0x20
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 14

3.2 Processor
The SAMA7G5 is a high-performance, ultra-low power Arm® Cortex®-A7 CPU-based embedded microprocessor
(MPU) running up to 1 GHz, with support for multiple memories such as 16-bit DDR2, DDR3, DDR3L, LPDDR2,
LPDDR3, octal/quad SPI and e.MMC Flash.
The SAMA7G5 integrates complete imaging and audio subsystems with 12-bit parallel and/or MIPI-CSI2 camera
interfaces up to 8 Mpixels at 30 fps, up to four I2S data I/Os, one SPDIF transmitter and receiver and a 4-stereo
channel audio sample rate converter.
The device also features a large number of connectivity options with Dual Ethernet (one Gigabit Ethernet and one
10/100 Ethernet), six CAN-FD and three high-speed USB and offers advanced security functions (secure boot,
secure key storage, high-performance crypto accelerators for AES, SHA, RSA and ECC).
Refer to the SAMA7G5 Series data sheet for more information (see Reference Documents).
3.2.1 Processor Power Supplies
The power management unit IC (MCP16502) provides all power supplies required by the SAMA7G5 MPU:
• 1.1V for the core power rail (VDDCORE)
• 1.275V for the CPU power rail (VDDCPU)
• 1.35V for the memory power rail (VDDIODDR)
• 3.3V for I/Os, oscillators and digital power rails (VDDIN33, VDDUTMII, VDDIOP0, VDDIOP1, VDDQSPI1,
VDDSDMMC2, etc.)
Decoupling capacitors are placed close to the MPU power pins to stabilize the voltage rails.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 15

Figure 3-9. SAMA7G5 Power Decoupling
GND
0.1uF16V0201
C31
GND
VDDCPU
0.1uF16V0201
C32
0.1uF16V0201
C33
0.1uF16V0201
C34
0.1uF16V0201
C35
0.1uF16V0201
C36
0.1uF16V0201
C37
0.1uF16V0201
C39
0.1uF16V0201
C38
0.1uF16V0201
C40
0.1uF16V0201
C41
0.1uF16V0201
C42
0.1uF16V0201
C43
0.1uF16V0201
C44
0.1uF16V0201
C46
0.1uF16V0201
C47
0.1uF16V0201
C49
0.1uF16V0201
C50
0.1uF16V0201
C51
0.1uF16V0201
C52
0.1uF16V0201
C53
0.1uF16V0201
C54
0.1uF16V0201
C55
0.1uF16V0201
C56
0.1uF16V0201
C57
0.1uF16V0201
C58
0.1uF16V0201
C59
0.1uF16V0201
C60
4.7uF10V0402
C61
VDDCORE
0.1uF16V0201
C63
VDDUTMII
0.1uF16V0201
C65
0.1uF16V0201
C67
0.1uF16V0201
C68
0.1uF16V0201
C69
2.2uF10V0402
C73
0.1uF16V0201
C70
VDDANA
0.1uF16V0201
C74
4.7uF10V0402
C75
VDDIN33
0.1uF16V0201
C78
VDDBU
0.1uF16V0201
C79
0.1uF16V0201
C80
VDDANA
MPU decoupling
0.1uF16V0201
C71
SAMA7G54
VDDCPU
B20
VDDCPU
E17VDDCPU
E16
VDDCPU
E19
VDDCPU
F16
VDDIOP1
C14
VDDQSPI1
H19
VDDSDMMC0
J16
VDDCORE
L19
VDDCORE
P19
VDDCORE
U19
VDDCORE
N13
VDDIOP1
C17
VDDCORE
F15
VDDQSPI0
N16
VDDCORE
J9
VDDCORE
J13
VDDCORE
F9
VDDIN33
H3
VDDOUT25
J6
VBAT
P11
GNDUTMI A1
GNDUTMI A5
GNDUTMI A8
GNDA11
GNDA14
GNDA17
GNDD9
GNDD13
GNDUTMI E1
GNDE7
GNDE15
GNDE21
GNDANAF5
GNDF17
GNDANAG5
GNDUTMI G7
GNDG11
GNDG15
GNDG17
GNDIN33 H1
GNDH8
GNDH14
GNDH21
GNDANAJ4
GNDJ18
GNDL1
GNDL15
GNDL21
GNDN18
GNDP14
GNDP21
GNDBAT R11
GNDR17
GNDT17
GNDU21
GNDV13
GNDAA14
GNDAA17
GNDAA21
GNDA21
VDDCORE
U16
VDDCORE
U17
VDDCORE
F6
VDDUTMI
C5
VDDUTMI
C8
VDDUTMI
F7 VDDUTMI
E3
VDDUTMI
B2
VDDANA
E5
VDDANA
E6
VDDCORE
L3
VDDSDMMC1
C11
VDDSDMMC2
F13
VDDIOP0
T13
VDDIOP0
W14
VDDDPHY
T15
VDDDPHY
T16 GNDDPHYR15
GNDDPHYU15
VDDCORE
W17
VDDCORE
Y20
GNDK11
U4H
4.7uF10V0402
C30
4.7uF10V0402
C62
4.7uF10V0402
C45
VDD_3V3_MPU
VDDSDMMC1
VDDSDMMC0
VDD_3V3_MPU
3.2.2 Configuration and Control
This figure shows the main block for processor configuration and control.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 16

Figure 3-10. Processor Main Configuration and Control
USBA_N
USBA_P
USBB_N
USBB_P
USBC_N
USBC_P
MIPI_CK_N
MIPI_CK_P
MIPI_D0_N
MIPI_D0_P
MIPI_D1_N
MIPI_D1_P
nRST
WKUP
SHDN
LPM
DIFF100
DIFF100
DIFF100
DIFF100
DIFF100
DIFF100
USBB_CC2
GND
0.1uF
16V
0201
C48
VDDANA
GND
USBB_CC1
GND
GND
nRST_OUT
VDDBU
XIN32
XOUT32
XIN
XOUT
MPU configuration
4.02k
0201 1%
R33
200R
0201 1%
R28
200R
0201 1%
R27
200R
0201 1%
R23
16.9k02011%
R29
20k02011%
R30
20k02011%
R31
16.9k02011%
R32
0402
R26
0402
R25
XIN
J2
XOUT
J1
XIN32
Y13
XOUT32
AA13
SHDN
R9
WKUP0
AA15
JTAGSEL
W15
NRST
J7
TST
AA9
QSPI0_CAL
P16
AUDIOCLK
K7
ADVREFP
G6
HHSA_CC1D7
HHSA_CC2G9
MIPI_CLK_PN21
MIPI_CLK_N N20
MIPI_D0_N R18
MIPI_D1_N R20
MIPI_D0_PP18
MIPI_D1_PR21
MIPI_REXTR19
HHSA_DMB3
HHSA_DPA3
HHSA_RTUNE C6
HHSB_CC1 C7
HHSB_CC2 E8
HHSB_DM B4
HHSB_DPA4
HHSB_RTUNE D8
HHSC_DM B6
HHSC_DPA6
HHSC_RTUNE B7
NRST_OUT
H4
SDMMC0_CAL
K15
SDMMC1_CAL
J10
SDMMC2_CAL
D14
LPM
R10
SAMA7G54
U4G
10k
0402 1%
R24
VDD_3V3
DIFF90
DIFF90
DIFF90
DIFF90
DIFF90
DIFF90
TP14
TP15
VDDSDMMC0
VDDSDMMC1
90Ω±15% differential trace impedance
Routing top or bottom
90Ω±15% differential trace impedance
Routing top or bottom
90Ω±15% differential trace impedance
Routing top or bottom
100Ω±10% differential trace impedance
Routing top or bottom
Table 3-4. Processor Main Configuration and Control Pins
Pin Name Type Used for
XIN Input Main clock oscillator input
XOUT Output Main clock oscillator output
XIN32 Input Slow clock oscillator input
XOUT32 Output Slow clock oscillator output
NRST Input Processor main reset input
NRST_OUT Output Processor reset output
TST Input Reserved for processor manufacturing tests
JTAGSEL Input When pulled high enables the JTAG boundary scan
SHDN Output Signal used to enable and disable an external power supply circuit
LPM Output Signal used to enable and disable the PMIC Low-Power mode
WKUP0 Input Event detection input pin used to wake up the processor from Shutdown
state
QSPI0_CAL Input QSPI calibration
SDMMC0_CAL Input SDMMC0 calibration
SDMMC1_CAL Input SDMMC1 calibration
SDMMC2_CAL Input SDMMC2 calibration
AUDIOCLK Output Audio clock output
ADVREFP Input Voltage reference for the embedded analog comparator
HHSx_Dx I/O Three USB ports embedded inside the MPU
HHSx_RTUNE Input USB external tuning
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 17

...........continued
Pin Name Type Used for
MIPI_CLK_[P-N] Input MIPI differential input clock lanes
MIPI_DP[0-1] Input MIPI differential input data lanes
MIPI_REXT Input MIPI calibration
3.2.3 Clock Circuitry
The embedded MPU generates the required clocks based on two oscillators: one slow clock (SLCK) oscillator
running at 32.768 kHz and one main clock oscillator running at 24 MHz.
3.2.3.1 Main Clock Circuitry
The main clock oscillator is implemented with a MEMS (Micro Electro-Mechanical System) device DSC1001.
For evaluation purposes, the user can mount a crystal instead of the MEMS, using the PCB footprint reservation (Y3).
In that case, remove resistors R34 and R36, populate resistors R37 and R40 and populate capacitors C76 and C81
with the appropriate load capacitance for the selected crystal.
Figure 3-11. Processor Main Clock Schematic
GND
GND
XIN
VDD_3V3
XOUT
GND
XIN
24MHz clock
24MHz 18pF
ABM8G-24.000MHZ-18-D2Y-T
Y3
24MHz
STB 1
GND
2OUT 3
VDD
4
Y2
20pF
0402
C76
20pF
0402
C81
0.1uF
10V
0402
C64
51R
0402 1%
R34
0402
R37
0402
R40
XIN_24M
XOUT_24M
1M
0402
1%
R39
0402
R36
XOUT
GND
TP16
OSC_STBY
3.2.3.2 Slow Clock Circuitry
The slow clock oscillator is implemented with a NX2012SA-32.768K crystal device.
For evaluation purposes, the user can mount instead a MEMS (Micro Electro-Mechanical System
DSC6003MA3B-032K768), using the PCB footprint reservation (Y4). In that case, remove crystal Y1 and capacitors
C66 and C72, and populate resistor R38 and capacitor C77 with the appropriate MEMS (Y4).
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 18

Figure 3-12. Processor Slow Clock Schematic
32.768kHz
NX2012SA-32.768K-STD-MUB-1
Y1
GND
GNDXIN32
XOUT32
18pF
50V0402
C72
18pF
50V0402
C66
32.768KHz clock
1M
0402
1%
R35
32.768KHz
STB 1 GND
2
OUT 3 VDD
4
Y4
0.1uF
10V
0402
C77
GND
VDD_3V3
0402
R38
XIN32
VDD_3V3
3.2.4 DDR Controller
The SAMA7G5 MPU embeds a Universal DDR Memory Controller (UDDRC) to drive the DDR2, DDR3, LPDDR2 and
LPDDR3 memories.
The following figure shows the UDDRC controller schematic and controller layout recommendations.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 19

Figure 3-13. Processor UDDRC Controller
DDR_RESET
DDR_ZQ
DDR_DQM0
DDR_VREF
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_DQM1
DDR_DQS0_P
DDR_DQS0_N
DDR_DQS1_P
DDR_DQS1_N
i
LANE0
Matched Net Lengths [Tolerance = 10mil]
i
LANE1
Matched Net Lengths [Tolerance = 10mil]
240R 02011%
R105
0.1uF
16V
0201
C103
GND
GND
100k 02011%
R104
VDDIODDR
DDR_A0
DDR_BA0
DDR_ODT
DDR_CK_P
DDR_CK_N
DDR_CKE
DDR_WE
DDR_CS
i
ADDR-CTL Matched Net Lengths [Tolerance = 10mil]
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_A14
DDR_A15
DDR_BA1
DDR_BA2
DDR_RAS
DDR_CAS
GND
VDDIODDR
0.1uF16V0201
C104
0.1uF16V0201
C105
0.1uF16V0201
C106
0.1uF16V0201
C107
0.1uF16V0201
C108
0.1uF16V0201
C109
0.1uF16V0201
C111
0.1uF16V0201
C112
0.1uF16V0201
C113
0.1uF16V0201
C115
0.1uF16V0201
C116
0.1uF16V0201
C117
0.1uF16V0201
C119
0.1uF16V0201
C120
4.7uF10V0402
C122
GND
DIFF100
DIFF100
DIFF100
DIFF100
DIFF100
DIFF100
SAMA7G5 DDR3-1066 controller
(1V35)
(1V35)
0.1uF16V0201
C121
DDR_A0
W6
DDR_A1
P6
DDR_A2
V5
DDR_A3
V6
DDR_A4
R6
DDR_A5
W4
DDR_A6
P7
DDR_A7
W2
DDR_A8
L8
DDR_A9
V4
DDR_A10
T3
DDR_A11
M9
DDR_A12
P5
DDR_A13
V2
DDR_BA0
V8
DDR_BA1
P4
DDR_BA2
R8
DDR_RAS#
U8
DDR_CAS#
T8
DDR_CLK_P
U4
DDR_CLK_N
T4
DDR_CKE
V3 DDR_CS#
V7
DDR_WE#
N10
DDR_ZQ AA2
DDR_RESET# V1
DDR_D0 N2
DDR_D1 M7
DDR_D2 R3
DDR_D3 M8
DDR_D4 T2
DDR_D5 N8
DDR_D6 T1
DDR_D7 N7
DDR_D8 Y7
DDR_D9 AA4
DDR_D10 Y9
DDR_D11 Y3
DDR_D12 AA7
DDR_D13 AA3
DDR_D14 W7
DDR_D15 W3
DDR_DQM0 N1
DDR_DQM1 Y4
DDR_DQS0_P R1
DDR_DQS0_N R2
DDR_DQS1_P Y6
DDR_DQS1_N AA6
DDR_ODT
W1
DDR_VREF Y1
DDR_A14
L9
DDR_A15
R4
GNDIODDR L7
GNDIODDR L11
GNDIODDR N4
GNDIODDR P1
GNDIODDR P8
GNDIODDR R5
GNDIODDR R7
GNDIODDR T5
GNDIODDR U1
GNDIODDR U7
GNDIODDR V9
GNDIODDR AA1
VDDIODDR
AA5 GNDIODDR AA8
GNDIODDR AA11
VDDIODDR
N6
VDDIODDR
N9
VDDIODDR
P3
VDDIODDR
T6
VDDIODDR
T7
VDDIODDR
T9
VDDIODDR
U3
VDDIODDR
U5
VDDIODDR
U6 GNDIODDR W5
VDDIODDR
Y2
VDDIODDR
N12
VDDIODDR
P13
VDDIODDR
W8
VDDIODDR
M11
SAMA7G54
U4F
SAMA7G54
100Ω±10% differential trace impedance
Routing top orbottom
50Ω± 10% single-ended trace impedance
Routing top orbottom
100Ω±10% differential trace impedance
Routing top orbottom
50Ω± 10% single-ended trace impedance
Routing top orbottom
50Ω± 10% single-ended trace impedance
Routing top orbottom
100Ω±10% differential trace impedance
Routing top orbottom
RZQ: calibration capability for on-die
terminations and driver output impedances
The UDDRC I/Os embed an automatic impedance matching control to avoid overshoots and to reach the best
performance levels depending on the bus load and external memories. A serial termination connection scheme,
where the driver has an output impedance matched to the characteristic impedance of the line, is used to improve
signal quality and reduce EMI. This is done using the ZQ calibration procedure to calibrate the SAMA7G5 DDR
I/O drive strength. The pin name where the ZQ resistor must be connected is DDR_ZQ, and as indicated in the
SAMA7G5 Series data sheet for the DDR3L case, the resistor value is 240 Ohms.
The DDR_VREF pin serves as a voltage reference input for the DDR I/Os when DDR or LPDDR external SDRAM
memories are used.
SAMA7G54-EK
Function Blocks
© 2022 Microchip Technology Inc.
and its subsidiaries
User Guide DS50003273A-page 20