National Semiconductor ADC16DV160HFEB User manual

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National Semiconductor
June 16, 2010
Rev 1.0
ADC16DV160HFEB
Evaluation Board User’s Guide
ADC16DV160 Dual 16-Bit, 160 MS S A/D Converter
© 2009 National Semiconductor Corporation.

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Table of Contents
1.0 Introduction ......................................................................................................................................... 3
2.0 Board ssembly ................................................................................................................................... 3
3.0 Quick Start ........................................................................................................................................... 4
4.0 Functional Description ......................................................................................................................... 4
4.1 nalog Input .......................................................................................................................... 4
4.2 DC reference circuitry ........................................................................................................ 4
4.3 DC clock circuit .................................................................................................................. 5
4.4 Power Supply Connections .................................................................................................... 5
5.0 Installing the DC16DV160 Evaluation Board .................................................................................. 5
6.0 Hardware Schematic ............................................................................................................................ 6
7.0 Evaluation Board Layout ..................................................................................................................... 7
8.0 Evaluation Board Bill of Materials ...................................................................................................... 10

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1.0 Introduction
This Evaluation Board may be used to evaluate the
ADC16D 160. The ADC is a dual 16 bit analog to digital
converters that provides data at rates of up to 160 MHz.
The evaluation board is designed to be used with the
Wave ision5™ Data Capture Board which is connected
to a personal computer through a USB port and running
Wave ision5™ software, operating under Microsoft
Windows. The software can perform an FFT on the
captured data upon command and, in addition to a
frequency domain plot, shows dynamic performance in
the form of SNR, SINAD, THD SFDR and ENOB. The
latest Wave ision software is available through the
National Semiconductor website:
http://www.national.com/analog/adc/wavevision5
2.0 Board Assembly
The ADC16D 160 Evaluation Board comes pre-
assembled. Refer to the Bill of Materials in Section 8 for
a description of components, to Figure 1 for major
component placement and to Section 6 for the
Evaluation Board schematic.
J2
Input I
J3
Input Q
Wavevision
Connector
P1
3.0
P4
3.0
P2
1.8
P3
1.8
J4
Clock
Input
U2
ADC16D 160
Figure 1. Major Component Locations

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Figure 2: Test Set Up
3.0 Quick Start
Refer to Figure 1 for locations of jumpers, test points and
major components. Refer to Figure 2 for the test set up.
The latest Wave ision software is available through the
National Semiconductor website:
http://www.national.com/analog/adc/wavevision5.
If a software CD is included with the evaluation board kit,
then use the provided software and instructions to install
Wave ision and ensure compatibility with this evaluation
board.
1. Apply power to the Wave ision5™ board and
connect it to the computer using a USB cable. See
the Wave ision5™ User Guide for operation of that
board. Connect the evaluation board to the
Wave ision5™ Data Capture Board. NOTE: power
to the WaveVision5 Data Capture Board should
be applied before power to the ADC16DV160
Evaluation Board to insure that the F GA on the
WaveVision5 Data Capture Board is not
damaged.
2. Connect a clean +3.0 power supply to Power
Connectors P1 and P4. Connect a clean +1.8
power supply to Power Connectors P2 and P3.
3. Connect a 160 MHz signal from a 50-Ohm source to
connector J4 for the input Clock. Be sure to use a
bandpass filter before the Evaluation Board. Set the
amplitude to 18 dBm.
4. Connect a signal from a 50-Ohm source to
connector J2 (I Channel) or J3 (Q-Channel). Be sure
to use a bandpass filter before the Evaluation Board.
For best results, also attach a 3dB 50 ohm
attenuator right at the input SMA of the eval board.
This will help match the impedance between the
cables/signal source to the eval board input.
5. Adjust the input signal amplitude as needed to
ensure that the signal does not over-range by
examinining a histogram of the output data with the
Wave ision™ software.
4.0 Functional Description
The ADC16D 160 Evaluation Board schematic is shown
in Section 6. A list of test points and jumper settings can
be found in the Appendix.
4.1 Analog Input
To obtain the best distortion results the analog input
network must be optimized for the signal frequency being
applied. The ADC16D 160 Evaluation Board comes
configured for input frequencies greater than 70MHz. To
accurately evaluate the dynamic performance of this
converter, the input test signal will have to be passed
through a high-quality bandpass filter.
4.2 ADC reference circuitry

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This Evaluation Board is configured to use the internal
reference.
4.3 ADC clock circuit
Care must be taken to provide a high quality low jitter
clock source. The board is configured to accept a single
ended sinusoidal. It converts the sine wave to a
differential signal through transformer T4. Refer to the
schematic for more detail.
4.4 ower Supply Connections
Power is applied to the board through power connectors
P1 – P4. Care must be taken to observe the correct
polarity.
5.0 Installing the ADC16DV160 Evaluation Board
The evaluation board requires a dual power supplies as
described in Section 4.4. NOTE: power to the
WaveVision5 Data Capture Board should be applied
before power to the ADC16DV160 Evaluation Board
to insure that the F GA on the WaveVision5 Data
Capture Board is not damaged. A low noise sinusoidal
signal source should be connected to the Clock Input
SMA connector J4. An appropriate signal source should
be connected to the Signal Input SMA connector J2.
When evaluating dynamic performance, an appropriate
signal generator (such as R&S SMA-100A) with 50 Ohm
source impedance should be connected to the Analog
Input connector through an appropriate bandpass filter as
even the best signal generator available can not produce
a signal pure enough to evaluate the dynamic
performance of an ADC.
If this board is used in conjunction with the the
Wave ision5™ Data Capture Board and Wave ision5™
software, a USB cable must be connected between the
Data Capture Board and the host. See the
Wave ision5™ Data Capture Board manual for details.

6 http://www.national.com
6.0 Hardware Schematic
R10
0
1 2
C16
0.01u
12
C15
0.1u
12
D8/9-I
T1
BD0205F5050A00
UNBALANCED
1
NC
2
GND/DIFF_IN
3
GND4
4
GND5
5
BALANCED_PORT_1 6
BALANCED_PORT_2 8
DC_BIAS/NC 7
GND9 9
GND10 10
U3
24C02-SO8
A0
1
A1
2
A2
3
GND
4
SDA 5
SCL
6
WP
7
CC 8
C23
0.1u
1 2
D0/1-I
R14
0
1 2
R7
24.9
1 2
A3.0
C21
22p
12
DR1.8
R31
100
1 2
R12
0
1 2
C97
0.1u
1 2
P1
A3.0
A3.0 1
GND_1 2
P4
AD3.0
AD3.0 1
GND_4 2
C82 1u
12
P3
DR
DR1.8 1
GND_3 2
U4
FIN1108MTD
GND
1GND1
2EN12
3RIN1-
4RIN1+
5RIN2+
6RIN2-
7RIN3-
8RIN3+
9RIN4+
10 RIN4-
11 CC1
12 EN
13 RIN5-
14 R1N5+
15 RIN6+
16 RIN6-
17 RIN7-
18 RIN7+
19 RIN8+
20 RIN8-
21 EN34
22 GND2
23 BB
24
CC5 48
CC4 47
EN78 46
DOUT1- 45
DOUT1+ 44
DOUT2+ 43
DOUT2- 42
DOUT3- 41
DOUT3+ 40
DOUT4+ 39
DOUT4- 38
GND4 37
GND3 36
DOUT5- 35
DOUT5+ 34
DOUT6+ 33
DOUT6- 32
DOUT7- 31
DOUT7+ 30
DOUT8+ 29
DOUT8- 28
EN56 27
CC3 26
CC2 25
TP411
R37
DNP
1 2
DIR
JP2
OUTCLK
11 22
C34 0.1u
12
+
C38 10uF
12
C88
0.1u
1 2
D10/11-I
U5
FIN1108MTD
GND
1GND1
2EN12
3RIN1-
4RIN1+
5RIN2+
6RIN2-
7RIN3-
8RIN3+
9RIN4+
10 RIN4-
11 CC1
12 EN
13 RIN5-
14 R1N5+
15 RIN6+
16 RIN6-
17 RIN7-
18 RIN7+
19 RIN8+
20 RIN8-
21 EN34
22 GND2
23 BB
24
CC5 48
CC4 47
EN78 46
DOUT1- 45
DOUT1+ 44
DOUT2+ 43
DOUT2- 42
DOUT3- 41
DOUT3+ 40
DOUT4+ 39
DOUT4- 38
GND4 37
GND3 36
DOUT5- 35
DOUT5+ 34
DOUT6+ 33
DOUT6- 32
DOUT7- 31
DOUT7+ 30
DOUT8+ 29
DOUT8- 28
EN56 27
CC3 26
CC2 25
D0/1+I
CC
C63
0.1u
1 2
GND_TP2
1
1
C70
0.01u
12
U6
FIN1101K8X
RIN-
1
GND
2
EN
3
GND1
4
RIN+ 8
CC 7
DOUT+ 6
DOUT- 5
U7
SN74A C8T245
CCA
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND1
11
GND2
12
CCB1 24
CCB2 23
OE 22
B1 21
B2 20
B3 19
B4 18
B5 17
B6 16
B7 15
B8 14
GND3 13
AD3.0
TP5
1
1
JP3
D0/1
11 22
R21
10
1 2
A1.8
C9
0.1u
12
GND_TP3
1
1
GND2
D12/13-I
C28
0.1u
1 2
TP1
TestPoint
1
1
Title
Size Document Number Rev
Date: Sheet of
1C
1 1Wednesday, May 19, 2010
+
C54
10uF
12
C55
0.1u
12
AD3.0
R45
DNP
12
SDIO
R43
0
1 2
C69
0.1u
12
C96
DNP
1 2
GND_TP4
1
1
DR1.8
C49
0.1u
12
C86
0.1u
12
U8
SN74A C8T245
CCA
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND1
11
GND2
12
CCB1 24
CCB2 23
OE 22
B1 21
B2 20
B3 19
B4 18
B5 17
B6 16
B7 15
B8 14
GND3 13
C84
0.1u
12
J2
INPUT_I
1
2
3
4
5
GND2
+
C60
10uF
12
C61
0.1u
12
R33 100
1 2
RNIRPI
C90
DNP
1 2
RN1
RN_753-08
1
3
5
7 8
6
4
2D4/5-I
GND2
D0/1-Q
D0/1+Q
C26
0.01u
12
C25
0.1u
12
+5
C36
0.1u
12
RN2
RN_753-08
1
3
5
7 8
6
4
2
AD3.0
R38
0
1 2
GND_TP1
1
1
C4
0.01u
12
C3
0.1u
12
C85
0.1u
12
RN3
RN_753-08
1
3
5
7 8
6
4
2
DR1.8
+
C64
10uF
1 2
D2/3-I
R34
0
12
GND2
J1
Connector Future Bus Header96
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
A11
A11
A12
A12
A13
A13
A14
A14
A15
A15
A16
A16
A17
A17
A18
A18
A19
A19
A20
A20
A21
A21
A22
A22
A23
A23
A24
A24
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
B10
B11
B11
B12
B12
B13
B13
B14
B14
B15
B15
B16
B16
B17
B17
B18
B18
B19
B19
B20
B20
B21
B21
B22
B22
B23
B23
B24
B24
C1
C1
C2
C2
C3
C3
C4
C4
C5
C5
C6
C6
C7
C7
C8
C8
C9
C9
C10
C10
C11
C11
C12
C12
C13
C13
C14
C14
C15
C15
C16
C16
C17
C17
C18
C18
C19
C19
C20
C20
C21
C21
C22
C22
C23
C23
C24
C24
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
D8
D8
D9
D9
D10
D10
D11
D11
D12
D12
D13
D13
D14
D14
D15
D15
D16
D16
D17
D17
D18
D18
D19
D19
D20
D20
D21
D21
D22
D22
D23
D23
D24
D24
C27
0.1u
1 2
C29
0.01u
1 2
GND2
RN4
RN_753-08
1
3
5
7 8
6
4
2
C40
0.01u
12
C10
0.1u
12
C76
0.1u
12
National Semiconductor
C32
0.1u
1 2
AD3.0
D14/15-I
C35
33p
1 2
AD3.0
GND2_TP1
1
1
GND2_TP2
1
1
C41
0.1u
12
C11
0.01u
12
C62
0.1u
1 2
C83 1u
12
C6
0.1u
12
OUTCLK+
C24
0.1u
1 2
+3.3
CLK+
C43
0.01u
12
C19
0.1u
12
T2
BD0205F5050A00
UNBALANCED
1
NC
2
GND/DIFF_IN
3
GND4 4 GND5 5
BALANCED_PORT_1 6
BALANCED_PORT_2 8
DC_BIAS/NC 7
GND9
9
GND10
10
GND2
C13
10p
1 2
OUTCLK-
R42
0
1 2
GND2
C51
0.1u
12
C8
0.01u
12
CLK-
RNQ
RPQ
C46
0.1u
12
C20
0.01u
12
L1
DNP
GND2
GND2
C7
10p
12
R40
DNP
12
R41
0
12
C94
DNP
12
L2
DNP
C95
DNP
12
R39
DNP
12
R25
0
1 2
R18
24.9
1 2
C31
0.1u
12
C33
22p
1 2
C79 0.1u
12
+
C78
10uF
12
R22
10
12
J3
INPUT_Q
1
2
3
4
5
C58
0.1u
1 2
C53
10p
1 2
C52
10p
12
R13
24.9
12
C56
0.1u
12
C47
0.1u
12
R20
49.9
DNP
1 2
R9
0
1 2
C89
DNP
1 2
C87
0.1u
12
C91
DNP
1 2
C68
0.01u
12
C65
0.1u
12
RPI
C30
0.1u
1 2
JP1
D14/15
1
1
2
2
DR1.8
R5
24.9
12
C77
0.1u
12
C67 0.1u
1 2
GND2
GND2
SDA
T4
ADT1_1WT
1 6
2
3
5
4
R35
0
1 2
A3.0
A3.0
C80
0.1u
1 2
R44
DNP
12
D12/13+I
D10/11+I
D8/9+I
D6/7+I
D14/15+I
D2/3+I
D4/5+I
C92
0.1u
1 2
J4
CLK_DIFF
1
2
3
4
5
C1
0.1u
12
C2
0.01u
12
GND2
AD3.0
CSB
ADC16DV160HFEB Evaluation Board
AD3.0
C17
0.1u
1 2
SCLK
U2
ADC16DV160
A1.8_1
1
RMI
2
AGND_3
3
A3.0_4
4
RNI
5
RNI_6
6
RPI
7
RPI_8
8
REF
9
RPQ
10
RPQ_11
11
RNQ
12
RNQ_13
13
A3.0_14
14
AGND
15
RMQ
16
A1.8_17
17
AGND_18
18
IN-Q
19
IN+Q
20
AGND_21
21
A3.0_22
22
SCLK
23
SDI
24
CLK-
25
CLK+
26
CSB
27
D0/1+Q
28
D0/1-Q
29
D2/3+Q
30
D2/3-Q
31
D4/5+Q
32
D4/5-Q
33
D6/7+Q
34
D10/11-I 51
D10/11+I 50
D12/13-I 49
D12/13+I 48
D14/15-I 47
D14/15+I 46
OUTCLK- 45
OUTCLK+ 44
D14/15-Q 43
D14/15+Q 42
D12/13-Q 41
D12/13+Q 40
D10/11-Q 39
D10/11+Q 38
D8/9-Q 37
D8/9+Q 36
D6/7-Q 35
68_AGND 68
IN-I 67
IN+I 66
65_AGND 65
64_ A3.0 64
DRGND 63
DR1.8 62
D0/1-I 61
DO/1+I 60
D2/3-I 59
D2/3+I 58
D4/5-I 57
D4/5+I 56
D6/7-I 55
D6/7+I 54
D8/9-I 53
D8/9+I 52
GND69
69
GND70
70
C12
0.1u
1 2
C81
0.1u
12
C14
0.01u
1 2
A3.0
D10/11-Q
D8/9-Q
C59
0.1u
12
D8/9+Q
D14/15-Q
D2/3-Q
D4/5-Q
D12/13-Q
D14/15+Q
D2/3+Q
D4/5+Q
D12/13+Q
D10/11+Q
D6/7-Q
D6/7+Q
C66
0.1u
12
SCL
SDIO
TP211
R6
49.9
DNP
12
A1.8
+
C48
10uF
12
A3.0
+
C50
10uF
12
A1.8
P2
A1.8
A1.8 1
GND_2 2
SDIO
D6/7-I
AD3.0
C37
0.1u
12
C71
0.1u
1 2
RPQ RNQ
+
C72
10uF
1 2
C74
0.1u
12
C73
0.1u
1 2
C75
0.1u
12
C93
0.1u
1 2
SCLK
TP3
1
1
RNI
R36
DNP
1 2
R3
0
1 2
CSB

7 http://www.national.com
7.0 Evaluation Board Layout
Layer 1: Component Side
Layer 2: Ground

8 http://www.national.com
Layer 3: Power
Layer 4: Ground, Clock

9 http://www.national.com
Layer 5: Ground
Layer 6: Circuit Side

10 http://www.national.com
8.0 Evaluation Board Bill of Materials
Item Quantity Reference Part Manufacturer Manufacturer P/N
______________________________________________
1 11 C1,C3,C6,C12,C15,C25,C27, 0.1u Murata GRM033R60J104KE19D
C34,C79,C86,C87
2 13 C2,C4,C8,C11,C14,C16,C20, 0.01u Murata GRM155R71H103KA88D
C26,C29,C40,C43,C68,C70
3 4 C7,C13,C52,C53 10p Murata GRM1555C1H100JZ01D
4 12 C9,C17,C23,C28,C31,C32, 0.1u Murata GRM188R71C104KA01D
C37,C49,C51,C55,C58,C61
5 30 C10,C19,C24,C30,C36,C41, 0.1u Murata GRM155R61A104KA01D
C46,C47,C56,C59,C62,C63,
C65,C66,C67,C69,C71,C73,
C74,C75,C76,C77,C80,C81,
C84,C85,C88,C92,C93,C97
6 2 C21,C33 22p Murata GRM1555C1H220JZ01D
7 1 C35 33p Murata GRM1555C1H330JZ01D
8 4 C38,C64,C72,C78 10uF N ch con F931A106MAA
9 4 C48,C50,C54,C60 10uF AVX TAJC106K020R
10 2 C82,C83 1u Panason c ECY-29RA105KV
13 6 GND_TP1,GND_TP2,GND_TP3, TestPo nt Keystone 5002
GND_TP4,GND2_TP1,
GND2_TP2
17 1 NSC J1 Connector Future Bus Header96 Tyco Electron cs 5223514-3
18 1 J2 INPUT_I Johnson 142-0701-851
19 1 J3 INPUT_Q Johnson 142-0701-851
20 1 J4 CLK_DIFF Johnson 142-0701-851
22 1 P1 VA3.0 Phoen x Contacts 1759017
23 1 P2 VA1.8 Phoen x Contacts 1759017
24 1 P3 VDR Phoen x Contacts 1759017
25 1 P4 VAD3.0 Phoen x Contacts 1759017
26 4 RN1,RN2,RN3,RN4 RN_753-08 CTS Res stor 753083101GTR
27 10 R3,R9,R10,R25,R34,R35, 0 Yageo RC0402JR-070RL
R38,R41,R42,R43
28 4 R5,R7,R13,R18 24.9 Panason c - ECG ERJ-2RKF24R9X
30 2 R12,R14 0 Yageo RC0603JR-070RL
31 2 R21,R22 10 Panason c - ECG ERJ-3EKF10R0V
32 2 R31,R33 100 Panason c - ECG ERJ-2RKF1000X
37 2 NSC T1,T2 BD0205F5050A00 Anaren BD0205F5050A00
38 1 T4 ADT1_1WT M n -C rcu ts ADT1-1WT+
39 1 NSC U2 ADC16DV160 Nat onal Sem conductor ADC16DV160
40 1 U3 24C02-SO8 Atmel AT24HC02BN-SH-B
41 2 U4,U5 FIN1108MTD Fa rch ld FIN1108MTD
42 1 U6 FIN1101K8X Fa rch ld FIN1101K8X
43 2 U7,U8 SN74AVC8T245 Texas Instuments SN74AVC8T245DGVR