National Semiconductor LMX2531LQ1312E User manual

LMX2531LQ1312E
Evaluation Board Operating Instructions
National Semiconductor Corporation
Timing Devices Business Group
10333 North Meridian
Suite 400
Indianapolis, IN 46290
LMX2531LQ1312EFPEB Rev 4.02.2008

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Table of Contents
TABLE OF CONTENTS ................................................................................................................................... 2
LOOP FILTER ................................................................................................................................................ 3
QUICK SETUP ............................................................................................................................................... 3
TROUBLESHOOTING ..................................................................................................................................... 4
PHASE NOISE ............................................................................................................................................... 5
FREE-RUNNING VCO NOISE (INTERNAL DIVIDE BY 2 DISABLED)............................................................... 6
FREE-RUNNING VCO NOISE (INTERNAL DIVIDE BY 2 ENABLED)................................................................ 7
FRACTIONAL SPURS (INTERNAL DIVIDE BY 2 DISABLED)............................................................................ 8
FRACTIONAL SPURS (INTERNAL DIVIDE BY 2 ENABLED)............................................................................. 9
INTEGER SPURS (INTERNAL DIVIDE BY 2 ENABLED).................................................................................. 10
INTEGER SPURS (INTERNAL DIVIDE BY 2 ENABLED).................................................................................. 11
CODELOADER SETTINGS ............................................................................................................................ 12
SCHEMATIC ................................................................................................................................................ 17
BILL OF MATERIALS................................................................................................................................... 18
TOP LAYER ................................................................................................................................................ 19
MID LAYER 1 "GROUND PLANE"............................................................................................................... 20
MID LAYER 2 "POWER"............................................................................................................................. 21
BOTTOM LAYER "SIGNAL"......................................................................................................................... 22
TOP BUILD DIAGRAM................................................................................................................................. 23
2

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Loop Filter
Loop Bandwidth 7.7 kHz Kφ1440 uA (16X)
Phase Margin 61.5 deg Fcomp 10 MHz
Crystal Frequency 10 MHz Output Frequency 1268 – 1360 MHz (DIV2=0)
634 - 680 MHz (DIV2=1)
Supply Voltage 3.0 Volts VCO Gain 3 - 6 MHz/Volt
VCO
CPout
open
100 nF
1KΩ
100 pF 100 pF
20 KΩ20 KΩ
Vtune
Quick Setup
• Install the CodeLoader software which is available at www.national.com/timing.
• Attach the parallel or USB to parallel, port cable to the computer and the evaluation board.
• Connect 3.0 volts to the Vcc connector
• Connect the Fout connector to a spectrum analyzer or phase noise analyzer
• Connect a clean 10 MHz source to the OSCin pin. Typically, the 10 MHz output from the back
of the RF test equipment is a good source. Signal generators tend to be very noisy and should
be used with caution. If a signal generator is used, the signal generator phase noise
contribution can be reduced by setting the signal to 80 MHz and dividing this down to a phase
detector frequency of 10 MHz.
• Set up the CodeLoader software
o Select the proper part from the menu as Select Part>PLL+VCO>LMX2531LQ1312E
o Select the proper mode from the Mode menu
o Load the part by pressing (Ctrl+L) or selecting Keyboard Controls->Load Device from
the menu
• It is recommended to ensure proper communication with the device
o Click the REG_RST bit on the bits/pins page and observe the current go to 0 mA
o Unclick the REG_RST bit AND press (Ctrl+L). The current should be approximately
35 mA
o If device does not respond to this, consult the troubleshooting section
• When using the lower frequency band with divide by 2 enabled (DIV2=1), be aware that the
frequency programmed to the VCO is actually twice the output frequency of the device
because the VCO frequency is being divided by 2.
3

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Troubleshooting
Problem Corrective Actions
Software does not communicate with the evaluation boards
All Modes
• Ensure a valid signal is presented to the OSCin connector. If a signal generator is
used, ensure the RF is ON.
• Consult the CodeLoader instructions for more detailed information on communication
issues. (See www.national.com/timing)
LPT Mode (Uses Parallel Port Cable)
• Ensure that CodeLoader is selected to LPT mode on the Port Setup tab.
• Ensure the proper port number is selected (LPT1, LPT2, LPT3). CodeLoader does
NOT automatically detect this.
• Ensure the LPT cable is securely connected to the computer and board.
• Try to exit and restart CodeLoader.
• Ensure the parallel port is in the correct mode
o Windows often requires administrative access to write to the parallel port.
o Ensure that the parallel port is set to “Enabled” in windows device manager.
o A reboot upon installation of CodeLoader is sometimes necessary to get the
parallel port to work.
o Standard mode is the most reliable. This can be set in the BIOS mode of the
computer as “Normal”, “Output Only”, or “AT”.
USB Mode (USB to Parallel Port Converter)
• On the menu, select USB>Version to verify communication with the board.
• Ensure the Green LEDs are lit on the USB board.
• Ensure there are no conflicts with other USB devices and reinstall the board.
P
ar
t
respon
d
s
t
o
programming, but does not lock to
he correctt
frequency
• Ensure there is a valid signal presented to the OSCin connector. If a signal generator is
used, the RF should be set to ON.
• If using the lower frequency band (DIV2=1), understand that the VCO frequency in
CodeLoader should be twice the frequency at the Fout pin.
• Ensure that the VCO FREQUENCY CAL bits on the Bits/Pins tab are correct.
• Ensure the loop filter is optimized if the charge pump current, phase detector frequency,
or loop filter values have been changed from their original settings. Ensure the
integrated loop filter components on CodeLoader are set to their proper settings.
Cl
ose-
i
n p
h
ase
noise is worse than evaluation board
inst
ructions show
• Ensure the signal presented to OSCin connector is clean. Try another source, or if it is
a signal generator, try using a higher frequency and dividing it down to the phase
detector frequency.
• Ensure the OSCin signal and cable provides sufficient power level.
• If the phase detector frequency or charge pump current is lowered from their original
settings, the in-band phase noise can be degraded, even if the loop filter is re-designed
for the same loop bandwidth. If the loop bandwidth is decreased, in-band phase noise
can be degraded.
F
a
r
-ou
t
Ph
ase
noise is worse than evaluation board
instructions show
• Ensure the measurement equipment noise floor is not limiting the measurement. For
spectrum analyzers, the noise floor at a particular setting can be measured by removing
the RF input signal.
• If the settings are changed from what the board was designed for, ensure the delta-
sigma modulator is not increasing the far-out noise. To know this, tune to an integer
channel and set the ORDER bit to “Reset Modulator”. The far-out phase noise should
not decrease. If it does, try a loop filter with more attenuation or select a lower order
delta-sigma modulator.
4

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Phase Noise
Output Frequency = 1314 MHz
Internal Divide by 2 Disabled (DIV2=0)
Output Frequency = 657 MHz
Internal Divide by 2 Enabled (DIV2=1)
5

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Free-Running VCO Noise (Internal Divide by 2 Disabled)
Fout = 1268 MHzFout = 1314 MHzFout = 1360 MHz
The plots to the left show the
true phase noise capability of
the VCO. In order to take
these plots, the E5052 phase
nose analyzer was used. The
method was to lock the PLL to
the proper frequency, then
disable the EN_PLL,
EN_PLLLDO1, and
EN_PLLLDO2 bits. The
equipment needs to be able to
track the VCO phase noise to
measure in this way, and one
can not let the VCO drift too
far off in frequency. If this kind
of equipment is not available,
the VCO phase noise can also
be measured by making a
very narrow loop bandwidth
filter.
On the 1312E option
especially of the LMX2531
family, pay special attention to
bypassing at the VregPLL1,
VregPLL2, and VregVCO
pins. This option is especially
sensitive to this. Phase noise
degradation in the 10 – 200
kHz range can happen. Even
on these plots, there is some
room for optimization.
6

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Free-Running VCO Noise (Internal Divide by 2 Enabled)
Fout = 634 MHz (1268 MHz/2)Fout = 657 MHz (1314 MHz/2)Fout = 680 MHz (1360 MHz/2)
The plots to the left show the
true phase noise capability of
the VCO. In order to take
these plots, the E5052 phase
noise analyzer was used.
The method was to lock the
PLL to the proper frequency,
then disable the EN_PLL,
EN_PLLLDO1, and
EN_PLLLDO2 bits. The
equipment needs to be able to
track the VCO phase noise to
measure in this way, and one
can not let the VCO drift too
far off in frequency. If this kind
of equipment is not available,
the VCO phase noise can also
be measured by making a
very narrow loop bandwidth
filter.
When divide by 2 is enabled,
the phase noise at lower
offsets is about 6 dB better. At
high offsets, the overall phase
noise improvement may be
lower because the divider is
noise floor is adding to the
phase noise.
7

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Fractional Spurs (Internal Divide by 2 Disabled)
Fractional Spur at 250 kHz offset at
a worst case frequency of 1270.25
MHz is –74.4 dBc. Worst case
channels occur at exactly one
channel spacing above or below a
multiple of the crystal frequency.
Fractional Spur at 250 kHz offset at
a worst case frequency of 1310.25
MHz is –77.0 dBc.
Fractional Spur at 250 kHz offset at
a worst case frequency of 1350.25
MHz is -81.9 dBc.
8

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Fractional Spurs (Internal Divide by 2 Enabled)
Spur at 250 kHz offset at a
frequency of 635.125 MHz is –84.2
dBc. Since this mode uses the
divide by 2 mode, the channel
spacing here is actually 125 kHz. If
there was a fractional spur at 125
kHz, it could be eliminated by
doubling the channel spacing
before the divider.
Spur at 250 kHz offset for a
frequency of 655.125 MHz is -83.2
dBc.
Spur at 250 kHz offset for a
frequency of 675.125 MHz is –88.4
dBc. The sub-fractional spur at 125
kHz offset of -89.7 dBc is also
visible.
9

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Integer Spurs (Internal Divide by 2 Enabled)
Spur at 10 MHz offset for a frequency of 1268
MHz is -92.8 dBc.
Spur at 10 MHz offset for a frequency of 1314
MHz is below the spectrum analyzer noise floor.
Spur at 10 MHz offset for a frequency of 1360
MHz is -86.0 dBc.
10

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Integer Spurs (Internal Divide by 2 Enabled)
Spur at 10 MHz offset for a frequency of 634
MHz is below the spectrum analyzer noise floor.
Spur at 10 MHz offset for a frequency of 657
MHz is below the spectrum analyzer noise floor.
Spur at 10 MHz offset for a frequency of 685
MHz is below the spectrum analyzer noise floor.
11

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
CodeLoader Settings
The CodeLoader program is designed to work with many devices. When
CodeLoader is first started, it is necessary to s elect the correct device.
12

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
There can be different modes defined for a particular part. A mode can be
recalled easily from the menu. This restores bit settings and frequencies, but not
the Port Setup information. The default reference oscillator used for these
instructions was 10 MHz, but there is an alternate mode for a 61.44 MHz
oscillator as well. If the bits become scrambled, their original state may be
recalled by choosing the appropriate mode. If the internal divide by 2 (DIV2) is
enabled, the VCO frequency will not change.
13

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
The Bits/Pins tab displays many of the bits used to program the part. Right
mouse click any bit to view more information about what this does.
When the DIV2 bit is enabled, the frequency from the part will be half of that
shown on the PLL/VCO tab. The frequency on the PLL/VCO tab does not reflect
this because the divide by 2 is actually after the VCO. Also be sure to load the
device (Ctrl+L) after changing this bit to allow the VCO to calibrate for optimal
phase noise performance.
14

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
The Registers tab shows the literal bits that are being sent to the part. These are
the registers every time the PLL is loaded by using the menu command or
trl+L). R5 (INIT1) and R5 (INIT 2) are just the R5 register being used to(C
properly initialize the part. So a single (Ctrl+L) will load the part.
15

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
The port setup tells CodeLoader what information goes where. If this is wrong,
the part will not program. Although LPT1 is usually correct, CodeLoader does
NOT automatically detect the correct port. On some laptops, it may be LPT3.
Manually verification is required.
16

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
17
LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
17
Schematic
123456
A
B
C
D
6
54321
D
C
B
A
Title
Number RevisionSize
B
Date: 6-Jan-2006 Sheet of
File: C:\Documentum\Checkout\LMX2531LQEBPCB.ddb.ddbDrawn By:
R6
R16 R15 R13 R12 R11
R2_LF
R8
C7
C2pLF
C2_LF
C1_LF
R14
LMX2531 Eval uati on Boar d
L M X2 53 1SLB C BPC B 0 1- 06- 2 00 6
Dan Chappell
C8
1 2 3 4 5 6 7 8 910
uW IRE
R10
C6
R2pLF
C16
FRAME
Fout
Vcc
R21
R19
R20
C1
R2
C12
C2
VccVCO
VccDIG
VccPLL
VccBUF
R3
C3
C17
R4
C9
C4
R5
C5
OSCin
VccVCO
VccPLL
VccBUF
C13
C18
C20
R7
R23
R22
Ftest/ LD
C15
C22
R1
R9
TRIGGER
GND
1 2
3 4
5 6
7 8
POW ER
C24
C14
C11
C19
C21
C23
Note t hat Any Component wi th Designator 100 or Higher i s on the BottomSi de of the Boar d
C10
VccDIG
BUF
1
NC
2
GND
3
NC
4
NC
5
Vreg
6
NC
DATA
CLK
7
8
9
LE
10
CE
11
NC
12
NC
13
NC
14
NC
15
VccVCO
16
VregVCO
17
VrefVCO
18
GND 19
GND 20
Fout 21
VccBUF 22
Vtune 23
CPout 24
FLout 25
VregPLL1 26
VccPLL 27
GND 34
NC 29
Ftest/LD 30
OSCin 31
OSCin* 32
Test 33
NC 35
VregDIG 36
VregPLL2 28
SLG1
37
SLG2
38
SLG3
39
U1
Vcc
Vcc
R18
R24
R17
C105
C100
C101
C103
C104
C102
VccDIG

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Bill of Materials
Bill of Materials LMX2531_LF Revision 3.28.2008
Item QTY Manufacturer Part # Tol Voltage Material Value DesignatorsSize
C1_LF, C2pLF, C2, C3, C4, C5, C9,
C11, C14, C17, C18, C19, C21, C24,
20 Open Capacitors
C100, C101, C102, C103, C104, C105
7 Open Resistors R2pLF,R7, R8, R17, R19, R21, R24
0
1
n/a
Open Miscellaneous Ftest/LD
1 1 Kemet C0603C101J5GAC 603 5% 50V C0G 100pF C16
2 2 Kemet C0603C103J5RAC 603 5% 50V X7R 10nF C10, C23
3 1 Kemet C0805C104K5RAC 805 5% 25V C0G 100nF C2_LF
4 6 Kemet C0603C104J3RAC 5% 25V X7R 100nF C6, C7, C12, C15, C22, C20603
5 1 Kemet C0603C105K4RAC 603 10% 16V X5R 1uF C8
6 1 Kemet C0603C475K9PAC 603 10% 6.3V X5R 4.7uF C13
7 1 Kemet C0805C106K8PAC 805 10% 10V X5R 10uF C1
8 1 Vishay CRCW0603000ZRT1 603 5% 0.1W Thick Film 0R20
Ω
9 2 Panasonic P.22AHCT-ND 603 10% 0.1W Thick Film 0.22ΩR22, R23
10 2 Vishay CRCW06033R3JRT1 603 0.1W Thick Film 3.3ΩR1, R185%
11 4 Vishay CRCW0603100JRT1 603 5% 0.1W Thick Film 10ΩR2, R3, R4, R5
12 1 Vishay CRCW0603510JRT1 603 5% 0.1W Thick Film 51Ω R6
13 1 Vishay CRCW0603102JRT1 603 5% 0.1W Thick Film 1KΩR2_LF
14 4 Vishay CRCW0603103JRT1 603 5% 0.1W Thick Film 10KΩR9, R11, R13, R15
15 4 Vishay CRCW0603123JRT1 603 5% 0.1W Thick Film 12KΩR10, R12, R14, R16
16 1 Comm Con
Connectors HTSM3203-8G2 2X4 n/a n/a Metal/Plastic Header POWER
17 1 FCI Electronics 52601-S10-8 2X5 n/a n/a Metal/Plastic Header uWire
18 3 Johnson Components 142-0701-851 SMA n/a n/a Metal SMA Fout, OSCin, Vcc
FR4 PCB Board
19 1 National
Semiconductor LMX2531LQEBPCB n/a n/a n/a 62 mil Thick 1st Layer 10 mils n/a
20 1 National
Semiconductor LMX2531 LLP36 n/a 2.7 Silicon LMX2531 U1
Place Across:
21 4 Com Con Connectors CCIJ255G 2-Pin n/a n/a Metal/Plastic Shunt POWER: 1-2, 3-4, 5-6, 7-8
22 4 SPC Technology SPCS-8 0.156" n/a n/a Nylon Nylon Standoffs Place in 4 Holes in Corners of Board
18

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Top Layer
19

LMX2531LQ1312E EVALUATION BOARD OPERATING INSTRUCTIONS
Mid Layer 1 "Groun 5 Mils Down FR4)d Plane" (1
20