NI PXIe-1487 User manual

PXIe-1487
2023-03-27

Contents
PXIe-1487 Getting Started Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
FlexRIO Documentation and Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Preparing the System Components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Unpacking the Kit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Verifying the Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
System Components. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Prerequisites. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Verifying the System Requirements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Installing the Soware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Installing the PXIe-1487. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Cabling the PXIe-1487. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Configuring the PXIe-1487 in MAX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Accessing FlexRIO with Integrated I/O Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Common FlexRIO with Integrated I/O Examples. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Component-Level Intellectual Property (CLIP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Front Panels, Connectors, and Block Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PXIe-1487 Deserializer Front Panel, Connectors, and Block Diagram. . . . . . . . 13
PXIe-1487 Serializer Front Panel, Connectors, and Block Diagram. . . . . . . . . . . 15
PXIe-1487 SerDes Front Panel, Connectors, and Block Diagram. . . . . . . . . . . . . 18
FPGA Carrier Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Where to Go Next. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
NI Services. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
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PXIe-1487 Getting Started Guide
This document explains how to install and configure the following variants of the
PXIe-1487:
■PXIe-1487 FlexRIO GMSL Interface Deserializer
■PXIe-1487 FlexRIO GMSL Interface Serializer
■PXIe-1487 FlexRIO GMSL Interface SerDes
Aer completing the tasks described in this document, you will have a hardware
and driver setup that allows you to design and test your soware application.
Note If you purchased the PXIe-1487 as part of an NI system, refer to your
system documentation for application-specific instructions for using the
PXIe-1487.
© 2020National Instruments Corporation. All rights reserved. Refer to the <National
Instruments>\_Legal Information directory for information about NI copyright,
patents, trademarks, warranties, product warnings, and export compliance.
FlexRIO Documentation and Resources
Use the following resources to find more information about the PXIe-1487.
All product documentation can be found at ni.com/manuals or in LabVIEW by
clicking Help.
Table 1. FlexRIO Documentation and Resources
Document Contents
PXIe-1487 Getting Started Guide (this
document) ■Installation instructions
■Basic programming instructions
PXIe-1487 Specifications ■Operating environment requirements
■IO specifications
■Clocking specifications
© National Instruments 3
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Document Contents
■Physical and mechanical specifications
PXIe-1487 Safety, Environmental, and
Regulatory Information ■Safety and compliance information
■Environmental information
LabVIEW FPGA Module Help ■Basic functionality of the FPGA module
■Instructions for developing and
debugging custom hardware logic
NI-FlexRIO Readme ■Minimum system requirements
■Supported Application Development
Environments (ADEs)
■Known issues and bug fixes
■Recent updates
FlexRIO Help ■Hardware reference information
■Programming instructions
■I/O Component Level IP (CLIP)
development information
LabVIEW Examples ■Examples showing how to run FPGA VIs
on your device
■How showing how to run host VIs on
your device
FlexRIO product page ■Product information
■Data sheets
Unpacking the Kit
Notice To prevent electrostatic discharge (ESD) from damaging the
device, ground yourself using a grounding strap or by holding a grounded
object, such as your computer chassis.
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1. Touch the antistatic package to a metal part of the computer chassis.
2. Remove the device from the package and inspect the device for loose
components or any other sign of damage.
Notice Never touch the exposed pins of connectors.
Note Do not install a device if it appears damaged in any way.
3. Unpack any other items and documentation from the kit.
Store the device in the antistatic package when the device is not in use.
Verifying the Kit Contents
Verify that the following items are included in the PXIe-1487 kit.
Figure 1. Kit Contents
1 2 3 4
1. PXIe-1487 Module
2. Terminal blocks
3. PXIe-1487 Safety, Environmental, and Regulatory Information
4. PXIe-1487 Getting Started Guide (This Document)
System Components
The PXIe-1487 is intended for use with the following system components.
Required System Components
■PXIe chassis with slot cooling capacity ≥58 W
■Camera or serial device (for Deserializer or SerDes modules)
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■Engine control unit (for Serializer or SerDes modules)
■PXI Express embedded controller or PC with MXI controller system
Optional System Components
■Power source (for Deserializer or SerDes modules)
■Power sink (for Serializer or SerDes modules)
■Copper power connector wire
■FAKRA Female Code Z to FAKRA Female Code Z Cable(s)
Note See the PXIe-1487 Specifications for detailed information on
compatible serial devices, chassis, copper connector wire, and other
system components.
Verifying the System Requirements
To use the FlexRIO instrument driver, your system must meet certain requirements.
Refer to the product readme, which is available online on the driver soware
download page or at ni.com/manuals, for more information about minimum system
requirements, recommended system, and supported application development
environments (ADEs).
Installing the Soware
Download the following soware from ni.com/downloads.
Note NI soware includes NI Package Manager to handle the installation.
Refer to the NI Package Manager Manual at ni.com/r/nipmmanual for more
information about installing, removing, and upgrading NI soware using
NI Package Manager.
■LabVIEW
■LabVIEW FPGA Module
■FlexRIO
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Installing the PXIe-1487
For instructions on how to install your PXIe-1487 into the chassis, refer to your
chassis documentation, available at ni.com/manuals.
Cabling the PXIe-1487
Complete the following steps to connect your PXIe-1487 to other system
components.
1. Connect your chassis to a power source as described in the chassis Getting
Started Guide.
2. Connect serial device(s) and ECU(s) as required for your application.
1. For Deserializer or SerDes modules, use a FAKRA cable to connect serial
device(s) to the PXIe-1487 serial input (SI) connector(s).
2. For Serializer or SerDes modules, use a FAKRA cable to connect ECU(s)
to the PXIe-1487 serial output (SO) connector(s).
Note Serial output and serial input coaxial connectors on the
PXIe-1487 are physically identical. They can be dierentiated by
their labels. Serial output channels are labeled SO and serial input
connectors are labeled SI.
3. Connect the terminal blocks included in your kit to the AUX power connectors
on the PXIe-1487.
4. (Optional) Connect power sink(s) or power source(s) to the AUX power
connectors as required for your application.
1. For Deserializer or SerDes modules, use a copper conductor wire to
connect a power source to the serial input channel's corresponding pin
on the AUX power connector.
This allows you to supply external power. If you do not connect an
external power source, devices connected to PXIe-1487 can be powered
by the chassis backplane.
2. For Serializer or SerDes modules, use a copper conductor wire to
connect a power sink to the serial output channel's corresponding pin
on the AUX power connector.
© National Instruments 7
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This allows you to simulate an additional load.
Note AUX power connector pins map to serial input and serial
output connectors one to one.
Refer to the following diagrams for examples of cabled configurations.
Figure 1. PXIe-1487 Deserializer
1
6
5
3
4
2
1. PXIe-1487 Deserializer Module
2. Camera or Serial Device
3. Power Source
4. FAKRA Female Code Z to Serial Device Connector Cable
5. Power Connector Wire, Grounding
6. Power Connector Wire, Positively Charged
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Figure 1. PXIe-1487 Serializer
1
6
5
4
2
3
1. PXIe-1487 Serializer Module
2. Engine Control Unit (ECU)
3. Power Sink
4. FAKRA Female Code Z to FAKRA Female Code Z Cable
5. Power Connector Wire, Grounding
6. Power Connector Wire, Positively Charged
© National Instruments 9
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Figure 1. PXIe-1487 SerDes
1
4
5
3
2
1. PXIe-1487 SerDes Module
2. Engine Control Unit (ECU)
3. FAKRA Female Code Z to FAKRA Female Code Z Cable
4. Camera or Serial Device
5. Power Connector Wire, Positively Charged
Note In the PXIe-1487 SerDes module configuration shown, the power
connector wire allows the ECU to power the camera or serial device.
Related reference:
■PXIe-1487 Deserializer Front Panel, Connectors, and Block Diagram
■PXIe-1487 Serializer Front Panel, Connectors, and Block Diagram
■PXIe-1487 SerDes Front Panel, Connectors, and Block Diagram
Configuring the PXIe-1487 in MAX
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Use Measurement & Automation Explorer (MAX) to configure your NI hardware. MAX
informs other programs about which NI hardware products are in the system and
how they are configured. MAX is automatically installed with FlexRIO.
1. Launch MAX.
2. In the configuration tree, expand Devices and Interfaces to see the list of
installed NI hardware.
Installed modules appear under the name of their associated chassis.
3. Expand your Chassis tree item.
MAX lists all modules installed in the chassis. Your default names may vary.
Note If you do not see your module listed, press <F5> to refresh the
list of installed modules. If the module is still not listed, power o the
system, ensure the module is correctly installed, and restart.
4. Record the identifier MAX assigns to the hardware. Use this identifier when
programming the PXIe-1487.
5. Self-test the hardware by selecting the item in the configuration tree and
clicking Self-Test in the MAX toolbar.
The MAX self-test performs a basic verification of hardware resources.
Accessing FlexRIO with Integrated I/O Examples
The NI-FlexRIO driver includes several example applications for LabVIEW. These
examples serve as interactive tools, programming models, and as building blocks in
your own applications. Complete the following steps to access all FlexRIO with
Integrated I/O getting started examples.
1. In LabVIEW, click Help » Find Examples.
2. In the NI Example Finder window that opens, click Hardware Input and
Output » FlexRIO » Integrated IO » Getting Started.
3. Double click Getting Started with FlexRIO Integrated IO.vi.
The FlexRIO with Integrated IO Project Creator window will open.
4. Select the example that corresponds to the name of your FlexRIO module. The
Description window includes a short description of the getting started
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example for your device. Rename the project, select a location for this project,
and click OK.
The Project Explorer window for your new project opens.
Online examples are also available to demonstrate FlexRIO basics, such as using
DRAM, acquiring data, and performing high throughput streaming. To access these
examples, search FlexRIO examples in the Search the community field at ni.com/
examples.
Common FlexRIO with Integrated I/O Examples
In addition to the examples within the FlexRIO with Integrated IO Project Creator, NI
provides several examples that apply to all FlexRIO with Integrated I/O modules to
help you perform common tasks.
The following examples can be found in the NI Example Finder:
■Show All FlexRIO with Integrated IO Hardware.vi queries and displays a set
of hardware properties from all FlexRIO with Integrated I/O devices in a
chassis.
■Vivado Export Getting Started Ultrascale.lvproj demonstrates the use of the
Vivado Project Export feature.
■Read-Write Calibration Data.vi demonstrates how to read and write
calibration data and metadata into the storage space of FlexRIO with
Integrated I/O devices.
Component-Level Intellectual Property (CLIP)
The LabVIEW FPGA Module includes component-level intellectual property (CLIP) for
HDL IP integration. FlexRIO devices support two types of CLIP: user-defined and
socketed.
■User-defined CLIP allows you to insert HDL IP into an FPGA target, enabling
VHDL code to communicate directly with an FPGA VI.
■Socketed CLIP provides the same IP integration of the user-defined CLIP,
but it also allows the CLIP to communicate directly with circuitry external to
the FPGA. Adapter module socketed CLIP allows your IP to communicate
directly with both the FPGA VI and the external adapter module connector
interface.
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The PXIe-1487 ships with socketed CLIP items that add module I/O to the LabVIEW
project.
PXIe-1487 Deserializer Front Panel, Connectors, and Block
Diagram
Figure 5. PXIe-1487 Deserializer Front Panel
PXIe-1487
FlexRIO GMSL2 Deserializer
AUX POWER
SI 0
SI 2
SI 3
SI 1
SI 4
SI 6
SI 7
SI 5
0
1
2
3
4
5
9-30 V
800 mA MAX
6
7
Table 2. PXIe-1487 Deserializer Front Panel Connectors Signal Descriptions
Signal Name Description FlexRIO Terminal Name
SI 0 Serial input to internal
deserializer
SI0
SI 1 Serial input to internal
deserializer
SI1
SI 2 Serial input to internal
deserializer
SI2
SI 3 Serial input to internal
deserializer
SI3
SI 4 Serial input to internal
deserializer
SI4
© National Instruments 13
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Signal Name Description FlexRIO Terminal Name
SI 5 Serial input to internal
deserializer
SI5
SI 6 Serial input to internal
deserializer
SI6
SI 7 Serial input to internal
deserializer
SI7
Figure 6. PXIe-1487 Deserializer AUX Power Connectors
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
10
11
12
Table 3. PXIe-1487 Deserializer AUX Power Connectors Signal Descriptions
Signal Pin Description
1 Power supply for channel SI 0
2 Power supply for channel SI 1
3 Digital/chassis grounding
4 Digital/chassis grounding
5 Power supply for channel SI 2
6 Power supply for channel SI 3
7 Power supply for channel SI 4
8 Power supply for channel SI 5
9 Digital/chassis grounding
10 Digital/chassis grounding
11 Power supply for channel SI 6
12 Power supply for channel SI 7
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Figure 1. PXIe-1487 Deserializer I/O Block Diagram
SI0
Des0
MAX9296A
Port A
Port B
PoC
Select
SI 0 CSI-2 Data
SI 0 SI 1 Deserializer MFP
SI 0 SI 0 SI 1 Deserializer I2C / Des0_I2C
Des0_RefClk
Des1_RefClk
Des1
MAX9296A
Port A
Port B
SI1
SI2
SI3
SI 1 CSI-2 Data
Internal (12 V)
Aux Power
None
PoC
Select
Internal (12 V)
Aux Power
None
PoC
Select
Internal (12 V)
Aux Power
None
PoC
Select
Aux
Power
PLL
Internal (12 V)
Aux Power
Aux Power
None
SI 2 CSI-2 Data
SI 2 SI 3 Deserializer MFP
SI 2 SI 3 Deserializer I2C / Des1_I2C
SI 3 CSI-2 Data
SI4
Des2
MAX9296A
PoC
Select
SI 4 CSI-2 Data
SI 4 SI 5 Deserializer MFP
SI 4 SI 5 Deserializer I2C / Des2_I2C
Des2_RefClk
Des3_RefClk
Des3
MAX9296A
SI5
SI6
SI7
SI 5 CSI-2 Data
Internal (12 V)
Aux Power
None
PoC
Select
Internal (12 V)
Aux Power
None
PoC
Select
Internal (12 V)
Aux Power
None
PoC
Select
Aux
Power
PLL
Internal (12 V)
Aux Power
Aux Power
None
SI 6 CSI-2 Data
SI 6 SI 7 Deserializer MFP
SI 6 SI 7 Deserializer I2C / Des3_I2C
SI 7 CSI-2 Data
Port A
Port B
Port A
Port B
I/O
Mezzanine
Connector
SIOB
SIOA
SIOA
SIOB
SIOB
SIOB
SIOA
SIOA
PXIe-1487 Serializer Front Panel, Connectors, and Block Diagram
© National Instruments 15
PXIe-1487

Figure 8. PXIe-1487 Serializer Front Panel
PXIe-1487
SO 0
SO 2
SO 3
SO 1
SO 4
SO 6
SO 7
SO 5
0
1
2
3
4
5
9-30 V
800 mA MAX
6
7
FlexRIO GMSL2 Serializer
AUX POWER
Table 4. PXIe-1487 Serializer Front Panel Connectors Signal Descriptions
Signal Name Description FlexRIO Terminal Name
SO 0 Serial output from internal
serializer
SO0
SO 1 Serial output from internal
serializer
SO1
SO 2 Serial output from internal
serializer
SO2
SO 3 Serial output from internal
serializer
SO3
SO 4 Serial output from internal
serializer
SO4
SO 5 Serial output from internal
serializer
SO5
SO 6 Serial output from internal
serializer
SO6
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Signal Name Description FlexRIO Terminal Name
SO 7 Serial output from internal
serializer
SO7
Figure 9. PXIe-1487 Serializer AUX Power Connectors
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
9
10
11
12
Table 5. PXIe-1487 Serializer AUX Power Connectors Signal Descriptions
Signal Pin Description
1 Power sink for channel SO 0
2 Power sink for channel SO 1
3 Digital/chassis grounding
4 Digital/chassis grounding
5 Power sink for channel SO 2
6 Power sink for channel SO 3
7 Power sink for channel SO 4
8 Power sink for channel SO 5
9 Digital/chassis grounding
10 Digital/chassis grounding
11 Power sink for channel SO 6
12 Power sink for channel SO 7
© National Instruments 17
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Figure 1. PXIe-1487 Serializer I/O Block Diagram
SO4 Ser4
MAX9295A
SO4
PoC
Select
SO 4 CSI-2 Data
SO 4 Serializer MFP
SO 4 Serializer I2C / Ser4_I2C
Ser4_RefClk
Ser5_RefClk
Ser6_RefClk
Ser7_RefClk
Ser5
MAX9295A
Ser6
MAX9295A
Ser7
MAX9295A
SO5
SO6
SO7
SO 5 CSI-2 Data
SO 5 Serializer MFP
SO 5 Serializer I2C / Ser5_I2C
Aux Power
None
SO5
PoC
Select
Aux Power
None
SO6
PoC
Select
Aux Power
None
SO7
PoC
Select
Aux
Power
PLL
Aux Power
Aux Power
None
SO 6 CSI-2 Data
SO 6 Serializer MFP
SO6 Serializer I2C / Ser6_I2C
SO 7 CSI-2 Data
SO 7 SerializerMFP
SO 7 Serializer I2C / Ser7_I2C
SO0 Ser0
MAX9295A
SO0
PoC
Select
SO 0 CSI-2 Data
SO 0 Serializer MFP
SO 0 Serializer I2C / Ser0_I2C
Ser0_RefClk
Ser1_RefClk
Ser2_RefClk
Ser3_RefClk
Ser1
MAX9295A
Ser2
MAX9295A
Ser3
MAX9295A
SO1
SO2
SO3
SO 1 CSI-2 Data
SO 1 Serializer MFP
SO 1 Serializer I2C / Ser1_I2C
Aux Power
None
SO1
PoC
Select
Aux Power
None
SO2
PoC
Select
Aux Power
None
SO3
PoC
Select
Aux
Power
PLL
Aux Power
Aux Power
None
SO 2 CSI-2 Data
SO 2 Serializer MFP
SO 2 Serializer I2C / Ser2_I2C
SO 3 CSI-2 Data
SO 3 Serializer MFP
SO 3 Serializer I2C / Ser3_I2C
I/O
Mezzanine
Connector
PXIe-1487 SerDes Front Panel, Connectors, and Block Diagram
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Figure 11. PXIe-1487 SerDes Front Panel
PXIe-1487
FlexRIO GMSL2 SerDes
SO 0
SO 1
SI 1
SI 0
SO 2
SO 3
SI 3
SI 2
0SO
SI
SO
SI
0
1
1
2
2
9-30 V
800 mA MAX
3
3
AUX POWER
Table 6. PXIe-1487 SerDes Front Panel Connectors Signal Descriptions
Signal Name Description FlexRIO Terminal Name
SO 0 Serial output from internal
serializer
SO0
SI 0 Serial input to internal
deserializer
SI0
SO 1 Serial output from internal
serializer
SO1
SI 1 Serial input to internal
deserializer
SI1
SO 2 Serial output from internal
serializer
SO2
SI 2 Serial input to internal
deserializer
SI2
SO 3 Serial output from internal
serializer
SO3
© National Instruments 19
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Signal Name Description FlexRIO Terminal Name
SI 3 Serial input to internal
deserializer
SI3
Figure 12. PXIe-1487 SerDes AUX Power Connectors
0SO
SI
SO
SI
0
1
1
2
2
3
3
1
2
3
4
5
6
7
8
9
10
11
12
Table 7. PXIe-1487 SerDes AUX Power Connectors Signal Descriptions
Signal Pin Description
1 Power sink for channel SO 0
2 Power supply for channel SI 0
3 Digital/chassis grounding
4 Digital/chassis grounding
5 Power sink for channel SO 1
6 Power supply for channel SI 1
7 Power sink for channel SO 2
8 Power supply for channel SI 2
9 Digital/chassis grounding
10 Digital/chassis grounding
11 Power sink for channel SO 3
12 Power supply for channel SI 3
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