Nova N10357 User manual

N10357
128 Bit Industrial Interface Board
Nova Research and Engineering, Inc.
11930A 44
th Street North
Clearwater, FL 33762
[phone]
8/5/2012

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Products manufactured by Nova Research and Engineering, Inc. (NRE), Clearwater,
Florida are warranted against defects in materials and workmanship for a period of one
year from the original date of delivery. Factory reconditioned and refurbished products
are warranted against defects in materials and workmanship for a period of 90 days from
the date of delivery.
This warranty does not cover damage from, or failure attributable to, acts of nature,
abuse, misuse, improper usage, faulty installation, or any modifications not expressly
authorized in writing by NRE.
NRE will repair or replace, at our option, any product determined to be defective within
the terms of this warranty. After the warranty period, charges will be rendered for any
repairs, adjustments or upgrades made to the product by NRE, including, but not limited
to, charges for shipp ing, insurance, parts and labor.
NRE is not responsible or liable for indirect, special, or consequential damages arising
out of, or in connection with, the use or performance of any NRE products. NRE is not
responsible or liable for other damages with respect to loss of property, loss of revenues
or profit, or costs of removal, installation or reinstallation.
Except as provided herein, NRE makes no express warranties, and any implied
warranty, including warranties of merchantability or fitness for a particular purpose, is
limited to a period of ninety days from the original date of delivery.
This warranty gives you specific legal rights. You may have additional rights that vary
from state to state.
Rev2 typographical error corrections.
No part of this publication may be reproduced, stored in a retrieval system, or
transmitted, in any form or by any means without prior written permission of Nova
Research and Engineering, Inc.
The information contained herein is subject to change without notice.
Copyright (c) 200 9- 201 2 by N ova Research and Engineering, Inc. (USA).
All rights reserved.

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Table of Contents
1 Introduction.......................................................................... ..................... 4
2 Installation............................................. .................................. .. ................ 5
2.1 Card Configuration .................................................................... .. .............. 6
3 Operation............................................................................... ..... .. ............ 8
3.1 Powering the Optocouplers .............. ............... ................... .. .......... 8
3.2 Port Addresses and Bits ... ... ................. ............... ......... 9
3.3 The Watchdog .. .. ............ ......... 10
4 Troubleshooting............................................... .. ....................................... 11
4.1 Inputs Incorrectly Read .. ......................... . ...................................... 11
4.2 Outputs Incorrectly Set .... .................................... . ..................................... 11
Appendix A Card Specifications...... ......... .......... . ................ .. ........................... 12
Appendix B Ordering and Service Information ............................ .................. 14
Appendix C J1/J1A Pinout Specification ..... ........................ ....................... 15
Appendix D J2/J2A Pinout Specification ..... ............................................... 16
Appendix E J3/J3A Pinout Specification ..... .................. ............................. 17
Appendix F J4 Pinout Specification ..... .................. ............................. 18

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SECTION 1
Introduction
The Nova Research N1 0357 128 Bit Industrial Interface Board was specifically d esigned
to drive 24VDC devices, and is permanently set up for 64 outputs and 64 inputs . The outputs are
low -drive, current sinks (i.e. driven to ground) with integral protection diodes, and groups can be
connected to differing voltage sources. The inputs are optically isolated. Both inputs and outputs
are read - right from the computer bus (that is, a low on the input produces a low bit in the reported
data, a low bit in the output word produces a low output signal at the connector). Read back of
the output d ata is not supported.
The output drivers are rated to sink 350m A (max) per pin, and are overcurrent protected.
Driver power limitations reduce this to 25 0m A per pin if all pins in one driver are active. Schottky
clamp diodes are provided so that the card may directly drive 24VDC solenoids without external
protection.
The card plugs into any standard ISA bus slot . Either the 8-bit or 16-bit computer
interface connector may be used; the bus transfer is always an 8-bit transfer. The card is
configured in the co mputer s I /O space. M emory mapping is not supported. A hardware watchdog
timer is included, and must be operated by periodic reads at a specific address.
The external interface is via a DB37 male connector on the card end, and three DB37
female connectors along the top edge of the card. The signals in the three DB37 connectors on
the card top edge are also carried in three 20X2 shrouded headers to allow for inexpensive
ribbon - cable connection where practical.
The specification list is shown in Appendix A.

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SECTION 2
Installation
The N10357 may be installed in any 8- or 16 -bit slot of an ISA compatible computer
system, with an active or passive backplane. When installing or removing the board, always
secure computer power an d use ESD handling precautions.
The card is secured using a single screw to the computer rear card frame, as shown in
the photograph below. Any mix of cards can be plugged in, so long as the card address spaces
do not overlap. The card I/O address must be set before installation, and this process is
described in Section 2.1, below. The electrical and environmental specifications are shown in
Appendix A .
The signals from the card are carried to the rear of the computer via cables. If the
individual I/O bit loads are less than 25 0mA, this can be accomplished using flat ribbon cables, as
shown below:

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The connectors penetrating the rear of the computer are the entry points for the card
power, and should be male presentation, as shown below:
2.1 Card Configuration
The board uses all of the addresses in one segment (16 addresses) of the configured
base address. Thus if the base address is set to 320H (W4, W6, W7, W10, W11 on), the board
uses addresses 320H through 32FH.
The base address of the board is set using jumpers W4-W11 (center, bottom of board),
and they configure the bits 4 through 11 of the address in the computer I/O space. Normal
configuration is 3XXH (W10 and W11 on, W8 and W9 removed) or 2XXH (W8, W10, and W11
on, W9 off ). W4 thr ough W7 set the middle nibble of the base address . W7 and W11 ar e the most
significant bits of the address nibbles.
Several address settings are shown in the following photographs. The progression is
binary.

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Address = 0X30X Address = 0X31X
Address = 0X32X Address = 0X33X
Address = 0X3 4X
Address = 0X20X

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SECTION 3
Operation
The card works by transferring data from the computer bus through a bus interface
chipset and into a set of latches driving the output drivers. The data transfer is NOT synchronous
across ports, that is, the port data is delivered to the output pins as it is written to the card
addresses.
Similarly, the data on the input port pins moves through a set of optocouplers and buffers
through the bus interface chipset to the computer data bus. Again, the data from the port is
asynchronously available to the computer. Sequential port reads transfers instantaneous data to
the computer, not latched data.
There is a watchdog timer that disables the outputs if not refreshed. It is always
E NABLED and must be refreshed for the outputs to be active. The watchdog operation is covered
in Section 3.3.
The common for the power provided MUST be the same as the computer common. J2
pins 10, 15, 26, 31, and 36 are common pins. J3 pins 2, 7, 12, 17, 23, 28, and 33 are common
pin s. J4 pins 12, 17, 28, 33 are common pins.
The connectors of the card are shown in the next photograph.
3.1 Powering the Input Optocouplers
Pin 1 on J1, J2, J3, and J4 is a power pin that allows power for the optocouplers and/or
the output drivers to be brought onto the card. J2, J3, and J4 each have output drivers attached
to them, and pin 1 on each provides power to a set of output drivers. This configuration allows
drivers on different connectors to run at different output voltages.
JP1, JP2, JP3, and JP4 select the power distribution to the input optocouplers. JP2
routes power for the drivers on connector J2 to all of the input optocouplers . JP3 routes power for
the drivers on J3 to the input optocouplers. JP4 routes power for the drivers on J4 to the input
optocouplers . Additionally, JP1 may select pin 1 on J1 as the input optocouplers power source
even though no drivers are attached to J1 .
At least one jumper must be set to use the board inputs, and this is normally a +24VDC
source. If multiple jumpers are set, the user must NOT have different voltages present on the two
(or more) connectors. For example, if +24VDC is connected to pin 1 of J1, and +12VDC is
connected to pin 1 of J2, setting both JP1 and JP2 will connect the +24VDC and +12VDC power
supplies together, possible damaging the power supplies and the card.

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3. 2 Port Addresses and Bits
Data is written to a particular output port bit by writing to a particular I/O address.
Similarly, data is gathered from a particular input port bit by reading a particular I/O address. The
lowest address used by the card is called the base address. The terminology used to address a
particular port is: base + offset, and is used to define the particular address to read or write. The
following table lists the offsets, operations, and connector pins (LSB to MSB):
OFFSET OPERATION PINS
0 INPUT J1 - 20,2,21,3,22,4,23,5
1 INPUT J1 - 24,6,25,7,26,8,27,9
2 INPUT J1 - 28,10,29,11,30,12,31,13
3 INPUT J4 - 20,2,21,3,22,4,23,5
4 INPUT J1 - 32,14,33,15,34,16,35,17
5 INP UT J1 - 36,18,37,19
J2 - 20,2,21,3
6 INPUT J2 - 22,4,23,5,24,6,25,7
7 INPUT J4 - 24,6,25,7,26,8,27,9
8 OUTPUT J2 - 8,27,9,28,29,11,30,12
9 OUTPUT J2 - 13,32,14,33,34,16,35,17
A OUTPUT J2 - 18,37,19
J3 - 20,21,3,22,4
B OUTPUT J4 - 10,29,11,30,31,13,32,14
C OUTPUT J3 -5 ,24,6,25,26,8,27,9
D OUTPUT J3 - 10,29,11,30,31,13,32,14
E OUTPUT J3 - 15,34,16,35,36,18,37,19
F OUTPUT J4 - 15,34,16,35,36,18,37,19
A write to offsets 0 through 7 has no effect on the board. A read of offsets 8 through F
returns invalid data. The individua l connector pinouts are defined in Appendices C through F.

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3. 3 The Watchdog
The watchdog on the N10357 is always active. The outputs will not be active, and the
outputs will float, if the watchdog times out during card use. The timeout period is approxi mately
½ second, and is not adjustable.
The watchdog is reset by reading offset 0 (the lowest input port). This MUST be done at
least every .5 seconds for the outputs to remain active. If the watchdog times out, all outputs
return to the undriven (high) s tate.