NuDAQ ACL-8112 Series User manual

NuDAQ
ACL-8112 Series
Enhanced Multi-Functions
Data Acquisition Cards
User’s Guide

@Copyright 1996~2000 ADLINK Technology Inc.
All Rights Reserved.
Manual Rev. 3.51: June 7, 2000
The information in this document is subject to change without prior notice
in order to improve reliability, design and function and does not represent
a commitment on the part of the manufacturer.
In no event will the manufacturer be liable for direct, indirect, special,
incidental, or consequential damages arising out of the use or inability to
use the product or documentation, even if advised of the possibility of
such damages.
This document contains proprietary information protected by copyright. All
rights are reserved. No part of this manual may be reproduced by any
mechanical, electronic, or other means in any form without prior written
permission of the manufacturer.
Trademarks
NuDAQ, ACL-8112 are registered trademark of ADLINK Technology Inc..
Other product names mentioned herein are used for identification
purposes only and may be trademarks and/or registered trademarks of
their respective companies.

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Technology Inc. If you need any help or service, please contact us and
get it. ADLink Technology Inc.
Web Site http://www.adlink.com.tw
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Support NuDAM [email protected]
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¨OS :
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Contents
•
i
Contents
Chapter 1 Introduction...................................................................1
1.1 Features..............................................................................3
1.2 Applications........................................................................3
1.3 Specifications.....................................................................4
1.4 Software Support................................................................7
1.4.1 Programming Library.....................................................................7
1.4.2 LabView Driver................................................................................7
Chapter 2 Installation.....................................................................8
2.1 What You Have ...................................................................8
2.2 Unpacking...........................................................................9
2.3 ACL-8112's Layout.............................................................10
2.4 Jumper and DIP Switch Description .................................12
2.5 Base Address Setting........................................................12
2.6 Analog Input Channel Configuration ................................13
2.7 DMA Channel Setting........................................................14
2.8 Internal/External Trigger Setting......................................15
2.9 Clock Source Setting........................................................17
2.10 IRQ Level Setting..............................................................17
2.11 D/A Reference Voltage Setting.........................................18
2.12 A/D Input Range Setting ..................................................19
Chapter 3 Signal Connections.......................................................20
3.1 Connectors Pin Assignment..............................................20
3.2 Analog Input Signal Connection.......................................22
3.3 Analog Output Signal Connection ....................................24
3.4 Digital I/O Connection.......................................................25
3.5 Timer / Counter Connection..............................................25
3.6 Daughter Board Connection .............................................26
3.6.3 Connect with ACLD-8125.................................................................26
3.6.4 Connect with ACLD-9137.................................................................26
3.6.5 Connect with ACLD-9182.................................................................27
3.6.6 Connect with ACLD-9185.................................................................27
3.6.7 Connect with ACLD-9188.................................................................27
Chapter 4 Registers Format..........................................................28
4.1 I/O Port Address................................................................28

ii
•
Contents
4.2 A/D Data Registers............................................................29
4.3 A/D Channel Multiplexer Register.....................................29
4.4 A/D Range Control Register..............................................31
4.5 A/D Operation Mode Control Register...............................34
4.6 Interrupt Status Register...................................................34
4.7 Software Trigger Register.................................................35
4.8 Digital I/O register.............................................................35
4.9 D/A Output Register..........................................................37
4.10 Internal Timer/Counter Register.......................................37
Chapter 5 Operation Theorem.......................................................39
5.1 A/D Conversion.................................................................39
5.1.1 A/D Conversion Procedure........................................................39
5.1.2 A/D Trigger Modes........................................................................40
5.1.3 A/D Data Transfer Modes...........................................................40
5.2 D/A Conversion.................................................................42
5.3 Digital Input and Output....................................................43
5.4 Timer/Counter Operation..................................................43
Chapter 6 Calibration & Utilities...................................................48
6.1 What do you need............................................................48
6.2 VR Assignment..................................................................48
6.3 A/D Adjustment.................................................................49
6.3.1. Bipolar Calibration........................................................................49
6.3.2. Unipolar Calibration......................................................................49
6.4 D/A Adjustment.................................................................50
Chapter 7 C Language Library......................................................51
7.1 _8112_Initial......................................................................51
7.2 _8112_Switch_Card_No.....................................................54
7.3 _8112_DI............................................................................55
7.4 _8112_DI _Channel............................................................55
7.5 _8112_DO..........................................................................56
7.6 _8112_DA ..........................................................................57
7.7 _8112_AD_Input_Mode ......................................................59
7.8 _8112_AD_Set_Channel ....................................................62
7.9 _8112_AD_Set_Range .......................................................64
7.10 _8112_AD_Set_Mode.........................................................67
7.11 _8112_AD_Soft_Trig ..........................................................68
7.12 _8112_AD_Aquire ..............................................................69

Contents
•
iii
7.13 _8112_CLR_IRQ.................................................................70
7.14 _8112_AD_DMA_Start........................................................70
7.15 _8112_AD_DMA_Status......................................................74
7.16 _8112_AD_DMA_Stop ........................................................74
7.17 _8112_AD_INT_Start..........................................................75
7.18 _8112_AD_INT_Status........................................................76
7.19 _8112_AD_INT_Stop ..........................................................78
7.20 _8112_AD_Timer...............................................................78
7.21 _8112_TIMER_Start............................................................79
7.22 _8112_TIMER_Read...........................................................81
7.23 _8112_TIMER_Stop............................................................82
Appendix A. Demo Programs........................................................83
Product Warranty/Service.............................................................84

How to Use This Guide
This manual is designed to help you use the ACL-8112. The manual
describes how to modify various settings on the ACL-8112 card to meet
your requirements. It is divided into seven chapters:
ØChapter 1, "Introduction," gives an overview of the product features,
applications, and specifications.
ØChapter 2, "Installation," describes how to install the ACL-8112. The
layout of ACL-8112 is shown, the switch setting for base address,
and jumper setting for analog input channel configuration, reference
voltage setting, trigger source, interrupt level and DMA channel are
specified.
ØChapter 3, "Signal Connection," describes the connectors' pin
assignment and how to connect the outside signal and devices with
the ACL-8112.
ØChapter 4, "Registers," describes the details of register format and
structure of the ACL-8112, this information is very important for the
programmers who want to control the hardware by low-level
programming.
ØChapter 5, "Operation Theorem" describes how to operate the ACL-
8112. The A/D, D/A, DIO and timer/counter functions are introduced.
Also, some programming concepts are specified.
ØChapter 6, "Calibration & Utility" describes how to calibrate the ACL-
8112 for accurate measurement.
ØChapter 7, "C Language Library," describes how to program the
ACL-8112 by using the C language library in DOS environment.
ØAppendix A, "Demo. Program," describes some demonstration
programs.

Introduction
•
1
1
Introduction
The ACL-8112 is a high performance, high speed multi-function data
acquisition card for the IBM PC or compatible computers.
The ACL-8112 series is designed to combine all the data acquisition
functions, such as A/D, D/A, DIO, and timer/counter in a single board, The
high-end specifications of the card makes it ideal for wide range of
applications requiring high speed 12-bit data acquisition at low cost. The
Figure 1.1 shows the block diagram of the ACL-8112.
The ACL-8112 Series consists of three products, the ACL-8112HG, ACL-
8112DG and ACL-8112PG. The ACL-8112HG provides special high-gain
programmable instrument amplifier for low level input applications, such
as measure thermocouple signals. The ACL-8112DG provides high
speed sample rate ( up to 100 Khz) at all gains ( x1, x2, x4, and x8). The
ACL-8112PG provides 16 single-ended inputs at up to 100 KHz and 5
levels of gain (x1, x2, x4, x8, x16)
The ACL-8112 Series features 16 single-ended inputs or 8 differential
inputs at up to 90 Khz, 2 channels multiplying 12-bit double-buffered
analog output, 16 digital inputs and 16 digital outputs, and one
timer/counter channel.

2
•
Introduction
CH 0
CH 1
CH 2
.
.
.
ANALOG
INPUT
>
16 BIT
DIGITAL INPUT
REGISTER
D/I 0
DI 1
DO 15
D/O 0
DO 1
DI 15
DMA SELECT
#1 OR #3
TRIG
LOGIC
PACER
TRIG
SOFTWARE
TRIG
EXTERNAL
TRIG
CH 15
D/A 1 OUT
GND
REF 1 IN
D/A 0 OUT
GND
REF 0 IN 4 MHz
OSC.
FR/2
2MHz
OUT 0
16 BIT
COUNTER #0
16 BIT
COUNTER #1
16 BIT
COUNTER #2
TO PACER TRIG
16 BIT
DIGITAL INPUT
REGISTER
12-Bit
Code Latch
16 channel
Single-ended
or
8Differential
Analog
Multiplexer
AMP
DC/DC
CONVERTER
+15
-15
+5V
MUX SCAN
CONTROL
12-Bit
Code Latch
D/A #1 12 BIT
MULITIPLYING D/A
DATA
BUFFER INTERRUPT
IRQ SELECT
CONTROL
LOGIC
DACK
I/O PORT DECODER
INTERNAL BUSGAIN
SELECT
D/A #0 12 BIT
MULITIPLYING D/A
12 Bit
A/D Converter
(B.B 774)
INPUT
BUFFER
>
>
<
<
EXT.CLK
<
PC/AT BUS
EOC
DRQ
.
.
.
.
.
.
Figure 1.1 ACL - 8112 BLOCK DIAGRAM

Introduction
•
3
1.1 Features
The ACL-8112 series Enhanced Multi-function Data Acquisition Card
provides the following advanced features:
ØAT-Bus
Ø16 single-ended or 8 differential analog input channels for ACL-
8112DG/HG, 16 single-ended for ACL-8112PG.
ØBipolar or unipolar input signals for ACL-8112DG/HG, bipolar for
ACL-8112PG.
ØProgrammable gain
ØHigh gain for ACL-8112HG:( x0.5, x1, x5, x10, x50, x100, x500, x1,000)
ØNormal gain for ACL-8112DG (x0.5, x1, x2, x4, x8 )
Ø5 Levels programmable gain for ACL-8112PG (x1, x2, x4, x8, x16),
x0.5 gain can be set by jumper
ØOn-chip sample & hold
ØTwo 12-bit monolithic multiplying analog output channels
Ø16 digital output channels
Ø16 digital input channels
Ø3 programmable 16-bit down counters
ØProgrammable sampling rate of up to 100KHz
ØThree A/D trigger modes: software trigger, programmable pacer
trigger, and external pulse trigger.
ØAT interrupt IRQ capability: 9 IRQ levels (IRQ3~IRQ15) are jumper
selectable.
ØIntegral DC-to-DC converter for stable analog power source
Ø37-pin D-type connector
ØCompact size: half-size PCB
1.2 Applications
ØIndustrial and laboratory ON/OFF control
ØEnergy management
ØAnnunciation
Ø16 TTL/DTL compatible digital input channels
ØSecurity controller
ØProduct test
ØPeriod and pulse width measurement
ØEvent and frequency counting

4
•
Introduction
ØWaveform and pulse generation
ØBCD interface driver
1.3 Specifications
Analog Input (A/D)
ØConverter:ADS774 or equivalent, successive approximation type
ØResolution: 12-bit
ØNumber of channels:
ACL-8112DG/HG: 16 single-ended or 8 differential
ACL-8112PG: 16 single-ended
ØInput Range: (Programmable)
ØACL-8112HG:
Bipolar : ±10V,±5V,±1V,±500 mV,±100mV,±50mV, ±10mV, ±5mV
Unipolar: 0~10V, 0~1V, 0~0.1V, 0~0.01V
ØACL-8112DG:
Bipolar : ±10V, ±5V, ±2.5V, ±1.25V, ±0.625
Unipolar: 0~10V, 0~5V, 0~2.5V, 0~1.25V
ØACL-8112PG:
Bipolar : ±10V ,±5V, ±2.5V, ±1.25V, ±0.625V
Or
Bipolar : ±5V, ±2.5V, ±1.25V, ±0.625V, ±0.3125V
ØConversion Time: 8µsec
ØOvervoltage protection: Continuous±35V maximum
ØAccuracy:
(ACL-8112HG)
GAIN = 0.5, 1 0.01% of FSR±1 LSB
GAIN = 5, 10 0.02% of FSR±1 LSB
GAIN = 50, 100 0.04% of FSR±1 LSB
GAIN = 500, 1000 0.04% of FSR±1 LSB
(ACL-8112DG)
GAIN = 0.5, 1 0.01% of FSR±1 LSB
GAIN = 2, 4 0.02% of FSR±1 LSB
GAIN = 8 0.04% of FSR±1 LSB

Introduction
•
5
(ACL-8112PG)
GAIN = 0.5, 1, 2, 4 0.015% of FSR±1 LSB
GAIN = 8, 16 0.02% of FSR±1 LSB
ØInput Impedance: 10 MΩ
ØAD converstion trigger modes: Software, Pacer, and External
trigger
ØData Transfer: Pooling, DMA, Interrupt
ØSampling Rate:
Ø100 KHz maximum for single channel
Ø100 KHz maximum for multiplexing on ACL-8112PG
Ø20 KHz maximum for multiplexing on ACL-8112DG/HG
Analog Output (D/A)
ØConverter: DAC7541 or equivalent, monolithic multiplying
ØNumber of channels: 2 double-buffered analog outputs
ØResolution: 12-bit
ØOutput Range:
Internal reference: (unipolar) 0~5V or 0~10V
External reference: (unipolar) max. +10V or -10V
ØSettling Time: 30µsec
ØLinearity: ±1/2 bit LSB
ØOutput driving capability: ±5mA max.
Digital I/O (DIO)
ØNumber of channels: 16 TTL compatible inputs and outputs
ØInput Voltage:
Low: Min. 0V ; Max. 0.8V
High: Min. +2.0V
ØInput Load:
Low: +0.5V @ -0.2mA max.
High: +2.7V @+20mA max.
ØOutput Voltage:
Low: Min. 0V ; Max. 0.4V
High: Min. +2.4V

6
•
Introduction
ØDriving Capacity:
Low: Max. +0.5V at 8.0mA ( Sink)
High: Min. 2.7V at 0.4mA( Source)
Programmable Counter
ØDevice: 8254
ØA/D pacer: 32-bit timer( two 16-bit counter cascaded together) with
a 2MHz time base
ØPacer Output: 0.00046 Hz ~ 100 KHz
ØCounter: One 16-bit counter with internal 2MHz time base or external
clock sourse
General Specifications
ØI/O Base Address: 16 consecutive address location
ØInterrupt IRQ: IRQ3,5,6,7,9,10,11,12,15 (9 levels)
ØDMA Channel: CH1 and CH3 (Jumper selectable)
ØConnector: 37-pin D-type connector
ØOperating Temperature: 0°C ~ 55°C
ØStorage Temperature: -20 °C ~ 80°C
ØHumidity: 5 ~ 95%, non-condensing
ØPower Consumption:
ACL-8112DG/HG: +5 V @ 430 mA typical
+12V @ 150 mA typical
ACL-8112PG: +5 V @ 450 mA typical
+12 V @ 150 mA typical
ØDimension:
ACL-8112DG/HG: 162mm(L) x 115mm(W)
ACL-8112PG: 163 mm(L) x 123 mm(W)

Introduction
•
7
1.4 Software Support
1.4.1 Programming Library
For the customers who are writing their own programs, we provide MS-
DOS Borland C/C++ programming library.
ACLS-DLL2 is the Development Kit for NuDAQ ISA-Bus Cards with
Analog I/O, windows 3.1/95(98)/NT. ACLS-DLL2 can be used for many
programming environments, such as VC++, VB, Delphi. ACLS-DLL2 is
included in the ADLINK CD. It need license.
1.4.2 LabView Driver
The ACLS-LVIEW includes the ACL-8112’s Vis, which is used to
interface with NI’s LabView software package. The ACLS-LVIEW
supports Windows-95(98)/NT. ACLS-LVIEW is included in the ADLINK
CD. It need license.

8
•
Installation
2
Installation
This chapter describes how to install the ACL-8112 series products.
Please follow the following steps to install.
ØCheck what you have (section 2.1)
ØUnpacking (section 2.2)
ØCheck the PCB and jumper location(section 2.3)
ØInstall the hardware and setup and jumpers and switch (section
2.4~2.12)
ØCabling with external devices (section 2.13)
2.1 What You Have
In addition to this User's Manual, the package includes the following
items:
ØACL-8112 Enhanced Multi-function Data Acquisition Card
ØADLINK CD
If any of these items is missing or damaged, contact the dealer from
whom you purchased the product. Save the shipping materials and
carton in case you want to ship or store the product in the future.
Note:The utilities and libraries in CD–ROM only support ACL-8112
series under DOS enviroment. If you need to develop application under
Windows 3.1. , Windows 95 or Windows NT, please contact our
dealer for purchasing software development kit ACLS-DLL2.

Installation
•
9
2.2 Unpacking
Your ACL-8112 card contains sensitive electronic components that can
be easily damaged by static electricity.
The card should be done on a grounded anti-static mat. The operator
should be wearing an anti-static wristband, grounded at the same point
as the anti-static mat.
Inspect the card module carton for obvious damage. Shipping and
handling may cause damage to your module. Be sure there are no
shipping and handing damages on the module before processing.
After opening the card module carton, extract the system module and
place it only on a grounded anti-static surface component side up.
Again inspect the module for damage. Press down on all the socketed
IC's to make sure that they are properly seated. Do this only with the
module place on a firm flat surface.
Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN
DAMAGED.
You are now ready to install your ACL-8112.

10
•
Installation
2.3 ACL-8112's Layout
CN3
VR1VR2VR3 VR4
SW1
ADS774
8112 Ver C.
DACK
VR5
. .. .. .. .. .. .. .. . . .. .. .. .. .. .. .. .
CN2
CN1
8254
JP3
JP2
EXT1 EXT2
INT
VR7VR6
DIFF
SING
DRQ
JP1
-5V
-10V
JP4
EXTTRG
INTTRG
JP6
EXTCLK
INTCLK
JP7
JP8
3 5 6 7 9 10111215NC
JP5
13 X 1 3 X
Figure 2.1-1 PCB Layout of the ACL-8112DG/HG Ver C.

Installation
•
11
CN3
VR1VR2VR3 VR4
SW1
ADS774
8112PG Ver. B1
DRQ
VR5
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CN2
CN1
8254
JP7
EXT1 EXT2
INT
JP8
-5V
-10V
JP5
EXTTRG
INTTRG
JP4
EXTCLK
INTCLK
JP2 JP1
3 5 6 7 910111215X
JP3
DC-DC
Converter
DACK
1 2 X 1 2 X
JP6
Figure 2.1-2 PCB Layout of the ACL-8112PG

12
•
Installation
2.4 Jumper and DIP Switch Description
You can change the ACL8112's channels and the base address by
setting jumpers and DIP switches on the card. The card's jumpers and
switches are preset at the factory. You can change the jumper settings
for your own applications.
A jumper switch is closed (sometimes referred to as "shorted") with the
plastic cap inserted over two pins of the jumper. A jumper is open with
the plastic cap inserted over one or no pin(s) of the jumper.
2.5 Base Address Setting
The ACL-8112 requires 16 consecutive address locations in the I/O
address space. The base address of the ACL-8112 is restricted by the
following conditions.
1. The base address must be within the rangeHex 200 to Hex 3FF.
2. The base address should not conflict with any PC reserved I/O
address. see Appendix A.
3. The base address must not conflict with any add-on card on your own
PC. Please check your PC before installing the ACL-8112.
The ACL-8112's base address of registers is selected by an 6
positions DIP switchSW1. The default setting of base address is set to
be HEX 220.All possible base address combinations are listed as
Table 2.2. You may modify the base address if the addressHEX 220 has
been occupied by another add-on card.
Figure 2.2 Default Base Address Setting
Table of contents
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