NXP Semiconductors freescale TWR-56F8200 User manual

Freescale Semiconductor Document Number: TWR56F8200UG
User Guide Rev 1, 10/2013
© 2013 Freescale Semiconductor, Inc.
_______________________________________________________________________
TWR-56F8200 Tower Board
1Overview
The MC56F8200 Tower System 32-bit MCU
module (TWR-56F8200) is an evaluation,
demonstration and development board. The
TWR-56F8200 can operate standalone or as the
main control board in a Tower system with
peripheral modules. It can also be used as the
main control board with an
APMOTOR56F8000E motor control board.
The following list summarizes the features of
the TWR-56F8200:
32-bit Digital Signal Controller module
featuring MC56F82748 in a 64-LQFP
package
Tower system compatible
Selectable power sources:
oUSB on 56F8200 card
oBarrel connector on 56F8200
card
oMotor control board plug
direct to 56F8200 card, no
Tower System connection,
plug motor control to 9 V.
oTower System elevator board
(USB or Barrel on Primary
side)
Contents
1Overview................................................... 1
2Hardware features..................................... 3
3Jumper table............................................ 15
4Getting started......................................... 18
5Revision history...................................... 35
6Appendix A –Tower system elevator
connector pin functions................................... 35
7Appendix B—TWR-56F8200 board
schematic......................................................... 38
8Appendix C—TWR-56F8200 board BOM
38
9Appendix D—TWR-56F8200 board jack
layout (top view)............................................. 43
10 Appendix E—TWR-56F8200 board jack
layout (bottom view)....................................... 44

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Filtered power for VDDA and VSSA on the 32-bit MC56F82748DSC
Optional 8 MHz crystal circuit for the MC56F82748 DSC
Nine LEDs controlled by the MC56F82748 DSC
Two trimmer potentiometers for user to change analog input voltage
Motor Control Board connector for the APMOTOR56F8000E motor control board
Auxiliary Signal connector
Four thermistors for single-ended or differential analog inputs to the MC56F82748 DSC
CAN transceiver, header, and termination
Two push-buttons for user input or interrupts to the MC56F82748 DSC
Reset push-button for the MC56F82748 DSC
JTAG header for the MC56F82748 DSC with header to disconnect from OSBDM/OSJTAG
Headers to connect SCI signals to either USB bridge with CDC(one channel) or elevator board
(two channels) or connect one to each
Expansion via Primary Elevator connector
MC9S08JM60 MCU with a 4 MHz crystal provides:
oOpen Source Debug (OSBDM/OSJTAG) circuit
oUSB- to-SCI bridge with CDC and other techniques supported by third parties
oSimultaneous OSBDM/OSJTAG and USB -to-SCI bridge functions with no header
required to select
oHeader with enabled boot loader allows easy upgrade to latest S08 firmware pushed
down by CodeWarrior
oBDM header for the MC9S08JM60 MCU
oStatus and Target Power indicator LEDs
oControl of semiconductor switch to supply power to board from USB
oVoltage translators between 5 V MC9S08JM60 MCU chip and 3.3 V MC56F82748 DSC
chip
1.1 Block diagram
The block diagram for the TWR-56F8200 board is shown in this figure.

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From an engineering perspective, the measuring instrument is controlled by legally relevant and legally
non-relevant software applications (see Error! Reference source not found.).
MCU/DSC
Legally relevant
software
Legally non-
relevant software
Display/Printer/
Communication Keyboard
HAN
RTC
NVM
ADC
billing
ADC
billing
ADC
Aux.
Software
separation
Legally non-relevant applications perform all remaining software tasks including communicating
digitally-signed packets to the utilities and providing data to equipment attached to a Home Area
Figure 2. Kinetis M block diagram
1.2 Reference documents
The documents listed below should be referenced for more information on the Freescale Tower system
and the TWR-56F8200. See www.freescale.com/MC56F827xx, www.freescale.com/TWR-56F8200,
and www.freesale.com/Tower for the latest revision of all applicable documentation (if and when
available).
1. Freescale Tower Electromechanical Specification
2. TWR-56F8200 Quick Start Guide
3. TWR-56F8200 Sample code
4. MC56F82XXX Reference Manual
5. MC56F82XXX Data Sheet
6. MC56F82XXX Chip Errata [if exists]
7. USB Bootloader for the MC9S08JM60 (document number AN3561)
8. APMOTOR56F8000e Motor Control Demonstration System User Guide
9. BLDC Motor Control with Hall Sensors Driven by DSC using TWR-56F8257 and TWR-MC-
LV3PH (document number AN4413)
2Hardware features
This section provides more details about the features and functionality of the TWR-56F8200.
A schematic drawing of the TWR-56F8200 showing the jack locations is given in Appendix D—TWR-
56F8200 board jack layout (top view). Features are discussed in the following sections.
Motor Control&
Aux Connectors
Tower Elevator Expansion Connectors
(SPI, I2C, ADC, FEC, TPM, SCI, KB, etc.)
5.0V
External Connectors
3.3V
Freescale Device
External Connectors
Interface Circuits
Power
OSBDM (MC9S08JM60 MCU
Debug, Power, SCI Headers)
Headers
5.0V
External Connectors
USB
Mini-AB
Voltage
Translators
BDM
Header
LEDs & Buffers (9)
IRQ PB & HDRs (2)
RESET PB
Thermistors & HDRs
(4)
Analog Filters
Microphone (optional)
CAN XCVR & HDR
Barrel Power Connector
Power Selection HDRs
Voltage Regulator
5V-
9V
3.3V
MC56F82748
Digital Signal
Controller
JTAG
Header
Boot load HDR
Figure 1. TWR-56F8200 block diagram

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2.1 Tower system MCU module
The TWR-56F8200 board is an MCU module designed for standalone use (or with a Freescale Tower
system) and complies with the electrical and mechanical specification as described in Freescale Tower
Electromechanical Specification [1]. Connection to the Tower system is through two expansion card-
edge connectors that interface to the Elevator boards in a Tower system: the Primary and Secondary
Elevator connectors. The Primary Elevator connector, comprised of sides A and B, is utilized by the
TWR-56F8200, while the Secondary Elevator connector only makes connections to ground (GND). On
sheet 8 of the TWR-56F8200-SCH (See Appendix B—TWR-56F8200 board schematic), the J500A and
J500B symbols have names assigned to the card edge fingers that correspond with the normal Tower
system pin assignments.
Note: On the top and bottom of one edge of the TWR-56F8200 board, there is a WHITE BELT; the
card-edge connectors next to the WHITE BELT on the TWR-56F8200 board should be connected to the
Primary Elevator board which uses the WHITE PCI connector. The card-edge connectors without the
WHITE BELT on the TWR-56F8200 board should be connected to the secondary Elevator board (or left
unconnected) using the Black PCI connector. This instruction overrides any silkscreen information that
may be present, such as the words “Primary” or “Secondary” on the TWR-56F8200, since early
revisions had this reversed.
2.2 System power
The TWR-56F8200 board has three power rails: P5V_USB, P3_3V, and P3_3V/5V. The sources and
usage of these power rails is described as follows.
2.2.1 P5V_USB
The P5V_USB power rail is derived from the mini-B USB connector at J18 and the inductor at L2. It is
used to power the on board OSBDM/OSJTAG/Serial Bridge circuit. This consists of the
OSBDM/OSJTAG MCU at U6, several pullup resistors at R13, R14, R15, R527, and R528, the USB
power switch at U501, and the STATUS and TPWR LEDs at D12 and D13. If there is no USB cable
connected to J18, there is no power on this rail and all these circuits are powered down.
2.2.2 P3_3V
The P3_3V power rail is derived from either of the following sources.
the P3_3V_MOTOR power net from the motor control board connector at J501,
the P3_3V_ELEV power net from the Tower connector at J500, or
the onboard 3.3 V regulator at U1
The selection of any of these power sources is made with a shunt from J7-2 (jumper J7 pin 2) to another
pin of J7 or to J6. A shunt from J11-2 (Jumper J11-pin2) to another pin of J11 or to J10, is used to select
power to the regulator from the following sources:

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the P5V_TRG_USB power net out of the USB switch at U501,
the P5V_ELEV power net from the elevator connection at J500 pins A1 and B1, or
the PWR_IN power net from the 2mm barrel jack at J3 through resettable fuse F1.
Table 6 shows the operation of the different shunt positions. The barrel jack input is protected from
reverse voltage inputs by diode D11. The input to the barrel jack may be from a 5-9 V source and needs
to be center-positive.
The P3_3V power rail provides power to the majority of the circuits on the board including the
MC56F82748 (including the analog power pins through L500 and L501), inverters at U500 and U502, a
buffer at U505, the onboard LEDs at D1-D9, the thermistor divider circuits at RT1-RT4, and the pullup
resistors at R2, R3, R11, R565, R570, and R562.
2.2.3 P3_3V/5V
The P3_3V/5V power rail is derived from the diode OR (using D500 and D501) of:
the P5V_ELEV power net from the elevator connection (J500 pins A1 and B1),
the P5V output of the USB power switch at U501, or c) the P3_3V power rail from J7.
When there is a USB cable connected or when the Tower elevator boards are connected, this power rail
will be a Schottky diode drop (about 0.3V) below the 5 V power nets. When there is no 5 V source, this
power rail will be a Schottky diode drop below the P3.3V power rail. This allows the inputs of the ICs
powered by this rail to stay in a high-impedance state instead of loading down the inputs through the
input protection diodes as would happen if there were no power supplied to the buffers.
2.2.4 Default power configuration
The TWR-56F8200 board default power configuration uses the OSBDM/OSJTAG USB port for all
power. As soon as the OSBDM/OSJTAG firmware has started, it negotiates with the host PC USB port
for full USB power. Once approved, it enables the 5V USB power switch (U501) which provides 5 V to
the P3_3V/5 V power rail and to the 3.3 V regulator (U1) through headers J10 and J11. Likewise, the
onboard voltage regulator provides 3.3 V to the P3_3V power rail through headers J6 and J7. The 3.3 V
regulator is able to provide up to 700 mA current, subject to the power dissipation and temperature
limits of the device.
2.3 MC56F82748 DSC
The primary circuits on the board are related to the MC56F82748 DSC. This part is supplied in a
surface-mounted 64-pin LQFP package at U2. Although the board was laid out to allow a ZIF socket at
U3 in parallel to the chip at U2, the TWR-56F8200 is only available for purchase with the surface-
mounted chip.

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2.3.1 Clock sources for the MC56F82748 DSC
Three options are available for clocking the MC56F82748 device:
Oscillator internal to the MC56F82748 chip —approximately 8 MHz.
8 MHz crystal
External clock input from Primary Tower Connector or the AUX Connector.
The internal oscillator is used to clock the MC56F82748 MCU immediately following reset. This is the
default operation. In this mode, the 0-ohm resistors at R4 and R10 allow the GPIOC0 and GPIOC1 pins
of the MC56F82748 MCU to be used as inputs or outputs.
To use an external crystal with the MC56F82748, 0-ohm resistors R4 and R10 must be removed and
placed in the R5 and R7 positions. The desired crystal, load capacitors, and parallel resistor (if needed)
must be soldered to the board at Y1, C5, C6, and R6. (These components are not provided with the
TWR-56F8200 kit.) Following reset, reconfigure the GPIOC0 and GPIOC1 pins to the XTAL and
EXTAL functions to allow the use of an external crystal.
To use an external clock for the MC56F82748, make sure the 0-ohm resistors are installed at R4 and
R10 and removed from R5 and R7. Provide a clock signal on either the Primary Tower Connector
J500A - pin B24 (the pin designated as CLOCKIN0), or on the AUX connector J502 - pin 8. Following
reset, configure the GPIOC0 pin to the CLKIN input function. In this mode, the 0-ohm resistors at R10
allows the GPIOC1 pin of the MC56F82748 (pin 10) to be used as an input or output.
2.3.2 Serial I/O source select headers
The TWR-56F8200 board allows the UART functions of the MC56F82748 DSC to be connected to the
serial interface of the Primary Tower Connector J500A or through a USB bridge to the host PC using the
OSBDM/OSJTAG MCU (U6). The selection of the RXD connections is done as shown in Table 1.The
selection of the TXD connections is done as shown in Table 2.
Table 1. J8-RXD source select header
Pin#
Connected signal
Description
1
ELEV_RXD0 at J500A pin A41
Shunt pins 1 and 2 together to connect the DSC
RXD0 pin to the primary Tower Connector
RXD0 pin. (This is a default position.)
2
GPIOF8/RXD0/TB1 from the
56F82748 DSC –pin 6 (RXD0
function)
—

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Pin#
Connected signal
Description
3
RXD_SEL from the USB bridge
function on the OSBDM/OSJTAG
MCU.
Shunt pins 2 and 3 together to connect
the DSC RXD0 pin to the USB serial
bridge function.
Shunt pins 3 and 4 together to connect
the DSC RXD1 pin to the USB serial
bridge function.
4
GPIOF5/RXD1/XB_OUT5 from the
56F82748 DSC –pin 42 (RXD1
function)
—
5
ELEV_RXD1 at J500 pin A43
Shunt pins 4 and 5 together to connect the DSC
RXD1 pin to the primary Tower Connector
RXD1 pin. (This is a default position.)
Table 2. J9–TXD source select header
Pin #
Connected Signal
Description
1
ELEV_TXD0 at J500A pin A42
Shunt pins 1 and 2 together to connect the DSC
TXDO pin to the primary Tower Connector
TXD0 pin. (This is a default position.)
2
GPIOC2/TXD0/TB0/XB_IN2/CLKO
from the 56F82748 DSC –pin 5
(TXD0 function)
—
3
TXD_SEL to the USB bridge function
on the OSBDM/OSJTAG MCU.
Shunt pins 2 and 3 together to connect
the DSC TXD0 pin to the USB serial
bridge function.
Shunt pin 3 and 4 together to connect the
DSC TXD1 pin to the USB serial bridge
function.
4
GPIOF4/TXD1/XB_OUT4 from the
56F82748 DSC –pin 41 (TXD1
function)
—
5
ELEV_TXD1 at J500 pin A44
Shunt pins 4 and 5 together to connect the DSC
TXD1 pin to the primary Tower Connector
TXD1 pin. (This is a default position.)

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As can be seen in the tables, the 56F82748 DSC serial signals may be connected to either the Tower
serial signals or to the USB bridge chip; however, only one channel may be connected to the USB
bridge chip. If the associated 56F82748 DSC serial pins are not being used for the serial functions, the
shunts should be removed from those pins. For more information on the USB Serial Bridge function, see
USB serial bridge interface.
There are some tower boards available, such as TWR-SER that provide serial ports based on these
elevator connections. These boards can work with the TWR-56F8200, if configured and installed in the
same Tower system.
2.3.3 LEDs controlled by the MC56F82748 DSC
There are nine LEDs with buffers connected to the MC56F82748 DSC. Inverting buffers (U500A-F and
U502D-F) isolate the LEDs from the DSC pins by providing high-impedance inputs. The LEDs are
powered by the P3_3V rail and each LED draws about 5 mA current. This table shows the DSC pin
names associated with each LED.
Table 3. LEDs controlled by the MC56F82748 DSC
MC56F82748 DSC
Pin name
MC56F82748
Pin number
LED
Reference
LED
Label
LED
Color
GPIOE0/PWM0B
45
D1
E0
Green
GPIOE1/PWM0A
46
D2
E1
Yellow
GPIOE2/PWM1B
47
D3
E2
Green
GPIOE3/PWM1A
48
D4
E3
Yellow
GPIOE4/PWM2B/XB_IN2
51
D5
E4
Green
GPIOE5/PWM2A/XB_IN3
52
D6
E5
Yellow
GPIOE6/PWM3B/XB_IN4
53
D7
E6
Green
GPIOE7/PWM3A/XB_IN5
54
D8
E7
Yellow
GPIOF6/TB2/PWM3X
94
D9
F6
Amber
2.3.4 Motor control connector
The TWR-56F8200 board may be connected to a motor control board APMOTOR56F8000E. The motor
control connector (J501) is at the bottom of the board to provide a convenient connection to the motor
control board.

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Some of the MC56F82748 DSC pins are connected to the motor control connector. The pins associated
with analog inputs have 100 Ω resistors in series to provide some ESD protection for the analog inputs
of the DSC. The pins providing analog signals from the motor control board have 2200 pF capacitors
with the 100 Ω resistors to provide a low-pass filter. The connector pinout is shown in Table 4.
Table 4. Motor control connector pinout
Pin
#
MC56F82748 DSC signal
Pin
#
MC56F82748 DSC signal
1
P3_3V_MOTOR
2
GPIOB7/ANB7&ANC15&CMPB_IN2
(With 100 Ωin series)
3
GND
4
RESETB/ GPIOD4
(With 0 Ωin series –remove to isolate)
5
GPIOF4/TXD1/XB_OUT8
6
GPIOA3/ANA3&VREFLA&CMPA_IN2
(With 100 Ωin series)
7
GPIOF3/SDA1/XB_OUT7
8
GND
9
GPIOE1/PWMA_0A
10
GPIOA0/ANA0&CMPA_IN3/CMPC_O
(With 100 Ω, 2200 pF low-pass filter)
11
GPIOE0/PWMA_0B
12
GPIOA1/ANA1&CMPA_IN0
(With 100 Ω, 2200 pF low-pass filter)
13
GPIOC3/TA0/CMPA_O/RXD0/CLKIN1
14
GPIOA2/ANA2&VREFHA&CMPA_IN1
(With 100 Ω, 2200 pF low-pass filter)
15
GPIOC13/TA3/XB_IN6/EWM_OUT_B
16
GND
17
GPIOC4/TA1/CMPB_O/XB_IN8/EWM_OUT_B
18
GPIOB0/ANB0&CMPB_IN3
(With 100 Ω, 2200 pF low-pass filter)
19
GPIOC6/TA2/XB_IN3/CMP_REF
20
GPIOB1/ANB1&CMPB_IN0
(With 100 Ω, 2200 pF low-pass filter)
21
GPIOC15/SCL0/XB_OUT5
22
GPIOB2/ANB2&VREFHB&CMPC_IN3
(With 100 Ω, 2200 pF low-pass filter)
23
GPIOC14/SDA0/XB_OUT4
24
GND
25
TDI /GPIOD0
26
GPIOE7/PWMA_3A/XB_IN5/PWMB_2A
27
TDO/ GPIOD1
28
GPIOE6/PWMA_3B/XB_IN4/PWMB_2B

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Pin
#
MC56F82748 DSC signal
Pin
#
MC56F82748 DSC signal
29
TCK/GPIOD2
30
GPIOE3/PWMA_1A
31
TMS /GPIOD3
32
GPIOE2/PWMA_1B
33
GPIOB3/ANB3&VREFLB&CMPC_IN0
(With 100 Ωin series)
34
GPIOE5/PWMA_2A/XB_IN3
35
GPIOB4/ANB4&ANC12&CMPC_IN1
(With 100 Ωin series)
36
GPIOE4/PWMA_2B/XB_IN2
37
GPIOB5/ANB5&ANC13&CMPC_IN2
(With 100 Ωin series)
38
GPIOA4/ANA4&ANC8&CMPD_IN0
(With 100 Ωin series)
39
GPIOB6/ANB6&ANC14&CMPB_IN1
(With 100 Ωin series)(100K Trimpot in parallel)
40
GPIOA5/ANA5&ANC9
(With 100 Ωin series)(100K Trimpot in
parallel)
2.3.5 Auxiliary connectors
In addition to the motor control connector, the TWR-56F8200 board also provides two auxiliary
connectors J502 at the bottom of the board. These connectors provide access to the MC56F82748 DSC
signals that are not covered by the motor control connector. The pins associated with analog inputs have
100 Ωresistors in series to provide some ESD protection for the analog inputs of the DSC. The
connector pinout is shown in this table.
Table 5. Auxiliary connector J502 pinout
Pin #
MC56F82748 DSC signal
Pin #
MC56F82748 DSC signal
J502-1
GPIOF0/XB_IN6/TB2/SCK1
J502-2
GPIOA6/ANA6&ANC10
(With 100 Ωin series)
J502-3
GPIOF1/CLKO1/XB_IN7/CMPD_O
J502-4
GPIOA7/ANA7&ANC11
(With 100 Ωin series)
J502-5
GPIOF2/SCL1/XB_OUT6
J502-6
GND
J502-7
GPIOF5/RXD1/XB_OUT9
J502-8
GPIOC0/EXTAL/CLKIN0
J502-9
GPIOF6/TB2/PWMA_3X/PWMB_3X/XB
_IN2
J502-10
GPIOC1/XTAL

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Pin #
MC56F82748 DSC signal
Pin #
MC56F82748 DSC signal
J502-11
GPIOF7/TB3/CMPC_O/SS1_B/XB_IN3
J502-12
GPIOC2/TXD0/TB0/XB_IN2/CLKO
0
J502-13
GPIOF8/RXD0/TB1/CMPD_O
J502-14
GPIOC5/DACO/XB_IN7
J502-15
GPIOC11/CANTX/SCL1/TXD1
J502-16
GPIOC7/SS0_B/TXD0
J502-17
GPIOC12/CANRX/SDA1/RXD1
J502-18
GPIOC8/MISO0/RXD0/XB_IN9
J502-19
GND
J502-20
GPIOC9/SCK0/XB_IN4
J502-21
No Connection
J502-22
GPIOC10/MOSI0/XB_IN5/MISO0
J502-23
No Connection
J502-24
No Connection
J502-25
No Connection
J502-26
No Connection
2.3.6 Tower system elevator connectors
The TWR-56F8200 board features two expansion card-edge connectors that interface to Elevator boards
in a Tower System: the Primary and Secondary Elevator connectors. The Primary Elevator connector,
comprised of sides A and B, is utilized by the TWR-56F8200 board, while the Secondary Elevator
connector only makes connections to ground (GND). Table 7 lists the pin functions for the Primary
Elevator Connector.
2.3.7 Thermistors as analog inputs
The TWR-56F8200 board provides four thermistors (RT1–RT4) near the corners of the board that can
be used as single-ended or differential analog inputs to the MC56F82748 DSC as can be seen on sheet 6
of the schematic (See Appendix B—TWR-56F8200 board schematic). In addition to each thermistor,
there is a resistor between the thermistor and P3_3V and another resistor between the thermistor and
ground. All the thermistors are 10 kΩ parts but the associated divider chain uses different resistors. This
makes the voltage across the thermistor larger or smaller and provides the ability to try the different gain
settings on the analog channels. All the four thermistor circuits are designed to provide useable
differential inputs over the temperature range of 90 °C to –20 °C. RT2 and RT4 both give a differential
voltage of ~1.65 V at 25 °C. RT1 gives a differential voltage of 0.10 V and RT3 gives a differential
voltage of 0.28 V at 25 °C.
In addition to the thermistor voltage divider chain, each thermistor has a 0.1 µF capacitor in parallel.
Each thermistor circuit also has a header that allows the thermistor to be disconnected from the analog
inputs to the DSC. If a user wishes to apply an external analog value, these headers may be removed and
the external analog signal attached to the DSC side of the headers. Finally, each analog input to the DSC
has a 100 Ωseries resistor and a 2200 pF capacitor as a low pass filter. This helps protect the DSC from

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electrostatic discharges and lowers the impedance of the analog signal so that it can be sampled with less
noise.
2.3.8 CAN transceiver
The TWR-56F8200 board has a CAN transceiver circuit that may be connected to the CAN pins of the
DSC. The CAN transceiver (U503) can be connected to the GPIOC11/CANTX/SCL1/TXD1 and
GPIOC12/CANRX/SDA1/RXD1 pins of the DSC through the header at J16. Installing a shunt from pin
1 to pin 2 connects the TXD nets and installing a shunt from pin 3 to pin 4 connects the RXD nets.
Note: The GPIOC11/CANTX/SCL1/TXD1 and GPIOC12/CANRX/SDA1/RXD1 nets also go to the
primary elevator edge connector (J500A) pins B41 and B42 and to the auxiliary connector (J502) pins
15 and 17. When using these nets for CAN communications, care must be taken that these nets are not
driven from these other connectors.
The transceiver is capable of running from 3.3 V and is powered by the P3_3V/5V power rail. The
transceiver output is connected to header J13 with CANH connected to pin 4 and CANL connected to
pin 3. A 120 Ωparallel termination resistor, R560, may be connected between these nets by installing a
shunt on header J15.
2.3.9 IRQ or input push-buttons
The TWR-56F8200 board has two push-buttons (SW1 and SW2) that can be used to provide inputs or
interrupts to the DSC. Each has a 10 kΩ pullup resistor to P3_3V and a 0.1 µF capacitor to ground to
minimize bounce on the output.
The push-button SW1 is connected to header J4 where the switch output can be connected to either DSC
pin GPIOC2/TXD0/TB0/XB_IN2/CLKO (default) or GPIOF6/TB2/PWM3X depending on the position
of the shunt on the header (pin 1 to pin 2 is the default). Similarly, push-button SW2 is connected to
header J5 where the switch output can be connected to either DSC pin GPIOF8/RXD0/TB1 (default) or
GPIOF7/TB3 depending on the position of the shunt on the header (pin 1 to pin 2 is the default).
If the push-button switches are not being used as an interrupt, or other purpose, it is best to
remove the shunt to the DSC so that the 0.1 µF capacitor is not loading down the DSC pins.
2.3.10 RESET
The GPIOD4/RESET_B pin of the DSC is connected to the motor control connector and the Tower
connector but also to a push-button (SW3) and through buffers to the OSBDM/OSJTAG chip. It is
pulled to P3_3V by a 10 kΩ resistor. It may be pulled low by the push-button or by Q1 in response to a
high output from the OSBDM/OSJTAG chip (pin 1) on the TRESET_OUT net. The state of the
GPIOD4/RESET_B signal is provided to the OSBDM/OSJTAG chip through a voltage translator
(U504B). This buffer is powered by the P3_3V/5V power rail so that its input will remain high-
impedance when there is no USB cable connected. The buffered RESET signal is provided to pin 33 of
the OSBDM/OSJTAG chip and is used by the OSBDM/OSJTAG program in that chip.

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2.3.11 JTAG header and OSBDM/OSJTAG disconnect header
The TWR-56F8200 board includes an OSBDM/OSJTAG circuit as a debug interface to the C56F82748
DSC for normal purposes. If the user desires to use a different debugger connection, header J14 provides
a connection point for an external JTAG hardware debugger. If an external debugger is connected to the
JTAG header, the shunts at J21 (pins 1 to 2, 3 to 4, 5 to 6, and 7 to 8) which connect the
SBDM/OSJTAG circuit to the JTAG signals should be removed, allowing the external debugger to
control the JTAG port, rather than the JM60.
The TWR-56F8200 board provides a 2.2 kΩ pullup resistor to 3.3 V on the TMS line. If an external
JTAG hardware debugger also has a pullup on this line, the external debugger may not be able to pull
the TMS line low. If this happens, remove one of the pull up resistors on the TMS line.
2.4 OSBDM/OSJTAG
2.4.1 Debug interface
An onboard MC9S08JM60 based Open Source BDM (OSBDM/OSJTAG) circuit provides a debug
interface to the MC56F82748. A standard USB A male to mini-B male cable (supplied with the tower
card) can be used for debugging via the USB connector, J18.
2.4.2 USB serial bridge interface
The onboard MC9S08JM60 can also be used as a USB-to-serial bridge interface for the UART signals
from the MC56F82748 DSC. This bridge circuit is described in detail in Serial I/O source select headers.
The RXD_SEL signal goes to the MC56F82748 DSC. The USB bridge chip is powered by 5 V; so it has
a 5 V output. The buffer (U505) is able to accept the 5 V signal from the USB bridge chip (T_TXD1)
and converts it to the 3.3 V signal (RXD_SEL) for the DSC. The buffer output is enabled by an inverted
RTS signal (TXD_RXD_EN_B) from the USB bridge chip. If there is no USB connection to the TWR
board, the RTS signal is not driven and the 3.3 V powered inverter (U502C) input is biased low
disabling the output of the buffer.
In a similar way, TXD_SEL is a 3.3 V signal from the MC56F82748 DSC. The USB bridge chip is
expecting a 5 V input on T_RXD1. The buffer between these two signals (U504C) is powered by
P3_3V/5V. It will accept the 3.3 V input from the DSC and convert it to the 5 V signal needed by the
USB bridge chip. The buffer output is enabled by the same inverted RTS signal (TXD_RXD_EN_B)
discussed above. If there is no USB connection to the TWR board, the RTS signal is not driven and the
5V powered buffer is disabled; so nothing is driving the powered down USB bridge chip.
The serial interface signals from the MC56F82748 DSC may be routed to the MC9S08JM60 serial
interface via header and Berg straps. Using the USB serial bridge, the MC9S08JM60 will convert the
serial interface data into USB packets and send them to the host PC where they may be handled by a PC
application normally conversant with a serial port.

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14 Freescale Semiconductor Inc.
2.4.3 Clocking the OSBDM/OSJTAG MCU (MC9S08JM60)
The MC9S08JM60 MCU uses an onboard 4 MHz external crystal circuit (Y2, R16, C7, and C9) for its
clock. There are no user options for clocking the MC9S08JM60 MCU.
2.4.4 Reserved function select header
Header J20 selects whether the onboard MC9S08JM60 MCU operates as an OSBDM/OSJTAG debug
interface or as a USB Serial Bridge interface on older versions of S08 firmware such as may have
existed on prototypes of the TWR56F8200. Leaving the shunt on the header enables the
OSBDM/OSJTAG debug interface. Removing the shunt on header J20 enables the USB Serial Bridge
interface. The header J20 is subsequently reserved for future use.
2.4.5 Bootloader enable
In addition to the OSBDM/OSJTAG Debug interface and the USB Serial Bridge interface, the
MC9S08JM60 device used in the OSBDM/OSJTAG circuit is preprogrammed with a USB boot loader.
The USB boot loader will run following a power-on reset if a shunt is installed on header J17. This
allows in-circuit reprogramming of the JM60 flash memory via USB. This enables the
OSBDM/OSJTAG firmware to be upgraded by the user when upgrades become available. In normal
OSBDM/OSJTAG or USB Serial Bridge operation, this shunt must be left open. For details on the USB
boot loader, see USB Bootloader for the MC9S08JM60 (document number AN3561), available on
freescale.com.
The USB boot loader communicates with a GUI application running on a host PC. The GUI application
can be found on freescale.com using the search keyword “JM60 GUI”. See Section 2.5 “PC Driver and
PC GUI Tool,”and Section 3.3 “Running PC GUI Tool,”of USB Bootloader for the MC9S08JM60
(document number AN3561) for details on installing and running the application.
2.4.6 BDM header
The BDM header at J22 is used for initial programming of the MC9S08JM60 MCU or if reprogramming
when the boot loader fails. An external S08 BDM debugger would be connected to J22 and used to
program the MCU. This is not expected to be a normal user interface; however it is useful if the JM60
device is inadvertently reprogrammed with firmware that is not functional.
2.4.7 OSBDM/OSJTAG status LEDs
The MC9S08JM60 OSBDM/OSJTAG MCU controls two status LEDs at D12 and D13. See the
OSBDM/OSJTAG instructions for the meaning of the LEDs.
2.4.8 OSBDM/OSJTAG voltage translation
Since the OSBDM/OSJTAG MCU runs from 5 V and the 56F82748 DSC runs from 3.3 V, there needs
to be voltage translation between the two circuits. This is done through U505, U504A, and U502B.
U505 has 5 V tolerant inputs and provides 3.3 V signals (TCK, TDI, and TMS) to the DSC’s JTAG pins
through the shunts on header J21. U504A is powered by the P3_3V/5V rail and translates the 3.3 V
TDO signal from the DSC to a 5 V signal for the OSBDM/OSJTAG MCU. The outputs of both these

TWR-56F8200 Tower Board, Rev. 1, 10/2013
Freescale Semiconductor Inc. 15
translators are high-impedance if the signal OUT_EN_B goes high. This happens if the
OSBDM/OSJTAG circuit looses power (no power to the USB connector). In that case, the OUT_EN
signal from the OSBDM/OSJTAG MCU (pin 15) is biased low by R12. The inverter at U502B then
drives OUT_EN_B high in response. For additional information, see USB serial bridge interface.
3Jumper table
There are several headers provided for isolation, configuration, and feature selection. See Table 6 for
details. The default shunt positions are shown in bold.
Table 6. TWR-56F8200 jumper table
Jumper
Function
Shunts
Description
Power use
case
J1
Thermistor RT1 Connect
1-2, 3-4
Connect RT1 circuit to the
MC56F82748 DSC
none
Disconnect RT1 circuit from the
MC56F82748 DSC
J2
Thermistor RT2 Connect
1-2, 3-4
Connect RT2 circuit to the
MC56F82748 DSC
none
Disconnect RT2 circuit from the
MC56F82748 DSC
J4
IRQ1 Select
1-2
Connect SW1 to MC56F82748
DSC pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO
2-3
Connect SW1 to MC56F82748 DSC
pin GPIOF6/TB2/PWM3X
none
Disconnect SW1 from the
MC56F82748 DSC
J5
IRQ0 Select
1-2
Connect SW2 to MC56F82748
DSC pin
GPIOF8/RXD0/TB1
2-3
Connect SW2 to MC56F82748 DSC
pin
GPIOF7/TB3
none
Disconnect SW2 from the
MC56F82748 DSC
J6 and
J7
3.3 V Source Select
J6-1 to
J7-2
Connect the on-board voltage
regulator to the P3_3V power rail
1, 2, 3a
J7-1 to
J7-2
Connect P3_3V_MOTOR to the
P3_3V power rail (power the 3.3V
rail from the motor control
connector)
4
J7-2 to
J7-3
Connect P3_3V_ELEV to the P3_3V
power rail (power the 3.3V rail from
the Tower connector)
3
J7-2
open
Disconnect the P3_3V power rail –
no power

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16 Freescale Semiconductor Inc.
Jumper
Function
Shunts
Description
Power use
case
J8
RXD Source Select (note that
only one connection can be
made to pin 3 at a time)
1-2
Connect ELEV_RXD0 from the
Tower connector to MC56F82748
DSC pin GPIOF8/RXD0/TB1
2-3
Connect RXD_SEL from the USB
Serial Bridge to MC56F82748 DSC
pin GPIOF8/RXD0/TB1
Pin 2
open
Disconnect MC56F82748 DSC pin
GPIOF8/RXD0/TB1
3-4
Connect RXD_SEL from the USB
Serial Bridge to MC56F82748 DSC
pin GPIOF5/RXD1/XB_OUT5
4-5
Connect ELEV_RXD1 from the
Tower connector to MC56F82748
DSC pin GPIOF5/RXD1/XB_OUT5
Pin 4
open
Disconnect MC56F82748 DSC pin
GPIOF5/RXD1/XB_OUT5
J9
TXD Source Select (note that
only one connection can be
made to pin 3 at a time)
1-2
Connect ELEV_TXD0 from the
Tower connector to MC56F82748
DSC pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO
2-3
Connect TXD_SEL from the USB
Serial Bridge to MC56F82748 DSC
pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO
Pin 2
open
Disconnect MC56F82748 DSC pin
GPIOC2/TXD0/TB0/XB_IN2/CLKO
3-4
Connect TXD_SEL from the USB
Serial Bridge to MC56F82748 DSC
pin GPIOF4/TXD1/XB_OUT4
4-5
Connect ELEV_TXD1 from the
Tower connector to MC56F82748
DSC pin GPIOF4/TXD1/XB_OUT4
Pin 4
open
Disconnect MC56F82748 DSC pin
GPIOF4/TXD1/XB_OUT4
J10 and
J11
5 V Source Select
J10-1 to
J11-2
Connect the power in barrel
connector (through fuse F1) to the
input of the 3.3V voltage regulator
1
J11-1 to
J11-2
Connect P5V_TRG_USB (the
switched USB 5V) to the input of
the 3.3V voltage regulator
2
J11-2 to
J11-3
Connect P5V_ELEV to the input of
the 3.3V voltage regulator
3a
J11-2
open
Disconnect the input of the 3.3V
voltage regulator
3, 4
J12
Unused
open
Unused
J15
CAN Termination Enable
1-2
Connect the 120 ohm CAN
termination resistor

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Freescale Semiconductor Inc. 17
Jumper
Function
Shunts
Description
Power use
case
open
No CAN termination
J16
CAN Enable
1-2, 3-4
Connect the CAN transceiver TXD
and RXD to MC56F82748 DSC
pins GPIOC11/CANTX/SCL1/TXD1
GPIOC12/CANRX/SDA1/RXD1
open
Disconnect the CAN transceiver
J17
MC9S08JM60 Bootload Enable
1-2
Enable USB bootloading of the
MCU Flash memory
open
Disable bootloading
J19
Thermistor RT3 Connect
1-2, 3-4
Connect RT3 circuit to the
MC56F827 DSC
none
Disconnect RT3 circuit from the
MC56F82748 DSC
J20
RESERVED /
OSBDM/OSJTAG Enable
1-2
Reserved-deprecated
none
Reserved-deprecated
J21
OSBDM/OSJTAG Connect to
JTAG
1-2, 3-4,
5-6, 7-8
Connect the OSBDM/OSJTAG
debug signals (JTAG) to the
MC56F82748 DSC JTAG pins
none
Disconnect OSBDM/OSJTAG from
the MC56F82748 DSC
J23
Thermistor RT4 Connect
1-2, 3-4
Connect RT4 circuit to the
MC56F827 DSC
none
Disconnect RT4 circuit from the
MC56F82748 DSC
Due to the large number of use cases for the TWR-56F8200 board, the following power use cases are
referred in the table above to ease the configuration of the board with Berg Straps and/or wires for
power configurations.
The use cases enumerated are:
1. TWR-56F8200 standalone with the barrel power connector and the U-MULTILINK or
USB-TAP. Use this mode for initial programming of the board, especially prior to using
it to control high voltages.
2. TWR-56F8200 standalone with the USB connector. Use this for OSJTAG programming
of the board. No other hardware is required than the board and cable supplied for
connection to USB of computer.
3. TWR-56F8200 in Tower system driving TWR-MC-LV3PH board, also in Tower system,
or for any other Tower application other than APMOTOR56800E motor driving in
Tower. (3a is alternative connection.)
4. TWR-56F8200 in Tower system driving APMOTOR56800E (equipped with three 1 inch
#4 hardware plastic standoffs (female both ends) with six #4 screws).
5. TWR-56F8200 driving APMOTOR56800E outside the Tower system. (Same power
configuration as 4).

TWR-56F8200 Tower Board, Rev. 1, 10/2013
18 Freescale Semiconductor Inc.
4Getting started
4.1 Introduction
In this section, you will find details that give step by step instructions on how to set up your Tower
system for several different scenarios:
Debugging new application on TWR-56F8200 using MultiLink
oSet up a new project application interfacing with the Universal Multilink interface
Debugging new application on TWR-56F8200 using OSJTAG
oSet up a new project application interfacing with the standard TWR interface, OSJTAG
Programming TWR board with the Thermistor demo using Universal Multilink
oSet up the standard out of box demo using the Universal Multilink interface
Programming TWR board with thermistor demo using OSBDM/OSJTAG
oSet up the standard out of box demo with the standard TWR interface, OSJTAG
Programming TWR board with a three-phase motor demo using Universal Multilink
oSet up the TWR-MC-LV3PH BLDC motor kit to spin the motor, controlled via the
hardware buttons, interfacing with the Universal Multilink.
Programming TWR board with a three-phase motor control demo using
OSBDM/OSJTAG
oSet up the TWR-MC-LV3PH BLDC motor kit to spin the motor, controlled via the
hardware buttons, interfacing with OSJTAG.
Three-phase motor control demo controlled via FreeMASTER using P&E Universal
Multilink
oSpin the TWR-MC-LV3PH BLDC motor controlling it from your PC via FreeMASTER,
interfacing with Universal Multilink.
Three-phase motor control demo controlled via FreeMASTER using OSBDM/ OSJTAG
oSpin the TWR-MC-LV3PH BLDC motor, controlled from your PC via FreeMASTER,
interfacing with OSJTAG.
You can also view a video of how to set up the scenarios at freescale.com/TWR-56F8200.
4.2 Hardware installation
The first step to any of the scenarios is to configure the hardware. Set up the hardware as mentioned in
Table 6 or, the TWR-56F8200 Jumper Table in the Quick Start Guide [2] and your board should look
like the one shown in this figure.

TWR-56F8200 Tower Board, Rev. 1, 10/2013
Freescale Semiconductor Inc. 19
Figure 3. TWR-56F8200 tower board
4.3 Software installation
After the hardware is configured, the software needs to be set up. The first step is for the user to set up
CodeWarrior. You need to install CodeWarrior to program and debug the TWR-56F8200, and
FreeMASTER for debugging via GUI.
The installation software can be found in the following locations, or by following the “Jump Start Your
Design“ section in the Quick Start Guide available in Tower System box.
CodeWarrior Development Tools: www.freescale.com/CodeWarrior
FreeMASTER Application and Communication Driver: www.freescale.com/FREEMASTER

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4.4 Procedure for debugging new applications on TWR-56F8200 Using
MultiLink
Prerequisite: Download and install CodeWarrior Development Tools as mentioned in Software
installation.
1. Connect jumpers on TWR-56F8200 module: Connect all the jumpers on 56F8200 board as
mentioned in Table 6.
2. Make the connection using U-Multilink and USB cable: Connect one end of the USB cable to
TWR-56F8200 board and other to the computer for supplying the power to board. Connect the P&E U-
Multilink to the JTAG Connector J14. Make sure the red wire of P&E Multilink ribbon connector
connects to pin1 of J14. Connect the other end of the multilink to the computer USB port.
3. Create an application for MC56F82748: Launch CodeWarrior and run the program.
a) From the menu, choose File > New > Bareboard Project.
b) Assign a project name, such as “ProjDSC” and click Next.
c) Expand the 56800/E (DSC) drop box, expand 56F827xx, select MC56F82748, and then click
Next.
d) Select all the checkboxes on “Connection to be used,” and click Next twice.
e) Select Processor Expert, and click Finish.
4. Build your application: Wait for Processor Expert to finish loading. Observe the activity in the lower
right of the IDE screen, such as progress indications. Once idle, click the project name “ProjDSC” and
then click the hammer icon to build the project.
5. Load your application using U-MultiLink:
a) When finished building, right-click the project name.
b) Choose Debug As > Debug configurations and then select CodeWarrior Download.
c) Select U-MultiLink and click OK.
d) Observe the activity in the lower portion of the IDE screen, such as progress indications. Once
the debugger runs, it will stop in the Main program for you to take control.
6. Debug your application: Set a breakpoint at the “for” instruction from within the C language
program by right-clicking in the margin to the left of the “for” statement and selecting “toggle
breakpoint.” Look for a red square at the top of the screen, among the debug controls. Mouse over them
to the left and find and click Resume to continue.
4.5 Procedure for debugging new applications on TWR-56F8200 Using
OSJTAG
Prerequisite: Download and install CodeWarrior Development Tools as mentioned in Software
installation.
1. Connect jumpers on TWR-56F8200 module: Connect all the jumpers on 56F8200 board as
mentioned in Table 6.