NyQuest Innovation Labs NY8L Series User manual

USER MANUAL
NY8L Series
Version 1.3
Mar. 8, 2019
8-bit 65C02 MCU with LCD Driver,
13~32 I/O & ‘1-Ch Speech + Dual-Tone’
NYQUEST TECHNOLOGY CO. reserves the right to change this document without prior notice. Information provided by NYQUEST is believed to be accurate and reliable.
However, NYQUEST makes no warranty for any errors which may appear in this document. Contact NYQUEST to obtain the latest version of device specifications before
placing your orders. No responsibility is assumed by NYQUEST for any infringement of patent or other rights of third parties which may result from its use. In addition,
NYQUEST products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a malfunction or failure of the
product may reasonably be expected to result in significant injury to the user, without the express written approval of NYQUEST.

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Revision History
Version Date Description Modified Page
1.0 2017/08/31 Formal release. -
1.1 2017/11/28 Delete KSB wake-up source for Halt mode. 17, 20, 56
1.2 2018/05/31
SFR rename:
1. Update DC characteristics.
2. PXD rename to PX.
3. TM0 rename to TM0D.
4. TM1 rename to TM1D.
5. TM2 rename to TM2D.
6. ADCSEL rename to ADCMD.
7. ADCCTRL rename to ADCC.
8. ADCO rename to ADCD.
9. LCDPWR rename to LCDPC.
10.LCD rename to LCDC.
11.SPIC rename to SPIMD.
12. AUDFUNC rename to AUD.
13. IOC rename to IRC.
14. PAD rename to PA.
15. PBD rename to PB.
16. PCD rename to PC.
17. PDD rename to PD.
18. ON/OFF rename to Enable/Disable.
19. PL ON/OFF rename to Pull-Low Resistor Enable/Disable.
14, 15
20, 53, 55
29, 47, 48
29, 30, 47, 48
30, 47
31, 65, 66
32, 65, 66
32, 64, 65, 66
33, 36
33, 35, 39
33, 58, 59
34, 46
34, 60, 63
34, 52, 53, 55
34, 53, 55
35, 53, 55, 56
35, 53, 55
22, 29, 30, 33,
34, 36, 45, 46,
48, 57, 58
35, 53
1.3 2019/03/08
1. Modify NY8L040A LCD share pin to COM4~11
2. Modify “1.6.3 DC Characteristics”
3. Modify “8.3.2 stop mode1” & Figure 8-5
4. Modify “Chapter 9.Application Circuits”
12
15
61, 62
68~71

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Table of Contents
Chapter 1. Introduction......................................................................................................6
1.1 General Description ............................................................................................................ 6
1.2 Features ............................................................................................................................. 6
1.3 Product List......................................................................................................................... 7
1.4 Block Diagram .................................................................................................................... 8
1.5 Pad Description................................................................................................................... 8
1.5.1Pad Description for NY8L005A.................................................................................................. 8
1.5.2Pad Description for NY8L010A.................................................................................................. 9
1.5.3Pad Description for NY8L020A................................................................................................ 10
1.5.4Pad Description for NY8L030A................................................................................................ 11
1.5.5Pad Description for NY8L040A................................................................................................ 12
1.5.6Pad Description for NY8L050A................................................................................................ 13
1.6 Electrical Characteristics................................................................................................... 13
1.6.1 Absolute Maximum Rating....................................................................................................... 13
1.6.2 DC Characteristics (Only for NY8L005A~ NY8L020A) ........................................................... 14
1.6.3 DC Characteristics (Only for NY8L030A~ NY8L050A) ........................................................... 15
Chapter 2. Operation Modes ...........................................................................................16
2.1 Clock Source .................................................................................................................... 16
2.2 Normal Mode .................................................................................................................... 18
2.3 Slow Mode ........................................................................................................................ 19
2.4 Standby Mode................................................................................................................... 19
2.5 Halt mode ......................................................................................................................... 20
Chapter 3. System Control ..............................................................................................21
3.1 Reset System ................................................................................................................... 21
3.1.1 Power-On Reset (POR) ........................................................................................................... 21
3.1.2 Low Voltage Reset (LVR) (by body) ........................................................................................ 21
3.1.3 External Reset Pin (by option)................................................................................................. 21
3.1.4 Watch-Dog Timer Reset (WDTR) (by option).......................................................................... 21
3.2 Low Voltage Detector (LVD) (by body).............................................................................. 22
3.3 Interrupts........................................................................................................................... 22
Chapter 4. Address Mapping...........................................................................................26

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4.1 Control Register Description ............................................................................................. 29
4.2 RAM.................................................................................................................................. 35
4.3 ROM ................................................................................................................................. 35
Chapter 5. LCD & LED Control........................................................................................36
5.1 LCD Power Supply............................................................................................................ 36
5.1.1 Power Pumping Mode ............................................................................................................. 36
5.2 LCD & LED RAM Alignment.............................................................................................. 37
5.3 LCD Display System ......................................................................................................... 38
5.4 LED Display System ......................................................................................................... 43
Chapter 6. Audio Control.................................................................................................45
6.1 Audio Control Register ..................................................................................................... 45
6.1.1 VOL.......................................................................................................................................... 45
6.1.2 TONEx (x=0,1)......................................................................................................................... 45
6.1.3 AUD ......................................................................................................................................... 46
6.1.4 TMxD (x=0, 1, 2)...................................................................................................................... 47
6.1.5 TMxC (x=0, 1, 2)...................................................................................................................... 47
6.1.6 TMxEN(x=0, 1, 2) .................................................................................................................... 48
6.1.7 MIX........................................................................................................................................... 49
6.2 Audio Control Procedure (Only for NY8L030A~050A)....................................................... 50
6.2.1 Tone Control ............................................................................................................................ 50
6.3 Buzzer Control (Only for NY8L005A~020A) ...................................................................... 51
Chapter 7. I/O Control ......................................................................................................52
7.1 I/O Ports (by body and option) .......................................................................................... 52
7.2 Matrix Key Strobe ............................................................................................................. 54
Chapter 8. Other Applications (by option) .....................................................................57
8.1 Electroluminescent (EL) Back Light Driver ........................................................................ 57
8.2 Serial Peripheral Interface (SPI)........................................................................................ 58
8.3 Resistor to Frequency Converter (RFC)............................................................................ 59
8.3.1 RC Oscillation Network............................................................................................................ 60
8.3.2 Timer0 Counting within Timer2 Overflow Cycle (STOP Mode1) ............................................. 62
8.3.3 Timer0 Counting within a Full CX Cycle (STOP Mode 2)........................................................ 62
8.3.4 Timer0 Counting within a Full Timer2 Clock Cycle (STOP Mode 3) ....................................... 63
8.4 Infrared (IR) Transmitter.................................................................................................... 64

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8.5 Analog to Digital Converter (ADC) (Only for NY8L040A~050A)......................................... 65
8.5.1 ADC Clock (ADCLK) and Sampling Clock (SHCLK) ............................................................... 65
8.5.2 ADC Operation ........................................................................................................................ 66
Chapter 9. Application Circuits.......................................................................................68
9.1 Application Circuits with Low Loading ............................................................................... 68
9.2 Application Circuits with Heavy Loading (Such as Motor, High Brightness LED)............... 70
9.3 LCD Bias (VDD for VLCD/V3/V2/V1, or internal Vreg for V1)............................................ 72

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Chapter 1. Introduction
1.1 General Description
The NY8L IC is a high-performance 8-bit 65C02 micro-controller with LCD driver and sound processor, three
sets of 8-bit timer/counter, 13~32 general I/Os. For LCD driver, it applies for the most common-used LCD
panel and functions as a key strobe for further application.
There are 3 channels that are configured as 1-channel speech and dual-tone melody (by body), and all of
them can be auto-played back simultaneously. Not only high fidelity ADPCM speech synthesis algorithm
built-in, but also wide range sampling rate up to 16KHz@4MHz and different volume level are supported.
Those combinations create remarkable high-quality voice. NY8L provides two kinds of audio outputs with fine
resolution (by body), one is 10-bit current-type D/A converter (DAC) and the other is 9-bit Pulse-Width-
Modulation (PWM).
The NY8L IC provides 4 channels high-precision 8-bit analog-to-digital converter (ADC) (by body), which is
suitable for any analog interface detection and measurement applications.
The CISC MCU architecture is very easy to program and control, various applications can be easily
implemented. Furthermore, in addition to the Slow mode, it offers the Standby mode and Halt mode (or
Sleep mode) to minimize power dissipation.
1.2 Features
Wide operating voltage range: 1.1V ~ 3.6V / 2.0V ~ 5.5V. (by body)
1.1V ~ 3.6V @ System clock ≤ 500KHz (NY8L005A, NY8L010A, NY8L020A).
2.0V ~ 3.6V @ System clock ≤ 4MHz (NY8L005A, NY8L010A, NY8L020A).
2.0V ~ 5.5V @ System clock ≤ 4MHz (NY8L030A, NY8L040A, NY8L050A).
3.0V ~ 5.5V @ System clock ≤ 8MHz (NY8L030A, NY8L040A, NY8L050A).
4KB~128KB ROM (by body), program and voice data share the same ROM space.
64B~320B RAM. (by body)
Dual-clock oscillation: System clock can switch between high oscillation and low oscillation.
High oscillation: IOSC8M/IOSC4M/IOSC2M/IOSC500K.
Low oscillation: IOSC32K/XTAL32K.
Built-in RC oscillation is accurate with +/- 1.5% frequency deviation.
Four kinds of operation mode to reduce system power consumption:
Normal mode, Slow mode, Standby mode and Halt mode.
At Normal mode, CPU clock is software programmable.
1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128 of high oscillator (FFAOS) frequency.

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Slow mode to operate with low power consumption (+/-3% accuracy).
Three 8-bit timers for 1-channel speech and 2-channel tone or other applications such as RFC.
support most of LCD panel types:
1/2, 1/3, 1/4 bias (by body).
1/2, 1/3, 1/4, 1/5, 1/6, 1/7, 1/8, 1/9, 1/10, 1/11, 1/12 duty (by body).
Charge pump for the LCD display power.
LED sink/drive configuration supported through COM & SEG (by option).
Matrix key strobe supported.
Serial peripheral interface (SPI) master mode for serial Flash/SRAM memory
Electroluminescent (EL) back light driver block supported with various frequency and duty.
Resistance to Frequency Converter (RFC) for the detection of humidity, temperature or other applications.
Low voltage reset (by body), watch-dog reset (by option) and external reset pin (by option) are all
supported to protect the system.
Flexible I/Os maximum with optional function:floating input, pull-low input, CMOS output, open-drain output.
Infrared (IR) output: optional carrier frequency and optional data high/low output supported.
Maximum of 3 channels can play simultaneously (by body); channel0/1 can be assigned as tone,
channel2 can be assigned as speech.
New high fidelity ADPCM speech synthesis algorithm.
High quality direct-drive 9-bit PWM and 10-bit D/A converter audio output. (by body)
8 or 16 steps volume control for audio output.
4 channels high-precision 8-bit analog-to-digital converter (ADC). (by body)
7~8 interrupt modes supported (by body).
1.3 Product List
P/N Voltage
(V)
Voice Duration[1]
@6KHz(sec)
ROM
(bits)
RAM
(bits) I/O LCD Dots[2] (COM x SEG)
Buzzer PWM DAC ADC
NY8L005A 1.1 ~ 3.6 1.0 4K x 8 64 x 8 13 4 x 10 1 - - -
NY8L010A 1.1 ~ 3.6 2.3 8K x 8 64 x 8 16 6 x 23 1 - - -
NY8L020A 1.1 ~ 3.6 4.7 16Kx 8 128 x 8 20 8 x 31 1 - - -
NY8L030A 2.0 ~ 5.5 10 32Kx 8 128 x 8 20 12 x 33 - 9-bit - -
NY8L040A 2.0 ~ 5.5 20.7 64Kx 8 192 x 8 24 12 x 43 - 9-bit 10-bit 4-ch
NY8L050A 2.0 ~ 5.5 42 128Kx 8 320 x 8 32 12 x 55 - 9-bit 10-bit 4-ch
Note: 1. The voice duration is calculated at 6KHz by 4-bit ADPCM algorithm.
2. The LCD dots are calculated with maximal common pins, which can be shared with segment pins by
options.

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1.4 Block Diagram
PWM1/DAC
PWM2
Clock
Generator
Xin
RFC
CX RR RT0 RT1
IO Control
PA PB PC PD
Xout
Three 8-bit
Auto Reload Timer
ROM
Audio Synthesizer
3-Channel Mixer
Ext Control LVR/LVD EL Driver
PWM &
DAC
ADC
LCD BiasLCD Driver
8-bit MCU
AIN0~3
SPI
IR
COM SEG
VLCD
CUP1~2
V1~3
RST INT ELP ELC
IR
SCK
SDI
SDO
INT
RAM
Buzzer BZ
VDD VSS
1.5 Pad Description
1.5.1 Pad Description for NY8L005A
Pad Name
ATTR.
Description
VDD P Positive supply power.
VSS P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX I/O Bit 4 for Port A (can be used as key strobe input), or input of RFC function.
PA5/RR I/O Bit 5 for Port A (can be used as key strobe input),or output of RFC function.
PA6/RT0 I/O Bit 6 for Port A (can be used as key strobe input),or output of RFC function.
PA7/RT1 I/O Bit 7 for Port A (can be used as key strobe input), or output of RFC function.
PB0/BZ I/O Bit 0 for Port B, or buzzer output.
PB1/IR I/O Bit 1 for Port B, or IR output.
SEG0/PB2 I/O LCD segment 0, or Bit 2 for Port B.
SEG1/PB3 I/O LCD segment 1, or Bit 3 for Port B.
SEG2/PB4 I/O LCD segment 2, or Bit 4 for Port B.
SEG3~9 O LCD segment 3~9 (SEG3~8 can be used as key strobe output).
COM0~3 O LCD common 0~3 (COM2~3 can be used as SEG11~10).
V1, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：31 Pins

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1.5.2 Pad Description for NY8L010A
Pad Name ATTR. Description
VDD P Positive supply power.
VSS P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX I/O Bit 4 for Port A (can be used as key strobe input), or input of RFC function.
PA5/RR I/O Bit 5 for Port A (can be used as key strobe input),or output of RFC function.
PA6/RT0 I/O Bit 6 for Port A (can be used as key strobe input),or output of RFC function.
PA7/RT1 I/O Bit 7 for Port A (can be used as key strobe input),or output of RFC function.
PB0/BZ I/O Bit 0 for Port B, or buzzer output.
PB1 I/O Bit 1 for Port B.
SEG0/PB2/ELP I/O LCD segment 0, Bit 2 for Port B, or charging signal of EL driver.
SEG1/PB3/ELC I/O LCD segment 1, Bit 3 for Port B, or discharging signal of EL driver.
SEG2/PB4/IR I/O LCD segment 2, Bit 4 for Port B, or IR output.
SEG3/PB5/SCK I/O LCD segment 3, Bit 5 for Port B, or clock output of SPI.
SEG4/PB6/SDI I/O LCD segment 4, Bit 6 for Port B, or data input (MISO) of SPI.
SEG5/PB7/SDO I/O LCD segment 5, Bit 7 for Port B, or data output (MOSI) of SPI.
SEG6~22 O LCD segment 6~22 (SEG6~17 can be used as key strobe output).
COM0~5 O LCD common 0~5 (COM2~5 can be used as SEG26~23).
V1~2, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：47 Pins

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1.5.3 Pad Description for NY8L020A
Pad Name ATTR. Description
VDD P Positive supply power.
VSS P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX I/O Bit 4 for Port A, or input of RFC function.
PA5/RR I/O Bit 5 for Port A, or output of RFC function.
PA6/RT0 I/O Bit 6 for Port A, or output of RFC function.
PA7/RT1 I/O Bit 7 for Port A, or output of RFC function.
PB0/BZ I/O Bit 0 for Port B, or buzzer output.
PB1 I/O Bit 1 for Port B.
SEG0/PB2/ELP I/O LCD segment 0, Bit 2 for Port B, or charging signal of EL driver.
SEG1/PB3/ELC I/O LCD segment 1, Bit 3 for Port B, or discharging signal of EL driver.
SEG2/PB4/IR I/O LCD segment 2, Bit 4 for Port B, or IR output.
SEG3/PB5/SCK I/O LCD segment 3, Bit 5 for Port B, or clock output of SPI.
SEG4/PB6/SDI I/O LCD segment 4, Bit 6 for Port B, or data input (MISO) of SPI.
SEG5/PB7/SDO I/O LCD segment 5, Bit 7 for Port B, or data output (MOSI) of SPI.
SEG6~9/PC0~3 I/O LCD segment 6~9, or Bit 0~3 for Port C (can be used as key strobe
input).
SEG10~30 O LCD segment 10~30 (SEG10~25 can be used as key strobe output).
COM0~7 O LCD common 0~7 (COM2~7 can be used as SEG36~31).
V1~2, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：57 Pins

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1.5.4 Pad Description for NY8L030A
Pad Name ATTR. Description
VDD1~2 P Positive supply power.
VSS1~2 P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX I/O Bit 4 for Port A, or input of RFC function.
PA5/RR I/O Bit 5 for Port A, or output of RFC function.
PA6/RT0 I/O Bit 6 for Port A, or output of RFC function.
PA7/RT1 I/O Bit 7 for Port A, or output of RFC function.
PB0/PWM2 I/O Bit 0 for Port B, or PWM2 output.
PB1/PWM1 I/O Bit 1 for Port B, or PWM1 output.
SEG0/PB2/ELP I/O LCD segment 0, Bit 2 for Port B, or charging signal of EL driver.
SEG1/PB3/ELC I/O LCD segment 1, Bit 3 for Port B, or discharging signal of EL driver.
SEG2/PB4/IR I/O LCD segment 2, Bit 4 for Port B, or IR output.
SEG3/PB5/SCK I/O LCD segment 3, Bit 5 for Port B, or clock output of SPI.
SEG4/PB66/SDI I/O LCD segment 4, Bit 6 for Port B, or data input (MISO) of SPI.
SEG5/PB7/SDO I/O LCD segment 5, Bit 7 for Port B, or data output (MOSI) of SPI.
SEG6~9/PC0~3 I/O LCD segment 6~9,or Bit 0~3 for Port C(can be used as key strobe input).
SEG10~32 O LCD segment 10~32 (SEG10~25 can be used as key strobe output).
COM0~11 O LCD common 0~11 (COM5~11 can be used as SEG39~33).
V1~3, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：66 Pins

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1.5.5 Pad Description for NY8L040A
Pad Name ATTR. Description
VDD1~2 P Positive supply power.
VSS1~2 P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX/AIN3 I/O Bit 4 for Port A, input of RFC function, or analog input 3 for ADC.
PA5/RR/AIN2 I/O Bit 5 for Port A, output of RFC function, or analog input 2 for ADC.
PA6/RT0/AIN1 I/O Bit 6 for Port A, output of RFC function, or analog input 1 for ADC.
PA7/RT1/AIN0 I/O Bit 7 for Port A, output of RFC function, or analog input 0 for ADC.
PB0/PWM2 I/O Bit 0 for Port B, PWM2 output.
PB1/PWM1/DAC I/O Bit 1 for Port B, or PWM1 output, or DAC output.
SEG0/PB2/ELP I/O LCD segment 0, Bit 2 for Port B, or charging signal of EL driver.
SEG1/PB3/ELC I/O LCD segment 1, Bit 3 for Port B, or discharging signal of EL driver.
SEG2/PB4/IR I/O LCD segment 2, Bit 4 for Port B, or IR output.
SEG3/PB5/SCK I/O LCD segment 3, Bit 5 for Port B, or clock output of SPI.
SEG4/PB6/SDI I/O LCD segment 4, Bit 6 for Port B, or data input (MISO) of SPI.
SEG5/PB7/SDO I/O LCD segment 5, Bit 7 for Port B, or data output (MOSI) of SPI.
SEG6~13/PC0~7 I/O LCD segment 6~13,or Bit 0~7 for Port C(can be used as key strobe input).
SEG14~42 O LCD segment 14~42 (SEG14~29 can be used as key strobe output).
COM0~11 O LCD common 0~11 (COM4~11 can be used as SEG50~43).
V1~3, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：76 Pins

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1.5.6 Pad Description for NY8L050A
Pad Name ATTR. Description
VDD1~3 P Positive supply power.
VSS1~3 P Negative supply power.
PA0/Xin I/O Bit 0 for Port A, or input of XTAL32K.
PA1/Xout I/O Bit 1 for Port A, or output of XTAL32K.
PA2/INT I/O Bit 2 for Port A, or external interrupt input.
PA3/RST I/O Bit 3 for Port A, or external reset input.
PA4/CX/AIN3 I/O Bit 4 for Port A, input of RFC function, or analog input 3 for ADC.
PA5/RR/AIN2 I/O Bit 5 for Port A, output of RFC function, or analog input 2 for ADC.
PA6/RT0/AIN1 I/O Bit 6 for Port A, output of RFC function, or analog input 1 for ADC.
PA7/RT1/AIN0 I/O Bit 7 for Port A, output of RFC function, or analog input 0 for ADC.
PB0/PWM2 I/O Bit 0 for Port B, PWM2 output.
PB1/PWM1/DAC I/O Bit 1 for Port B, or PWM1 output, or DAC output.
SEG0/PB2/ELP I/O LCD segment 0, Bit 2 for Port B, or charging signal of EL driver.
SEG1/PB3/ELC I/O LCD segment 1, Bit 3 for Port B, or discharging signal of EL driver.
SEG2/PB4/IR I/O LCD segment 2, Bit 4 for Port B, or IR output.
SEG3/PB5/SCK I/O LCD segment 3, Bit 5 for Port B, or clock output of SPI.
SEG4/PB6/SDI I/O LCD segment 4, Bit 6 for Port B, or data input (MISO) of SPI.
SEG5/PB7/SDO I/O LCD segment 5, Bit 7 for Port B, or data output (MOSI) of SPI.
SEG6~13/PC0~7 I/O LCD segment 6~13, or Bit 0~7 for Port C.
SEG14~21/PD0~7 I/O LCD segment 14~21,or Bit 0~7 for Port D(can be used as key strobe input).
SEG22~54 O LCD segment 22~54 (SEG22~37 can be used as key strobe output).
COM0~11 O LCD common 0~11 (COM3~11 can be used as SEG63~55).
V1~3, VLCD P LCD supply power.
CUP1~2 I/O Auxiliary capacitor pins for voltage pumping.
Total：90 Pins
1.6 Electrical Characteristics
The following lists the electrical characteristics. All the product’s properties must refer to each part’s data sheet.
1.6.1 Absolute Maximum Rating
Symbol Parameter Rated Value Unit
VDD – VSS Supply voltage (NY8L005A~NY8L020A) -0.5 ~ +4.0 V
Supply voltage (NY8L030A~NY8L050A) -0.5 ~ +6.0 V
VIN Input voltage VSS-0.3V ~ VDD+0.3 V
TOP Operating Temperature 0 ~ +70 °C
TST Storage Temperature -25 ~ +85 °C

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1.6.2 DC Characteristics (Only for NY8L005A~ NY8L020A)
Symbol Parameter VDD Min. Typ. Max. Unit Test Condition
VDD Operating voltage 1.1 1.5 3.6 V F
CPU
= 500KHz
2.0 3 3.6 FCPU = 4MHz
IHALT
Supply
Current
Halt mode 1.5 0.1 0.5 uA Sleep, no load
3 0.1 0.5
ISB1 Standby
mode1
1.5 1.3 uA CPU off, IOSC32KHz on,
LCD off, Reg off, no load
3 2.2
ISB2 Standby
mode2
1.5 1.4 uA CPU off, IOSC32KHz on,
LCD on, Reg off, no load
3 2.3
ISB3 Standby
mode3
1.5 3.8 uA CPU off, IOSC32KHz on,
LCD on, Reg on, no load
3 5
ISL Slow mode 1.5 6 uA FCPU = IOSC32KHz, no load
3 20
IOP Normal mode
1.5 90 uA FCPU = 500KHz, no load
3 300
3 1.0 mA F
CPU
= 4MHz, no load
IIH
Input
current
(Internal
pull-low)
Weak
(1M ohms)
1.5 0.5
uA VIN = VDD
3 3
Strong
(100K ohms)
1.5 5
3 30
IOH
Output high current
(PA/B/C, SEG/COM@LED
mode)
1.5 -2 mA VOH = 1.0V
3 -9 VOH = 2.0V
IOL1 Output low current
(PA/B/C)
1.5 4 mA VOL = 0.5V
3 18 V
OL
= 1.0V
IOL2 Output low current
(SEG/COM@LED mode)
1.5 2 mA VOL = 0.5V
3 9 VOL = 1.0V
∆F/F
Frequency deviation
by voltage drop(500KHz)
1.5 -0.5
%
Fosc(1.5V) - Fosc(1.2V)
Fosc(1.5v)
Frequency deviation
by voltage drop(4MHz) 3 -0.5 Fosc(3.0V) - Fosc(2.4V)
Fosc(3.0v)
∆F/F
Frequency lot deviation
(500KHz)
1.5 -1.5 1.5 % Fosc(1.5V) - 500KHz
500KHz
Frequency lot deviation
(4MHz)
3 -1.5 1.5 % Fosc(3.0v) - 4MHz
4MHz
Fosc Oscillation Frequency --
0.48 0.5 0.52
MHz VDD = 1.1~3.6V1.95 2 2.05
3.9 4 4.1

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1.6.3 DC Characteristics (Only for NY8L030A~ NY8L050A)
Symbol Parameter VDD Min. Typ. Max. Unit Test Condition
VDD Operating voltage 2.0 3.0 5.5 V F
CPU
= 4MHz
3.0 4.5 5.5 FCPU = 8MHz
IHALT
Supply
Current
Halt mode 3 0.1 0.5 uA Sleep, no load
4.5 0.1 0.5
ISB1 Standby
mode1
3 1.4 uA CPU off, IOSC32KHz on,
LCD off, Reg off, no load
4.5 2.8
ISB2 Standby
mode2
3 1.5 uA CPU off, IOSC32KHz on,
LCD on, Reg off, no load
4.5 3
ISB3 Standby
mode3
3 5 uA CPU off, IOSC32KHz on,
LCD on, Reg on, no load
4.5 8
ISL Slow mode 3 15 uA FCPU=IOSC32KHz, PWM
output off, no load
4.5 30
IOP Normal mode 3 0.8 mA FCPU=4MHz, PWM output
off, no load
4.5 1.8
IIH
Input
current
(Internal
pull-low)
Weak
(1M ohms)
3 3
uA VIN = VDD
4.5 9
Strong
(100K ohms)
3 30
4.5 90
IOH
Output high current
(PA/B/C/D,
SEG/COM@LED mode)
3 -9 mA VOH = 2.0V
4.5 -12 VOH = 3.5V
IOL1 Output low current
(PA/B/C/D)
3 18 mA V
OL
= 1.0V
4.5 25 VOL = 1.0V
IOL2 Output low current
(SEG/COM@LED mode)
3 9 mA VOL = 1.0V
4.5 12.5 V
OL
= 1.0V
IPWM PWM output current 3 180 mA Load = 8 ohms
4.5 280
IDAC DAC output current 3 -1.4 mA Half scale
4.5 -1.6
∆F/F Frequency deviation
by voltage drop
3 -0.5
%
Fosc(3.0V) - Fosc(2.4V)
Fosc(3.0v)
4.5 -0.5 Fosc(4.5V) - Fosc(3.0V)
Fosc(4.5v)
∆F/F
Frequency lot deviation
(4MHz)
3 -1.5 1.5 % Fosc(3.0V) - 4MHz
4MHz
Frequency lot deviation
(8MHz) 4.5 -1.5 1.5 % Fosc(4.5V) - 8MHz
8MHz
Fosc Oscillation Frequency --
0.48 0.5 0.52
MHz VDD = 2.0~5.5V
1.95 2 2.05
3.9 4 4.1
7.8 8 8.2

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Chapter 2. Operation Modes
2.1 Clock Source
Because NY8L is a dual-clock IC, there are fast oscillator (FFAOS) and slow oscillator (FSLOW) that can be
selected as system oscillation (FCPU). The fast oscillator which could be used as FFAOS is internal high RC
oscillator: IOSC8M/IOSC4M/IOSC2M/IOSC500K. The slow oscillators which could be used as FSLOW are
internal low RC oscillator (IOSC32K) or external low crystal oscillator (XTAL32K). Users can choose the
clock sources by programming its option based on the application.
To utilize the precise timing application, two pins (Xin & Xout) are needed to connect with external crystal
module and set the corresponding option for 32KHz crystal. To match the high-speed application, it provides
up to 8MHz for FCPU and no additional pins are needed.
Clock
switch
circuit
FFAOS
IOSC4M
IOSC2M
IOSC500K
Slow clock option
FSLOW
IOSC32K
XTAL32K
Fast clock
divider
(1/1~1/128)
OPMD[6:4]
FFAST
FCPU
Fast clock option
OPMD[7]
Timer
Audio
ADC
ELP
Timer
LCD
RTC
ELC
WDT
IOSC8M
Figure 2-1 Oscillation Configuration
The fast frequency (FFAST) is divided from FFAOS through control register OPMD[6:4]: 1/1~1/128. The FSLOW is
the slow frequency and the source of Real-Time-Clock (RTC). The RTC is the clock source of 14-bit divider,
ranges from 16KHz to 2Hz, and it generates multiple clocks to apply to the LCD module, LCD power charge
pump block, watch dog timer, or EL block, etc. Therefore user is suggested to enable the RTC (OPMD[3])
when CPU is busy. Besides, the RTC counter can be cleared by writing 0 to OPMD[2], and which is always
read as high.

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Mode
Normal mode
Slow mode
Standby mode
Halt mode
FCPU ON (FFAST) ON (FSLOW) OFF OFF
FFAOS ON OFF OFF OFF
FFAST FFAOS /2
N
OFF OFF OFF
FSLOW ON/OFF ON ON OFF
RTC ON/OFF ON ON OFF
LCD ON/OFF ON/OFF ON/OFF OFF
Wake-up Source -- --
- Key change
- Timer2/Timer1/
Timer0 Interrupt
(based on FSLOW)
- FT/ST Interrupt
- External Interrupt
- KSB Interrupt
- KSB wake-up
- Key change
- External Interrupt
NY8L provide four kinds of operating mode to tailor all kinds of application and save power consumptions.
These operating modes are Normal mode, Slow mode, Standby mode and Halt mode. Normal mode is
designated for high-speed operating mode. Slow mode is designated for low-speed mode in order to save
power consumption. At Standby mode, NY8L will stop almost all operations except Timer2 /Timer1 /Timer0
/FT /ST (based on FSLOW) in order to wake up periodically. At Halt mode, NY8L will sleep until key change or
external interrupt occurs. User can set the control register OPMD to swap Normal/Slow mode and the control
register SLP to enter Standby/Halt mode. The block diagram of four operating modes is described in Figure
2-2.
Standby Mode
CPU OFF
F
FAOS
OFF
F
SLOW
ON
Halt Mode
CPU OFF
F
FAOS
OFF
F
SLOW
OFF
Normal Mode
CPU ON
F
FAOS
ON
F
SLOW
ON/OFF
Slow Mode
CPU ON
F
FAOS
OFF
F
SLOW
ON
Write 1 to OPMD[7]
Write 0 to OPMD[7]
Write 0x5A to SLP
Reset State
Write 0x5A to SLP
Write 0x5A to SLP Write 0x5A to SLP
Reset process
is complete
One of reset
event is occurred
One of reset
event is occurred
One of reset
event is occurred
One of reset
event is occurred
Reset event:
- POR
- LVR
- External reset pin enter high state
- Watch dog timeout
Wake-up event:
- Key change wake-up
- Timer2/Timer1/Timer0 interrupt
- FT/ST interrupt
- External interrupt
- KSB interrupt
- KSB wake-up
@OPMD[7]=1 @OPMD[7]=0
@OPMD[7]=1 @OPMD[7]=0
Wake-up event:
- Key change wake-up
- External interrupt
Figure 2-2: Four Operating Modes

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2.2 Normal Mode
After any reset event is occurred and reset process is complete, NY8L will enter Normal mode. At Normal
mode, FFAOS is selected as system oscillation in order to provide highest performance and its power
consumption will be the largest among four operating modes.
Instruction execution is based on FFAST and all peripheral modules may be active according to
corresponding module enable bit.
FFAST is divided from the FFAOS (1/1 ~ 1/128).
FSLOW is enabled, or disabled according to application.
IC can switch to Slow mode by writing 0 to the bit7 of control register OPMD ($17[7]).
IC can switch to Standby mode or Halt mode by programming control register SLP ($15) with 0x5A.
FFAST
FFAOS
000
OPMD[6:4] 001 010
OPMD[7]
FCPU
Figure 2-3: The procedure of dividing CPU clock
Users have to set the control register OPMD to the relative setting as the following table.
Addr. Name R/W Bit Data Description Default
$17 OPMD
W [2] 0 Write 0 to clear RTC counter (read as high) x
R/W
[3] 1/0 RTC Enable/Disable Enable
[6:4]
000 FFAST = FFAOS/1
FFAOS /1
001 FFAST = FFAOS/2
010 FFAST = FFAOS/4
011 FFAST = FFAOS/8
100 FFAST = FFAOS/16
101 FFAST = FFAOS/32
110 FFAST = FFAOS/64
111 FFAST = FFAOS/128
[7] 1/0 FCPU = FFAST/FSLOW (32KHz) FFAST

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2.3 Slow Mode
NY8L will enter Slow mode by writing 0 to the bit7 of control register OPMD ($17[7]). At Slow mode, FSLOW is
selected as system oscillation in order to save power consumption but still keep IC running. However, the
FFAOS should be turned off permanently if the mode won’t be swapped to Normal mode. When switching to
Normal mode, the fast clock source must wait about 512 cycles (~128us@4MHz) for being stable. It is
strongly recommended that IC should switch to Slow mode after FSLOW being stable (~120us@IOSC32K or
~30ms@XTAL32K). Once setting control register SLP ($15) with 0x5A, it will turn to Standby mode or Halt
mode, and the FCPU will be stopped until the wake-up signal occurs.
Instruction execution is based on FSLOW and all peripheral modules may be active according to
corresponding module enable bit.
FFAOS can be turned off by writing 0 to OPMD[7].
IC can switch to Standby mode or Halt mode by programming control register SLP ($15) with 0x5A.
IC can switch to Normal mode by writing 1 to OPMD[7].
OPMD[7]
FCPU
fast clock stable time
FFAOS
FSLOW
RTCEN
Figure 2-4: The procedure of switching operation modes
2.4 Standby Mode
By setting control register SLP ($15) with 0x5A, the operation mode will turn to Standby mode if RTC is
enabled (OPMD[3] = 1), while the previous mode is either Normal mode or Slow mode. At Standby mode,
the FFAOS is shut down and the FSLOW is kept to supply the clock for LCD display, etc.
NY8L supports three wake-up methods to leave out of Standby mode, the difference between I/O pads and
its data registers (key change), the occurrence of each interrupt, and KSB wake-up. So before entering
Standby mode, users have to keep in mind to store the current input port statuses into port registers, and
clear key strobe input (KI) data register (PX). If the system is waked up, the succeeding instructions after
writing SLP register will be executed after the clock source stable time. The stable time of fast clock source
should wait about 512 cycles (~128us@4MHz), and the stable time of IOSC32K is about 4 cycles
(~120us@32KHz), the stable time of XTAL32K is about 1024 cycles (~30ms@32KHz).
If the IC is waked up from Standby mode by a reset pin, it goes into reset procedure.

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Instruction execution is stop and some peripheral modules may be active according to corresponding
module enable bit.
FFAOS can be shut down by writing 0x5A to register SLP ($15).
The FSLOW is still active and running.
IC can being waked up from Standby mode if any of (a) key change wake-up (refer to 7.1 I/O Ports), (b)
Timer2/Timer1/Timer0 (based on FSLOW) interrupt, (c) FT/ST interrupt, (d) external interrupt, (e) KSB
interrupt or (f) KSB wake-up (refer to 7.2 Key Strobe) is happened.
After being waked up from Standby mode, IC will return to Normal mode if OPMD[7] = 1, or Slow mode if
OPMD[7] = 0.
The relative control registers are shown as the following tables
Addr. Name R/W Bit Data Description Default
$15 SLP W [7:0] Write 0x5A to sleep xx
2.5 Halt mode
By setting control register SLP ($15) with 0x5A, the operation mode will turn to Halt mode if RTC is disabled
(OPMD[3] = 0), while the previous mode is either Normal mode or Slow mode. Halt mode is also known as
Sleep mode. As implied by the name, the IC falls asleep and the system clock is completely turned off, so all
the IC functions are halted and it minimizes the power consumption.
At Halt mode, both of the FFAOS and the FSLOW are shut down and waked up by key change or external
interrupt. So before entering Halt mode, users have to keep in mind to store the current input port statuses
into port registers. For avoiding awaking Halt mode wrongly, key strobe (KI) must be set as output, and the
data register (PX) must be cleared to low. If the system is waked up, the succeeding instructions after writing
SLP register will be executed after the clock source stable time.
If the IC is waked up from the standby mode by a reset pin, it goes into the reset procedure.
Instruction execution is stop and all peripheral modules are disabled.
FFAOS and FSLOW are both disabled automatically.
IC can being waked up from Halt mode if any of (a) Key change wake-up (refer to 7.1 I/O Ports) or (b)
external interrupt is happened.
After being waked up from Halt mode, IC will return to Normal mode if OPMD[7] = 1, or Slow mode if
OPMD[7] = 0.
The relative control registers are shown as the following tables:
Addr. Name R/W Bit Data Description Default
$15 SLP W [7:0] Write 0x5A to sleep xx