Olimpia CM 721/6 Plus User manual

CM 721/6 Plus
Technical Manual
Published on July, 2000
Version 1.0

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 1
TABLE OF CONTENTS
1. INTRODUCTION ....................................................................2
1.1 PRINCIPAL SPECIFICATION .......................................................2
1.2 BASIC FUNCTION ................................................................ 2
1.3 SYSTEM BLOCK DIAGRAM ..........................................................2
1.4 OUTLINE ....................................................................... 3
2. CIRCUIT .........................................................................4
2.1 POWER SUPPLY CIRCUIT ..........................................................4
2.2 TRANSFORMER WIRING DIAGRAM .................................................... 6
2.3 POWER SUPPLY SPECIFICATION .................................................... 6
2.4 MAIN CIRCUIT .................................................................. 7
2.4.1 CPU ....................................................................... 7
2.4.2 BEEP AND DRAWER DRIVER CIRCUITS ........................................... 9
2.4.3 RESET CIRCUIT AND POWER DOWN CIRCUIT ...................................... 9
2.4.4 DISPLAY CIRCUIT .......................................................... 10
2.4.5 PRINTER CIRCUIT .......................................................... 11
2.4.6 KEYBOARD MATRIX .......................................................... 12
3. TROUBLE SHOOTING PROCEDURE......................................................13
4. PRINTER INFORMATION.............................................................14
5. DISPLAY INFORMATION.............................................................16
6. CIRCUIT DIAGRAM ................................................................17
7. REMOVAL, RE-ASSEMBLE............................................................18
7.1 Keyboard Assembly ............................................................18
7.2 Cash Drawer Assembly .........................................................19
7.3 Cash Drawer Tray Assembly .................................................... 20
7.4 Cash Drawer Case Assembly .................................................... 21
7.5 GENERAL DRAWING of CM721/CM726 ............................................... 22

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 2
1. INTRODUCTION
1.1 PRINCIPAL SPECIFICATION
Primary Power 230V ± 10%, 50Hz or 60Hz ± 10%
Maximum Power Consumption 15.0W
Backed-up Power Ni_Cd Battery 3.6V, 270mAh
Printer EPSON M-42V
Microcontroller MITSUBISHI M38B57M6 24K ROM and 1K RAM
Roll Paper 58(W)*50(D) mm
Display Panel of CM721 Front Fluorescent Tube, 12 digits
Display Panel of CM726 Front and Rear Fluorescent Tube, 12 digits
Keyboard 39 KEYS
External Dimension 425(L)325(W)200(H) MM
Weight 5.0 ± 0.5Kg
1.2 BASIC FUNCTION
This kinds of ECR uses a 8-bits single chip microcontroller M38B57M6.It utilizes 24k bytes of
mask ROM On-Chip and 1K bytes of RAM On-Chip. This terminal also has a battery-backed up
clock which keeps track of the year, month, date, hour , minute and seconds.
Keyboard 39 Keys
Number of departments 6/12 Department
Number of PLU 100
Printer EPSON M-42V, 19 columns
1.3 SYSTEM BLOCK DIAGRAM
AC 230V F1,F2
BATTERY -30V,+17V P0,P10,P14-17,P3
+P6V,+6V
VCC,VBB
/RST P3,P16,P17,P20-24
P40
P32-37 P46
P43 P41,42
P44
P25,P64
P65
M38B57M6
PRINTER INTERFACE
DRAWER DRIVER
KEYBOARD
CASH DRAWER
PRINTER
DISPLAY
MOTOR DRIVER PAPER WINDING MOTOR
RESET & POWER
DOWN CIRCUIT
CONTROL LOCK
BUZZER
POWPER

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 3
1.4 OUTLINE

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 4
2. CIRCUIT
2.1 POWER SUPPLY CIRCUIT
FIG 2.1 Power Supply Circuit
+17V
+17V is used as the power source for the cash drawer and buzzer.
15.6V AC inputted into pin 1 and 2 of CN5 is rectified by diode D7,D8,D11,D12 and filtered by EC3
4700uF to become +17V DC unstable power source.
+P6V
This voltage is made from 17V. It applies to the collector of T5, a 2SD837B transistor.
It is also dropped across R25 an 2.2K ohm resistor, and D13 rated at 7.5V. This provided a bias
voltage of about 7.5V DC on the base of T5. This output voltage is filtered by EC4, a 100uF
capacitor.
+6V
This voltage is made from 17V. It applies to the collector of T6, a 2SC3242A transistor.
It is also dropped across R26 an 2.2K ohm resistor, and ZD2 rated at 6.2V. This provided a bias
voltage of about 6.2V DC on the base of T6. This output voltage is filtered by EC5, a 100uF
capacitor.
VCC (+5.0V)
The circuit generates the VCC by a diode (1S2076) to +6V. +6V applies to the “A” of D5, D5’S
Output is VCC. This voltage is used by U1(LB1268) and U3(HD14001BP).
VBB(+5.0V)
When the voltage at +6V has dropped, voltage back-up is provided by the battery.
This voltage is used by CPU and external RAM.
-30V
F1
F2
+6V
+17V+P6V
VBBVCC
＊
HEATSINK
PG
PG
＊
ZD1
HZ5C-3/RD5.6EB1
CN5
B6P-SHF-1AA
1
2
3
4
5
6D6
1S2076
C25 0.1u D11
RL102-E
R25
2.2K
CN6
B2B-XH-
A
1
2
EC2
100uF 50V
+
F3
125V/1A
T6
2SC3242A
R30
56K JP1
JUMPER
C23 0.1u
R26
2.2K
E C5 100uF /1 6V
+
D10
1S2076
D5
1S2076
R29 470
D7
R L102-E
T5
2SD837B
EC3
4700uF 35V
+
C24 0.1u R28
5.6K
D9
1S2076
D8
R L102-E
R27 470
D4
RL102-E
R31 1/2W 100 TC1
1uF/35V T
+
EC4
100uF 16V
+
FUSE(SLOW BLOW)1
250V 1A
ZD2
HZ6C-3/RD6.2EB3
F2125V/500mA
R24
10K
EC6 47uF/25V
+
D12
RL102-E
D13
RD 7. 5EB3

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 5
-30V
The -30V circuit uses 27V AC across pins 3 and 4 of CN5. This AC voltage is rectified by D4 a
RL102-E diode, and filtered by EC2, a 100uF capacitor.
-30V is approximately -30V DC. This voltage is used by the display and CPU.
Filament Voltage (F1, F2)
The display tube uses the filament voltage F1, F2.
Its AC input is 4.0V, and uses a ground reference -25V from the -30V circuit dropped across ZD1
and R27, R29 470 ohm register.

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 6
GRAY
ORANGE
YELLOW
YELLOW
ORANGE
ORANGE
RED
RED
4.45V
15.6V
27V
AC230V
50Hz
CT-63E
2.2 TRANSFORMER WIRING DIAGRAM
FIG 2.2 Transformer Wiring Diagram
2.3 POWER SUPPLY SPECIFICATION
Input-Power Consumption
Standing by Maximum 6.5 watts
Printing Maximum 15.0 watts
Output-Rated Voltage
+17V to GND Voltage 12V ± 0.85V
Ripple Less than 1.0V p-p
+P6V to GND Voltage 6.0V ± 0.2V
Ripple Less than 0.3V p-p
Stability Line regulation - Less than 0.3V
Temp regulation - Less than 0.3V
+6V to GND Voltage 6.0V ± 0.2V
Ripple Less than 0.3V p-p
Stability Line regulation - Less than 0.3V
Temp regulation - Less than 0.3V
+VCC to GND Voltage 5.0V ± 0.5V
Ripple Less than 0.1V p-p
Stability Line regulation - Less than 0.2V
Temp regulation - Less than 0.2V
-30V to GND Voltage -30V ± 2V
Ripple Less than 4.0V p-p
Stability Line regulation - Less than 8V
Temp regulation - Less than 2V
F1 to F2 Voltage 4.0V ± 0.2V AC (on -18V)
Stability Line regulation - Less than 1.0V

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 7
2.4 MAIN CIRCUIT
2.4.1 CPU
GENERAL DESCRIPTION
The M38B57M6 is a 8-bit microcomputer with 24K Bytes ROM, 1K Bytes RAM, and incorporate many
hardware peripherals such as an VFD controller/driver,8 bit resolution A/D converter, serial interface,
timer counter and interrupt function integrated on one chip..
FEATURES
• Number of basic instructions 71
• Memory Size 24K bytes of On-Chip mask ROM
1K bytes of On-Chip Data RAM
• Instruction execution time 0.48us (minimum instructions, at 4.19MHz)
• Supply power 2.7-5.5V
• Interrupt 21 Interrupt source
• Timers 16-bit TIMERX, 8-bit TIMER1-6
• FLD controller/driver Segment 15 to 25 lines,Digit 8 to 20 lines
• Programmable I/O ports 55
• Serial I/O Full duplex serial1,serial2
• Buzzer output 1kHZ, 2kHZ, 4kHZ(at M-clock 4.19MHZ)
• Power Saving Modes M-clock HALT ,STOP,S-clock HALT mode
• System Clock output Main system clock 4.19MHz ,subsystem clock 32.768kHz
• Package 80-pin plastic QFP(14X20mm)

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 8
PIN ARRANGEMENT (TOP VIEW)
FIG 2.3 CPU Pin Configurtion (Top View)
P00 to P07,P30 to P37,P10 to P17 :Fluorescent indicator panel
P20 to P27 :Key matrix Retrun(Keyboard)
P40 to P42 :Interrupt from Peripherals
P46 :Drawer
P43 : Buzzer output
P50 to P56 :ADDRESS BUS(A8 To A14)
P61 :EXTERNAL RAM ‘CS’
P62 :EXTERNAL RAM ‘WR’
P63 :EXTERNAL RAM ‘OE’
P64 :Printer solendoid drive signal
P65 :Printer motor drive signal
P70 to P77 :DATA BUS(D0 to D7)
P80 to P87 :ADDRESS BUS(A0 To A7)
XIN,XOUT :Crystal(Main)
XCOUT,XOIN :Crystal
RESET :Reset
U4
M38B57M6-183FP
P73/AN3
3
P72/AN2
4
P71/AN1
5
P70/AN0
6
P61/CNTR0/CNTR2
7
P60/CNTR1
8
P47/INT2
9
RESET
10
P91/XCOUT
11
P90/XOIN
12
VSS
13
XIN
14
XOUT
15
VCC
16
P46/T3OUT
17
P45/T1OUT
18
P44/PWM1
19
P43/BUZ01
20
P42/INT3
21
P41/INT1
22
P40/INT0
23
P17/FLD23 41 P16/FLD22 42
P74/AN4
2P75/AN5 1P20/BUZ02/FLD0 64
P21/FLD1 63 P22/FLD2 62 P23/FLD3 61 P24/FLD4 60 P25/FLD5 59 P26/FLD6 58 P27/FLD7 57 P00/FLD8 56 P01/FLD9 55
P02/FLD10 54 P03/FLD11 53 P04/FLD12 52 P05/FLD13 51 P06/FLD14 50 P07/FLD15 49 P10/FLD16 48 P11/FLD17 47 P12/FLD18 46 P13/FLD19 45 P14/FLD20 44 P15/FLD21 43
P87/PWMO/FLD39
24
P86/RTP1/FLD38 25
P85/RTP0/FLD37 26
P84/FLD36 27
VEE 28
P83/FLD35 29
P82/FLD34 30
P81/FLD33 31
P80/FLD32 32
P37/FLD31 33
P36/FLD30 34
P35/FLD29 35
P34/FLD28 36
P33/FLD27 37
P32/FLD26 38
P31/FLD25 39
P30/FLD24 40
P76/AN6
80 P77/AN7
79 P62/SRDY1/AN8
78 P63/AN9
77 P64/INT4/SBUSY1/AN10
76 P65/SSTB1/AN11
75 VREF
74 AVSS
73 P50/SIN1
72 P51/SOUT1
71 P52/SCLK11
70 P53/SCLK12
69 P54/RXD
68 P55/TXD
67 P56/SLCK21
66 P57/SRDY2/SCLK22
65

CM721/726 TECHNICAL MANUAL VERSION 1.0 2001.9.11 9
2.4.2 BEEP AND DRAWER DRIVER CIRCUITS
The solenoid for a drawer is activated using the signal P46 from the CPU.
This signal is normally Low, and goes High to cause the drawer to run. When P47 is High, T4 is on.
Current flow through the transistor cause the collector to be held Low, near grand potential.
The buzzer signal from the CPU P43 output is buzzer signal.
Its signal is square wave.
FIG 2.4 beep and drawer driver circuits
2.4.3 RESET CIRCUIT AND POWER DOWN CIRCUIT
The reset circuit prevents the CPU from starting to operate before the system is fully powered-up
and initialized.
Then 2uS after power is applied, reset goes high and the CPU can begin functioning.
When power in first applied to the circuit, the VBB begins charging EC1, a capacitor. While EC1 is
charge.
Once EC1 is fully charged, the voltage drops scores the capacitor.
A circuit using the +5.4V voltage generates power fall signal.
When power is on and the system is operating normally, the power fall signal stays at a high level.
The CPU watches power failure signals all the time. When power failure is detected, the CPU
commands to stop the Main clock and switch to Sub clock, under which it consumes about 20μA.
During the power failure, count up of the clock and power failure signals is kept watched.
The power failure circuit controls chip selection of the RAM and it keeps Low level under normal
condition and High level during power failure.
FIG 2.5 Reset And Power down Circuit
+17V
PG
BUZZER
BZ1
R12
4.7K
T1
2SC5395
+17V
PG
CN4
DRAWER
1
2
3
D3
RL102-E
R23 22K
T4
2SD986
+6V VBB
R16
4.7K
T3
2SC5395
R15
4.7K
R17 220
C20
0.01u
T2
2SA1993
R18 4.7K
D2
HZ5C-2
R19
4.7K
VBB
C13
0.1u EC1
1uF 50V
+
D1
1S2076
R7
100K