Omnivision CameraChip OV9650 User manual

APPLICATION NOTE
O
mni
TM
ision
This document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, non-in-
fringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or
sample.
OmniVision Technologies, Inc. disclaims all liability, including liability for infringement of any proprietary
rights, relating to the use of information in this document. No license, expressed or implied, by estoppel
or otherwise, to any intellectual property rights is granted herein.
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Note:
The information contained in this document is considered proprietary to OmniVision Technologies, Inc. This
information may be distributed only to individuals or organizations authorized by OmniVision Technologies, Inc. to
receive said information. Individuals and/or organizations are not allowed to re-distribute said information.
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™
Implementation Guide
Last Modified: 7 December 2004
Document Version: 1.1
Revision Number Date Revision
1.0 11/29/04 Initial Release
1.1 12/07/04 In Ta ble 4-1 on page 21, changed last six entries under column "Gain."

2Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
00Table of Contents
Section 1, Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Function Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Section 2, Image Sensor Array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Resolution Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Section 3, Timing Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Array Control and Frame Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.1 Frame Generation (SXGA, VGA, and lower resolutions) . . . . . . . . . 10
3.2 Sync Signal Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.3 Frame Rate Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3.1 Clock Prescalar (Timing Generator) . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3.2 Dummy Pixel Adjustment (Output Formatter) . . . . . . . . . . . . . . . . . . 12
3.3.3 Dummy Line Adjustment. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 Exposure Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4.1 Digital Exposure Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 Strobe Flash Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.6 RGB Raw Data Output Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Section 4, Analog Processing Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1.1 Manual Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1.2 Automatic Gain Control (AGC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.2 White Balance Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.2.1 Automatic White Balance Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.2.2 Manual White Balance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Section 5, Digital Signal Processor (DSP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1 Gamma Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1.1 Gamma Slope Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2 Color Matrix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2.1 Color Matrix Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3 Sharpness Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.4 Noise-Canceling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5 White Pixel Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.6 Digital Black Level Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.7 Lens Shading Correction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Version 1.1, December 7, 2004 Proprietary to OmniVision Technologies 3
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Section 6, Output Formatter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.1 Windowing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.2 Data Formatting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2.1 ITU-656 Format Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.2.2 Frame Rate Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.2.3 Output Data MSB/LSB Swap Enable . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.2.4 D[9:0] - PCLK Reference Edge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Section 7, Digital Video Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Section 8, Special Image Effects . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Section 9, Preview Mode to Still Image Capture Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
9.1 Exposure Time and Gain Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Section 10, SCCB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.1 Control Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.1.1 Register Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.1.2 Standby Mode Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.1.3 Tri-state Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
10.2 Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Section 11, Prototyping and Evaluation Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.1 OV9650EAA Prototyping Module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.2 OV9650ECX USB 2.0 Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Section 12, Lens selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Section 13, OV9650 Bug List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Appendix A, Reference SCCB Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

4Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
00List of Figures
Figure 1-1 OV9650 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3-1 Manual Exposure Frame Drop Timing Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 3-2 Desired Convergence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 3-3 SXGA Strobe Flash Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 3-4 VGA Strobe Flash Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 3-5 QVGA Strobe Flash Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 5-1 Gamma Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 5-2 Lens Shading Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 6-1 Example of Windowing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 6-2 MSB/LSB Output Data Swap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Version 1.1, December 7, 2004 Proprietary to OmniVision Technologies 5
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00List of Tables
Table 2-1 OV9650 Output Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 2-2 Resolution Register Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3-1 Frame Rate, Pixel Clock Rate, and Input Clock Rate (CLKRC=0x81, 4X PLL) . 11
Table 3-2 Banding Filter Value (Input Clock Frequency = 12 MHz, 4X PLL). . . . . . . . . . . . . 16
Table 3-3 AEC Convergence Limits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 3-4 AEC Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4-1 Total Gain to Control Bit Correlation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 4-2 AGC General Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 4-3 AGC Enable Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 4-4 AGC Convergence Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 4-5 AWB Red/Blue Balance Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 5-1 Related Registers and Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 5-2 Color Matrix Related Registers and Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 5-3 Color Matrix Related Registers and Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 5-4 Lens Shading Correction Registers and Parameters . . . . . . . . . . . . . . . . . . . . . . . 32
Table 6-1 Output Formatting General Controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 6-2 RGB:555 and RGB:565 Output Format Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 6-3 Windowing Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 6-4 Data Formatting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 7-1 Output Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 8-1 Special Image Effects. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 10-1 SCCB Control Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 10-2 Device Control Register List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
1 Introduction
This general application note is provided as a brief overview of the settings required for
programming the OV9650 CAMERACHIPTM. The Implementation Guide supplies the design engineer
with quick-start tips for successful design solutions.
The OV9650 Datasheet provides complete information on the features, pin descriptions, and
registers of the OV9650. The Implementation Guide is intended to complement the OV9650
Datasheet with considerations for PCB layout, register configurations, and timing parameters for
rapid product design and deployment.
1.1 Function Description
Figure 1-1 shows the functional block diagram of the OV9650 image sensor. The OV9650 includes:
•Image Sensor Array (1300 x 1028 resolution)
•Timing Generator
•Analog Processing Block
•Digital Signal Processor (DSP)
•Output Formatter
•Digital Video Port
•SCCB Interface
Figure 1-1 OV9650 Functional Block Diagram
A/D
MUX
A/D
GMUX
D[9:0]
B
RFormatterDSP Video
Port
Analog
Processing
Image Array
(1300 x 1028)
Column Sense Amp Exposure/Gain
Detect
Exposure/Gain
Control
White Balance
Detect
Control SCCB
Interface
Registers
Video Timing GeneratorClock
SIO_C SIO_D
PWDNRESETVSYNCPCLKHREFXVCLK1
White Balance
Row Select

Image Sensor Array
Version 1.1, December 7, 2004 Proprietary to OmniVision Technologies 7
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2 Image Sensor Array
The OV9650 CAMERACHIP has an active image array size of 1300 columns by 1028 rows (1,336,400
pixels).
The pixel cells themselves are identical, but have RGB color filters arranged in a line-alternating
BG/GR Bayer Pattern. The final YUV/YCbCr image uses this filter pattern to interpolate each pixel's
BG or GR color from the light striking the cell directly, as well as from the light striking the
surrounding cells. The 'Raw RGB' image does not have any image processing.
Table 2-1 lists all OV9650 output formats.
Table 2-1. OV9650 Output Formats
Device Format Output Register
OV9650
YUV/YCbCr 8 bits, 4:2:2 (Interpolated color) COM7[2]=0 (0x12)
GRB 8 bits, 4:2:2 (Interpolated color) COM7[2]=1 (0x12), COM7[0]=0,
COM15[4]=0 (0x40)
RGB565 5-bit R, 6-bit G, 5-bit B COM7[2]=1 (0x12), COM7[0] = 0,
COM15[4]=1 (0x40), COM15[5]=0
RGB555 5-bit R, 5-bit G, 5-bit B COM7[2]=1 (0x12), COM7[0] = 0,
COM15[4]=1 (0x40), COM15[5]=1
Raw RGB 10/8 bits (Bayer filter color) COM7[0]=1 (0x12), COM7[2] = 1

8Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
2.1 Resolution Formats
The OV9650 CAMERACHIP supports SXGA (1280x1024), VGA (640x480), CIF (352x288), QVGA
(320x240), QCIF(176x144), QQVGA (160x120) and QQCIF (88x72). The different register settings
for different resolution formats are listed in Table 2-2.
Note: Contact your local OmniVision support engineer for OV9650
Reference SCCB settings. Sensor power-on default values are not the
best settings for image quality.
Table 2-2. Resolution Register Settings (Sheet 1 of 2)
Resolution Register Address Value Description (12 MHz Input Clock, 4X PLL)
SXGA
COM1 (0x04) 0x00
15 fps SXGA YUV mode
COM3 (0x0C) 0x00
COM4 (0x0D) 0x00
CLKRC (0x11) 0x80
COM7 (0x12) 0x00
ADC (0x37) 0x81
ACOM (0x38) 0x93
OFON (0x39) 0x50
VGA
COM1 (0x04) 0x00
30 fps VGA YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x81
COM7 (0x12) 0x40
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43
QVGA
COM1 (0x04) 0x00
30 fps QVGA YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x83
COM7 (0x12) 0x10
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43

Image Sensor Array
Version 1.1, December 7, 2004 Proprietary to OmniVision Technologies 9
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QQVGA
COM1 (0x04) 0x24
30 fps QQVGA YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x83
COM7 (0x12) 0x10
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43
CIF
COM1 (0x04) 0x00
30 fps CIF YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x83
COM7 (0x12) 0x20
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43
QCIF
COM1 (0x04) 0x00
30 fps QCIF YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x87
COM7 (0x12) 0x08
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43
QQCIF
COM1 (0x04) 0x24
30 fps QQCIF YUV mode
COM3 (0x0C) 0x04
COM4 (0x0D) 0x80
CLKRC (0x11) 0x87
COM7 (0x12) 0x08
ADC (0x37) 0x91
ACOM (0x38) 0x12
OFON (0x39) 0x43
Table 2-2. Resolution Register Settings (Sheet 2 of 2)
Resolution Register Address Value Description (12 MHz Input Clock, 4X PLL)

10 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
3TimingGenerator
In general, the timing generator controls the following functions:
•Array Control and Frame Generation (SXGA, VGA, QVGA, QQVGA, CIF, QCIF and QQCIF outputs)
• Internal timing signal generation and distribution
•Frame Rate Timing
•Exposure Control
• External timing outputs (VSYNC, HREF/HSYNC, and PCLK)
3.1 Array Control and Frame Generation
3.1.1 Frame Generation (SXGA, VGA, and lower resolutions)
SXGA frame generation uses Progressive scanning of the array in which rows are sequentially read
and transferred out to the APB. The 'Raw RGB' output preserves the Bayer Filter pattern, so odd
rows follow the pattern (BG) and even rows follow the pattern (GR). Simple sub-sampling mode just
skips every other two rows and every other two columns for VGA mode. The OV9650 has built-in
VarioPixelTM technology to improve sub-sampled image resolution and reduce noise level.
Down-scaling technology down-scales the output size. VGA, QVGA, QQVGA, CIF, QCIF, and
QQCIF have the same view angle which cuts 6.25% of the vertical view and keeps the same
horizontal view of SXGA.
3.2 Sync Signal Selection
The OV9650 CAMERACHIP supplies two output sync signals: VSYNC and HREF. The vertical sync
(VSYNC) signal is output on pin D2. The horizontal reference signal (HREF) is output on pin E1.
The HSYNC signal is available on pin E1 (shares with HREF) when register COM10[6] (0x15) value
is set to "1".
The VSYNC and HSYNC signals are continuous. The HREF signal is only valid when there is active
output data. If there is no output data, the HREF signal will remain at either high or low, depending
on the polarity selection. The HSYNC/VSYNC/HREF/PCLK polarity selection is controlled by
register COM10[0,1,3,4] (0x15), respectively. Usually, an application uses the rising edge of PCLK
to capture data when HREF is high.
The OV9650 can encode horizontal and vertical sync information into data. Set register
COM1[6] (0x04) high to enable the CCIR656 format.
Refer to the OV9650 Datasheet for detailed signal timing information.

Timing Generator
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3.3 Frame Rate Timing
The OV9650 offers three methods of frame rate adjustment:
•Clock Prescalar (Timing Generator)
•Dummy Pixel Adjustment (Output Formatter)
•Dummy Line Adjustment
3.3.1 Clock Prescalar (Timing Generator)
OV9650 divides the input clock by 2 first. Setting register CLKRC[7] (0x11) high turns on the internal
clock doubler. Register CLKRC[5:0] is the internal clock pre-scalar. By programming register
CLKRC[5:0] (0x11), the frame rate and pixel rate can be divided by 1, 2, 3, 4, ... 64. The internal
clock frequency, fINT CLK, can be expressed as follows:
fINT CLK = fCLK ×((CLKRC[7] +1) / 2) / (CLKRC[5:0] +1)
tINT CLK = tCLK ×(CLKRC[5:0] +1) / ((CLKRC[7] +1) / 2)
Table 3-1 shows the maximum frame rate and pixel clock (PCLK) for the given input clock rate
(XCLK1). RGB raw pixel clock rate is half of YUV mode for the same frame rate and resolution.
Table 3-1. Frame Rate, Pixel Clock Rate, and Input Clock Rate (CLKRC=0x81, 4X PLL)
Resolution/Mode Maximum Frame Rate (fps) XCLK1 (MHz) PCLK (MHz)
SXGA/Raw RGB 15 12 24
SXGA/YUV 15 12a
a. CLKRC=0x80
48
VGA/Raw RGB 30 12 12
VGA/YUV 30 12 24
QVGA/Raw RGB 60 12 6
QVGA/YUV 60 12 12
QQVGA/Raw RGB 60 12 3
QQVGA/YUV 60 12 6
CIF/Raw RGB 60 12 12
CIF/YUV 60 12 24
QCIF/Raw RGB 120 12 6
QCIF/YUV 120 12 12
QQCIF/Raw RGB 120 12 3
QQCIF/YUV 120 12 6

12 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
3.3.2 Dummy Pixel Adjustment (Output Formatter)
By inserting dummy pixels in each row’s output, the frame rate can be changed while leaving the
pixel rate unchanged (see Section 6.2.2).
3.3.3 Dummy Line Adjustment
By inserting dummy lines in each frame output, the frame rate can be changed while leaving the
pixel rate unchanged (see Section 6.2.2).
3.4 Exposure Control
The OV9650 CAMERACHIP supports both automatic and manual exposure control modes. The
exposure time is defined as the interval from the cell precharge to the end of the photo-induced
current measurement and can be controlled manually or by using the AEC function. This exposure
control uses a 'rolling' shutter as exposure time is set on a row-by-row basis rather than on a
frame-by-frame basis.
Exposure Time interval is defined as follows (15 fps in SXGA mode):
tEXPOSURE = 2 ×(1520 ×tINT CLK)×AEC[15:0] where AEC[15:0] is defined as:
AEC[15:0] = {MSB, LSB} = {AECHM[5:0] (0xA1), AECH[7:0] (0x10), COM1[1:0] (0x04)}
Each bit in AEC[15:0] = tROW interval = 2 ×(1520 ×tINT CLK)
Note that both the AEC and AGC functions are interactive so registers and functions may be
common to both. Also, in general, the AEC is the primary control and will be adjusted before the
AGC (the AGC acts to adjust and center the AEC).
The algorithm used for the electronic exposure control is based on average luminance of the full,
center-quarter, or center-half image. Each frame has digitally-generated averages (YUV for YUV
mode or RGB for RGB mode) which are used to set the exposure time. The exposure is optimized
for a "normal" scene that assumes the subject is well lit relative to the background. In situations
where the image is not well lit, the AEC white/black ratio may be adjusted to suit the needs of the
application.
3.4.1 Digital Exposure Control
3.4.1.1 Manual Exposure Control Mode
The manual exposure control mode allows for the companion backend processor to control the
OV9650 image exposure. The companion backend processor may write exposure values to
CAMERACHIP register AECHM[5:0] (0xA1) (MSB), AECH[7:0] (0x10), and COM1[1:0] (0x04) (LSB)
according to its corresponding Auto-Exposure Control (AEC) algorithm.

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The minimum allowable exposure value is 1 line. Exposure modes of less than 1 line may be used
in special cases. The LSB signifies the 1 line exposure time. The exposure value data is 16-bits in
length.
If the exposure increment exceeds the Exposure Gap (SXGA - 15 lines max, VGA - 11 lines max,
QVGA/QVGA - 3 lines max, CIF - 89 lines max, QCIF/QQCIF - 41 lines max), the next frame will
appear over-exposed. Setting register COM9[1] (0x14) to a value of "1" will eliminate this
over-exposure frame by eliminating the HREF signal output. This provision also allows for the
companion backend processor to use the VSYNC as a frame data reset to eliminate the undesired
frame by register COM9[2] (0x14). Refer to Figure 3-1 for details.
Figure 3-1 Manual Exposure Frame Drop Timing Diagram
Rolling Horizontal Band Elimination in Manual Mode
The OV9650 supports a rolling shutter exposure mode and requires special exposure values when
used in 50/60 Hz lighting conditions to eliminate rolling horizontal band (flicker). The minimum
exposure value is 1/120 second for 60 Hz and 1/100 second for 50 Hz lighting conditions. The
following steps outline how to calculate the proper exposure value at 50 Hz/60 Hz light conditions:
1. Calculate the CAMERACHIP Minimum Exposure Line (MEL):
Line period is Tline = K ×Tpclk = K/fpclk, while K is PCLK number in one line, Tpclk is PCLK period (sec)
and fpclk is PCLK frequency (Hz). Tpclk = 1/fpclk. For example, for default 1280 x 1024 at 7.5 fps, K is
1520 x 2 in YUV mode and 1520 in RGB Raw Data mode. But YUV PCLK frequency is double that of RGB
Raw Data mode with same Tline.
For 60 Hz lighting: MEL = (1/120)/Tline = 1/(120 ×K ×Tpclk) = fpclk/(120 ×K)
For 50 Hz lighting: MEL = (1/100)/Tline = 1/(100 ×K ×Tpclk) = fpclk/(100 ×K)
Note: For calculating MEL, use the line period of QCIF for QQCIF
resolution. For QQVGA, use the line period of QVGA.

14 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
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2. Set the CAMERACHIP Available Exposure Line (AEL):
Suppose N is integer, N = 1,2,3…
Available exposure line are: AEL = N ×MEL where AEL should be equal or less than the maximum
exposure line limitation based on different resolutions.
3. Convert AEL to binary, and then send 2 LSBs hex number to register COM1[1:0] (0x04) and 8 MSBs hex
number to register AECH[7:0] (0x10) and 6 MSBs to register AECHM[5:0] (0xA1).
Maximum Exposure Line Limitation
OV9650 maximum exposure line values are:
• SXGA - 1048 lines
Register setting: {AECHM[5:0] (0xA1) = 0x01, AECH[7:0] (0x10) = 0x06, COM1[1:0] (0x04) = 0x00}
• VGA - 498 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x7C, COM1[1:0] (0x04) = 0x02}
• QVGA - 248 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x3E, COM1[1:0] (0x04) = 0x00}
• QQVGA - 248 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x3E, COM1[1:0] (0x04) = 0x00}
• CIF - 382 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x5F, COM1[1:0] (0x04) = 0x02}
• QQCIF - 190 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x2F, COM1[1:0] (0x04) = 0x02}
• QQCIF - 190 lines
Register setting: {AECHM[5:0] (0xA1) = 0x00, AECH[7:0] (0x10) = 0x2F, COM1[1:0] (0x04) = 0x02}
3.4.1.2 Automatic Exposure Control Mode (AEC)
The AEC function allows for the CAMERACHIP to adjust the exposure without external command or
control. The registers AECHM[5:0] (0xA1), AECH[7:0] (0x10), and COM1[1:0] (0x04) are adjusted
by the CAMERACHIP internal controls and cannot be overwritten by an external device.
Auto-Exposure Control Enable Bit
To enable the AEC function, set register COM8[0] (0x13) to "1". The AEC controls image luminance
using registers AEW (0x24) and AEB (0x25). The register AEW (0x24) value indicates the high
threshold value and register AEB (0x25) indicates the low threshold value. When the target image
luminance average value (YAVG) is within the range specified by registers AEW (0x24) and AEB
(0x25), the AEC keeps the image exposure. When YAVG, is greater than the value in register AEW
(0x24), the AEC will decrease the image exposure. When YAVG is less than the value in register
AEB (0x25), the AEC will increase the image exposure. Accordingly, the value in register AEW
(0x24) should be greater than the value in register AEB (0x25). The gap between the AEW (0x24)
and AEB (0x25) register values controls the image stability. The recommended values for register
AEW (0x24) and AEB (0x25) are: AEW (0x24) = 0x74; AEB (0x25) = 0x68.

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Rolling Horizontal Band Elimination in Auto Mode
OV9650 also provides rolling horizontal band eliminate function in auto exposure mode. A banding
filter is employed to eliminate banding caused by 50/60 Hz lighting. To enable this function, set
register COM8[5] (0x13) to high.
When the banding filter is enabled, the AEC will set the exposure time to a set of discete values,
among which the minimum value is called the Banding Filter Value. OV9650 has two options to set
the Banding Filter Value. The first option is manual banding filter mode, which is enabled by setting
register COM11[0] (0x3B) to high. In manual banding filter mode, the Banding Filter Value is
specified by register MBD[7:0] (0x6A) and the companion backend processor can program this
register according to the lighting frequency. The second option is auto banding mode, which is
enabled by setting register COM11[0] (0x3B) to low. In auto banding mode, the Banding Filter Value
is specified by register BD50ST[7:0] (0xA2) if register COM17[0] (0x42) is high, or by register
BD60ST[7:0] (0xA3) if register COM17[0] (0x42) is low. The companion backend processor can set
register BD50ST[7:0] (0xA2) and BD60ST[7:0] (0xA3) for 50 Hz and 60 Hz, respectively, and then,
toggle register COM17[0] (0x42) to switch between 50 Hz and 60 Hz lighting frequency.
If the light is too strong, the minimum exposure time (equal to Banding Filter Value) to eliminate the
banding may result in an over-exposed image. To avoid over-exposure, OV9650 has an option to
allow the real exposure time to be less than the Banding Filter Value by setting register COM9[3]
(0x14).
Banding Filter Value Calculation
The Banding Filter Value depends on the lighting frequency, frame rate, and maximum exposure.
The equations are shown below. Frame rate can be derived from Tabl e 3 - 1 . Refer to section
Maximum Exposure Line Limitation for the maximum exposure.
Note:
1. Refer to “Maximum Exposure Line Limitation” on page 14 for details of maximum exposure line.
2. If the frame rate is adjusted by inserting dummy lines, the Maximum Exposure Line is equal to the
original value plus the number of dummy lines. Consequently, the Banding Filter Value does not change
with the number of dummy line.
3. If the frame rate is adjusted by inserting dummy pixels, the Maximum Exposure Line does not change.
Consequently, the Banding Filter Value will change with the number of dummy pixels. In the case where
the OV9650 works at a system clock frequency other than 24 MHz or 48 MHz, it is very convenient to
adjust the frame rate by adding some dummy pixels (setting register EXHCH (0x2A) and EXHCL (0x2B))
while keep the Banding Filter Value the same with that using a 24 MHz or 48MHz system clock.
120
Frame Rate x Maximum Exposure Line
Banding Filter Value = for 60 Hz
100
Frame Rate x Maximum Exposure Line
Banding Filter Value = for 50 Hz

16 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
Table 3-2 shows the Banding Filter Values for 50 Hz and 60 Hz light frequency conditions. Contact
your local OmniVision FAE to get the appropriate setting for your application.
With Banding Filter Disabled
The AEC function supports both normal and fast speed selections in order to bring the image
exposure into the range set by the values in registers AEW (0x24) and AEB (0x25). AEC set to
normal mode will allow for single-step increase or decrease in the image exposure to maintain the
specified range. AEC set to fast mode will provide for an approximate ten-step increase or decrease
in the image exposure to maintain the specified range. A value of "0" in register COM8[7] (0x13) will
result in normal speed operation and a "1" will result in fast speed operation.
In fast mode, register VPT (0x26) sets the AEC control zone and register COM8[6] (0x13) sets the
step size. When COM8[6]=1, the exposure time will decrease by half if the target image YAVG is
greater than VPT[7:4] (0x26) ×16 and the exposure time will double if YAVG is less than VPT[3:0]
(0x26) ×16. When COM8[6]=0, the exposure time will increase/decrease by 1/16th.
Table 3-2. Banding Filter Value (Input Clock Frequency = 12 MHz, 4X PLL)
Resolution Clock Pre-Scalar
(CLKRC (0x11)) Format Frame Rate (fps)
Banding Filter Value
50 Hz
(BD50ST (0xA2))
60 Hz
(BD60ST (0xA3))
SXGA 0x81
YUV 7.5 0x4E 0x41
Raw 15 0x9D 0x83
VGA 0x83 YUV/Raw 15 0x4B 0x3E
QVGA 0x83 YUV/Raw 30 0x4B 0x3E
QQVGA 0x83 YUV/Raw 30 0x4B 0x3E
CIF 0x83 YUV/Raw 30 0x73 0x60
QCIF 0x87 YUV/Raw 30 0x39 0x30
QQCIF 0x87 YUV/Raw 30 0x39 0x30

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AEC Convergence Limits
Table 3-3 lists the registers used for setting AEC convergence limits.
As shown in Figure 3-2, the AEC/AGC convergence uses two regions, the inner stable operating
region and the outer Control Zone, which defines the convergence step size change as follows:
• Outside Control Zone
Exposure time increase: 2 ×(AEC[15:0])
Exposure time decrease: (AEC[15:0]) / 2
• Inside Control Zone
Exposure time increase: (AEC[15:0]) / 16
Exposure time decrease: (AEC[15:0]) / 16
Once the current value is inside the stable operating region, the AEC/AGC value has converged.
Figure 3-2 Desired Convergence
Control Zone Upper Limit: {VPT[7:4] (0x26) (MSB), 4’b0000 (LSB)}
Control Zone Lower Limit: {VPT[3:0] (0x26) (MSB), 4’b0000 (LSB)}
Stable Operating Region Upper Limit: AEW[7:0] (0x24)
Stable Operating Region Lower Limit: AEB[7:0] (0x25)
Table 3-3. AEC Convergence Limits
Function Register Address
Control Zone – Upper Limit high nibble VPT[7:4] 0x26
Control Zone – Lower Limit high nibble VPT[3:0] 0x26
Stable Operating Region – Upper Limit AEW[7:0] 0x24
Stable Operating Region – Lower Limit AEB[7:0] 0x25
Step Size Limit COM8[6] 0x13
Control Zone Stable Operating Region
Desired
Convergence

18 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
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AEC Options
Table 3-4 shows lists the registers used for various AEC options.
Center-Based Reference Area Enable
Enabling this option changes the AEC/AGC exposure reference from the full array to the
center-quarter, or center-half of the array.
Table 3-4. AEC Options
Function Register Address Description
Center-Based Reference Area
Enable COM11[4:3] 0x3B
00: Full
01: Center-half
10: Center-quarter
11: Not allowed
Banding Filter Enable COM8[5] 0x13 Banding filter enable "1"
Manual Banding Filter Enable COM11[0] 0x3B High enable
Manual Banding Filter Value MBD[7:0] 0x6A Minimum banding filter exposure time
Auto Banding Filter Enable COM11[0] 0x3B COM11[0]=0
Auto Banding Filter Value BD50ST[7:0]
BD60ST[7:0]
0xA2
0xA3 Minimum banding filter exposure time
Auto Banding Filter Value Selection COM17[0] 0x42
0: Select BD60ST[7:0] (0xA3) as
Auto Banding Filter Value
1: Select BD50ST[7:0] (0xA2) as
Auto Banding Filter Value
Banding Filter - Avoid Over-Exposure COM9[3] 0x14
0: Exposure time CANNOT be less
than Banding Filter Value
1: Exposure time CAN be less than
Banding Filter Value

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3.5 Strobe Flash Control
To achieve the best image quality possible in low light conditions, the use of a strobe flash is
recommended. The OV9650 supports rolling shutter exposure mode.
To avoid the need for a mechanical shutter, the OV9650 should be set to rolling shutter mode. When
the rolling shutter mode is enabled and the image requires strobe flash illumination, the strobe
timing must be limited. Timing diagrams for strobe flash timing are shown in Figure 3-4 and
Figure 3-5.
Figure 3-3 SXGA Strobe Flash Timing Diagram
Figure 3-4 VGA Strobe Flash Timing Diagram
Figure 3-5 QVGA Strobe Flash Timing Diagram
VSYNC
Line Output
12
0 0 12 0
Line Reset
0121023 1024
1023 1024
0 0 12
Note: If using live video mode for still capture
and if flash is required, use maximum
exposure (1 frame) and turn on flash only
between this gray period.
Exposure Time ~= 1 Tframe
12 x Tline
4 x Tline
9 x Tline
1023
1023
1024
VSYNC
Line Output
12479 480
0 0 12479 0
Line Reset
012479 480 0 0 12479 480
Note: If using live video mode for still capture
and if flash is required, use maximum
exposure (1 frame) and turn on flash only
between this gray period.
Exposure Time ~= 1 Tframe
8 x Tline
4 x Tline
5 x Tline
VSYNC
Line Output
12239 240
0 0 12239 0
Line Reset
012239 240 0 0 12239 240
Note: If using live video mode for still capture
and if flash is required, use maximum
exposure (1 frame) and turn on flash only
between this gray period.
Exposure Time ~= 1 Tframe
7 x Tline
2 x Tline

20 Proprietary to OmniVision Technologies Version 1.1, December 7, 2004
OV9650 Color CMOS SXGA (1.3 MegaPixel) CameraChip™ Omni ision
3.6 RGB Raw Data Output Sequence
Review the OV9650 Datasheet for complete details regarding the RGB raw data output. Register
COM10[4] (0x15) determines when the data is valid. Setting register COM10[4] (0x15) t0 "1"
indicates the data is updated at the rising edge and valid at the falling edge of PCLK. Setting register
COM10[4] (0x15) t0 "0" indicates the data is updated at the falling edge and valid at the rising edge
of PCLK. The data receiver should latch data when data is valid, with either the rising or falling edge
of PCLK, depending on register COM10[4] (0x15). Depending on this polarity selection, if the HREF
signal is high, the data is valid. If the HREF signal is low, the data is not valid. HREF polarity can
also be changed by setting register COM10[3] (0x15).
When using the HSYNC signal, adjust registers EXHCH (0x2A), HSYST (0x30), and HSYEN (0x31)
to adjust the HSYNC signal rising and falling edges to obtain valid data. To obtain the HSYNC and
HREF width, set registers HSTART (0x17) and HSTOP (0x18) or EXHCH (0x2A), HSYST (0x30),
and HSYEN (0x31), respectively.
4 Analog Processing Block
This block performs all analog image functions including Automatic Gain Control (AGC), Automatic
White Balance (AWB), and other image manipulation functions
4.1 Gain Control
The OV9650 CAMERACHIP provides support for both AGC and manual gain control modes.
4.1.1 Manual Gain Control
The manual gain control mode allows for the companion backend processor to control the OV9650
gain value. The companion backend processor may write gain control values to the CAMERACHIP
RGB raw data register GAIN[7:0] (0x00) according to its corresponding AGC algorithm. The gain
value is shown in Table 4-1.