On semiconductor Mc14028b User manual

©Semiconductor Components Industries, LLC, 2006

June, 2006 − Rev. 6 1Publication Order Number:

MC14028B/D

MC14028B

BCD−To−Decimal Decoder

Binary−To−Octal Decoder

The MC14028B decoder is constructed so that an 8421 BCD code

on the four inputs provides a decimal (one−of−ten) decoded output,

while a 3−bit binary input provides a decoded octal (one−of−eight)

code output with D forced to a logic “0”. Expanded decoding such as

binary−to−hexadecimal (one−of−sixteen), etc., can be achieved by

using other MC14028B devices. The part is useful for code

conversion, address decoding, memory selection control,

demultiplexing, or readout decoding.

Features

•Diode Protection on All Inputs

•Supply Voltage Range = 3.0 Vdc to 18 Vdc

•Capable of Driving Two Low−power TTL Loads or One Low−Power

Schottky TTL Load Over the Rated Temperature Range

•Positive Logic Design

•Low Outputs on All Illegal Input Combinations

•Similar to CD4028B

•Pb−Free Packages are Available*

MAXIMUM RATINGS (Voltages Referenced to VSS)

Parameter Symbol Value Unit

DC Supply Voltage Range VDD −0.5 to +18.0 V

Input or Output Voltage Range

(DC or Transient) Vin, Vout −0.5 to VDD

+ 0.5 V

Input or Output Current (DC or Transient)

per Pin Iin, Iout ±10 mA

Power Dissipation per Package (Note 1) PD500 mW

Ambient Temperature Range TA−55 to +125 °C

Storage Temperature Range Tstg −65 to +150 °C

Lead Temperature (8−Second Soldering) TL260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Temperature Derating: Plastic “P and D/DW”

Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high−impedancecircuit. For proper operation, Vin and Vout should be constrained

to the range VSS v(Vin or Vout) vVDD.

Unused inputs must always be tied to an appropriate logic voltage level

(e.g., either VSS or VDD). Unused outputs must be left open.

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

A = Assembly Location

WL, L = Wafer Lot

YY, Y = Year

WW, W = Work Week

G = Pb−Free Package

MARKING

DIAGRAMS

PDIP−16

P SUFFIX

CASE 648

SOIC−16

D SUFFIX

CASE 751B 1

16 14028BG

AWLYWW

SOEIAJ−16

F SUFFIX

CASE 966 1

16 MC14028B

ALYWG

MC14028BCP

AWLYYWWG

MC14028B

http://onsemi.com

PIN ASSIGNMENT

125

VDD

VSS

TRUTH TABLE

DC B A Q9Q8Q7Q6Q5Q4Q3Q2Q1Q0

00000000000001

00010000000010

00100000000100

00110000001000

01000000010000

01010000100000

01100001000000

01110010000000

10000100000000

10011000000000

10100000000000

10110000000000

11000000000000

11010000000000

11100000000000

11110000000000

BLOCK DIAGRAM

8421

BCD

INPUTS

DECIMAL

DECODED

OUTPUTS

OCTAL

DECODED

OUTPUTS

DQ9

3−BIT

BINARY

INPUTS

VDD = PIN 16

VSS = PIN 8

ORDERING INFORMATION

Device Package Shipping†

MC14028BCP PDIP−16 25 Units / Rail

MC14028BCPG PDIP−16

(Pb−Free)

MC14028BD SOIC−16 48 Units / Rail

MC14028BDG SOIC−16

(Pb−Free)

MC14028BDR2 SOIC−16 2500 / Tape & Reel

MC14028BDR2G SOIC−16

(Pb−Free)

MC14028BF SOEIAJ−16 50 Units / Rail

MC14028BFEL SOEIAJ−16 2000 / Tape & Reel

MC14028BFELG SOEIAJ−16

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

MC14028B

http://onsemi.com

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

Symbo

ÎÎÎ

VDD

Vdc

ÎÎÎÎÎ

− 55_C

ÎÎÎÎÎÎÎÎÎ

25_C

ÎÎÎÎÎ

125_C

ÎÎÎ

Unit

ÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎÎ

Min

ÎÎÎ

Typ

(Note 2)

ÎÎÎÎ

Max

ÎÎÎ

Min

ÎÎÎ

Max

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Output Voltage “0” Leve

Vin = VDD or 0

“1” Leve

Vin = 0 or VDD

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

VOL

ÎÎÎ

5.0

ÎÎÎ

−

ÎÎÎ

0.05

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

0.05

ÎÎÎ

−

ÎÎÎ

0.05

ÎÎÎ

Vdc

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

VOH

ÎÎÎ

5.0

ÎÎÎ

4.95

9.95

14.95

ÎÎÎ

−

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

4.95

9.95

14.95

ÎÎÎ

5.0

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

4.95

9.95

14.95

ÎÎÎ

−

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Input Voltage “0” Leve

(VO= 4.5 or 0.5 Vdc)

(VO= 9.0 or 1.0 Vdc)

(VO= 13.5 or 1.5 Vdc) “1” Leve

(VO= 0.5 or 4.5 Vdc)

(VO= 1.0 or 9.0 Vdc)

(VO= 1.5 or 13.5 Vdc)

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

VIL

ÎÎÎ

5.0

ÎÎÎ

−

ÎÎÎ

1.5

3.0

4.0

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

2.25

4.50

6.75

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

1.5

3.0

4.0

ÎÎÎ

−

ÎÎÎ

1.5

3.0

4.0

ÎÎÎ

Vdc

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

VIH

ÎÎÎ

5.0

ÎÎÎ

3.5

7.0

ÎÎÎ

−

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

3.5

7.0

ÎÎÎ

2.75

5.50

8.25

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

3.5

7.0

ÎÎÎ

−

ÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Output Drive Current

(VOH = 2.5 Vdc) Source

(VOH = 4.6 Vdc)

(VOH = 9.5 Vdc)

(VOH = 13.5 Vdc)

(VOL = 0.4 Vdc) Sin

(VOL = 0.5 Vdc)

(VOL = 1.5 Vdc)

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

IOH

ÎÎÎ

5.0

ÎÎÎ

– 3.0

– 0.64

– 1.6

– 4.2

ÎÎÎ

−

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

– 2.4

– 0.51

– 1.3

– 3.4

ÎÎÎ

– 4.2

– 0.88

– 2.25

– 8.8

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

– 1.7

– 0.36

– 0.9

– 2.4

ÎÎÎ

−

ÎÎÎ

mAdc

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

IOL

ÎÎÎ

5.0

ÎÎÎ

0.64

1.6

4.2

ÎÎÎ

−

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

0.51

1.3

3.4

ÎÎÎ

0.88

2.25

8.8

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

0.36

0.9

2.4

ÎÎÎ

−

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎ

Input Current

ÎÎÎÎ

Iin

ÎÎÎ

−

ÎÎÎ

±0.1

ÎÎÎÎ

−

ÎÎÎ

±0.00001

ÎÎÎÎ

±0.1

ÎÎÎ

−

ÎÎÎ

±1.0

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎ

Input Capacitance (Vin = 0)

ÎÎÎÎ

Cin

ÎÎÎ

−

ÎÎÎ

−

ÎÎÎ

−

ÎÎÎÎ

−

ÎÎÎ

5.0

ÎÎÎÎ

7.5

ÎÎÎ

−

ÎÎÎ

−

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Quiescent Current (Per Package)

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

IDD

ÎÎÎ

5.0

ÎÎÎ

−

ÎÎÎ

5.0

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

0.005

0.010

0.015

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

5.0

ÎÎÎ

−

ÎÎÎ

150

300

600

ÎÎÎ

mAdc

ÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎ

Total Supply Current (Note 3, 4)

(Dynamic plus Quiescent,

Per Package)

(CL= 50 pF on all outputs, all

buffers switching)

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

ÎÎÎ

5.0

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

IT= (0.3 mA/kHz) f + IDD

IT= (0.6 mA/kHz) f + IDD

IT= (0.9 mA/kHz) f + IDD

ÎÎÎ

mAdc

2. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

3. The formulas given are for the typical characteristics only at 25_C.

4. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL– 50) Vfk where: ITis in mA (per package), CLin pF,

V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

SWITCHING CHARACTERISTICS (Note 5) (CL= 50 pF, TA= 25_C)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

Symbol

ÎÎÎ

VDD

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

Min

ÎÎÎ

Typ

(Note 6)

ÎÎÎ

Max

ÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Output Rise and Fall Time

tTLH, tTHL = (1.5 ns/pF) CL+ 25 ns

tTLH, tTHL = (0.75 ns/pF) CL+ 12.5 ns

tTLH, tTHL = (0.55 ns/pF) CL+ 9.5 ns

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

tTLH,

tTHL

ÎÎÎ

5.0

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

100

ÎÎÎ

200

100

ÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Propagation Delay Time

tPLH, tPHL = (1.7 ns/pF) CL+ 215 ns

tPLH, tPHL = (0.66 ns/pF) CL+ 97 ns

tPLH, tPHL = (0.5 ns/pF) CL+ 65 ns

ÎÎÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎÎÎ

tPLH,

tPHL

ÎÎÎ

5.0

ÎÎÎÎ

ÎÎ

ÎÎÎÎ

−

ÎÎÎ

300

130

ÎÎÎ

600

260

180

ÎÎÎ

5. The formulas given are for the typical characteristics only at 25_C.

6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

MC14028B

http://onsemi.com

Figure 1. Dynamic Signal Waveforms

Inputs B, C, and D switching

in respect to a BCD code.

Inputs A, B, and D low.

All outputs connected to respective

CLloads. f in respect to a system clock

20 ns 20 ns

90%

50%

10%

1/f

VDD

VSS

20 ns 20 ns

INPUT A

INPUT C

10%

90%

50%

VDD

VSS

VOH

VOL

tPLH tPHL

tTLH tTHL

50%

90%

10%

LOGIC DIAGRAM

APPLICATIONS INFORMATION

Expanded decoding can be performed by using the

MC14028B and other CMOS Integrated Circuits. The

circuit in Figure 2 converts any 4−bit code to a decimal or

hexadecimal code. The accompanying table shows the input

binary combinations, the associated “output numbers” that

go “high” when selected, and the “redefined output

numbers” needed for the proper code. For example: For the

combination DCBA = 0111 the output number 7 is redefined

for the 4−bit binary, 4−bit gray, excess−3, or excess−3 gray

codes as 7, 5, 4, or 2, respectively. Figure 3 shows a 6−bit

binary 1−of−64 decoder using nine MC14028B circuits and

two MC14069UB inverters.

The MC14028B can be used in decimal digit displays,

such as, neon readouts or incandescent projection indicators

as shown in Figure 4.

Figure 2. Code Conversion Circuit and Truth Table

INPUTS

MC14028B

CBA

DC B A DCB A

MC14028B

Q9 Q0 Q9 Q0

15 −8 15 −0

OUTPUT NUMBERS

MC14028B

http://onsemi.com

Inputs Output Numbers

Code and Redefined

Output Numbers

Hexadecimal Decimal

D C B A 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1

0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 2 3 0 2 2

0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 3 2 0 3 3

0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 4 7 1 4 4

0 1 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 5 6 2 3

0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 6 4 3 1 4

0 1 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 7 5 4 2

1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 8 15 5

1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 9 14 6 5

1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 10 12 7 9 6

1 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 11 13 8 5

1 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 12 8 9 5 6

1 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 13 9 6 7 7

1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14 11 8 8 8

1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15 10 7 9 9

Figure 3. Six−Bit Binary 1−of−64 Decoder

INPUTS

A B C D E F INHIBIT(NO SELECTION)

A B C −D

Q0 Q9

MC14028B

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

ABCD

MC14028B

Q0 Q9

70 8 15 16 23 24 31 32 39 40 47 48 55 56 63

*1/6 MC14069UB 64 OUTPUTS (SELECTED OUTPUT IS HIGH)

Figure 4. Decimal Digit Display Application

MC14028B

DQ8

902910

APPROPRIATE

VOLTAGE

NEON

DISPLAY

APPROPRIATE

VOLTAGE

INCANDESCENT

DISPLAY

4−Bit

Binary

4−Bit

Gray

Excess−3

Gray

Aiken

4221

MC14028B

http://onsemi.com

PACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS

WHEN FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE

MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

−A−

HGD

16 PL

SEATING

916

PLANE

−T−

0.25 (0.010) T

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.740 0.770 18.80 19.55

B0.250 0.270 6.35 6.85

C0.145 0.175 3.69 4.44

D0.015 0.021 0.39 0.53

F0.040 0.70 1.02 1.77

G0.100 BSC 2.54 BSC

H0.050 BSC 1.27 BSC

J0.008 0.015 0.21 0.38

K0.110 0.130 2.80 3.30

L0.295 0.305 7.50 7.74

M0 10 0 10

S0.020 0.040 0.51 1.01

____

PDIP−16

CASE 648−08

ISSUE T

SOIC−16

CASE 751B−05

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

16 9

SEATING

PLANE

RX 45_

8 PLP

−B−

−A−

0.25 (0.010) B S

−T−

16 PL

0.25 (0.010) A S

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A9.80 10.00 0.386 0.393

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.229 0.244

R0.25 0.50 0.010 0.019

____

MC14028B

http://onsemi.com

PACKAGE DIMENSIONS

SOEIAJ−16

CASE 966−01

ISSUE A

DIM MIN MAX MIN MAX

INCHES

−−− 2.05 −−− 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.10 0.20 0.007 0.011

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0.70 0.90 0.028 0.035

−−− 0.78 −−− 0.031

_10 _0

_10 _

LEQ1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND ARE

MEASURED AT THE PARTING LINE. MOLD FLASH

OR PROTRUSIONS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

DETAIL P

VIEW P

0.13 (0.005) 0.10 (0.004)

16 9

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications

intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

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