P&E Microcomputer Systems MON08 MULTILINK User manual

July 2002
MON08 MULTILINK
USER MANUAL
©P&E Microcomputer Systems, Inc., 2001; All Rights Reserved

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Manual version 1.00

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1 INTRODUCTION ............................................................................................................1
2 REQUIREMENTS FOR DEBUGGING/PROGRAMMING VIA MON08....................1
3 MON08 MULTILINK HARDWARE CONFIGURATIONS..........................................2
3.1 PC Parallel Port ..............................................................................................................................2
3.2 Power Supply..................................................................................................................................2
3.3 Target Power Management.............................................................................................................2
3.4 Optional Oscillator .........................................................................................................................2
3.5 Target MON08 Connector..............................................................................................................2

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MON08 Multilink User Manual 1
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1 INTRODUCTION
P&E’s MON08 Multilink is designed to control Motorola 68HC908 targets
with Monitor ROM (MON08 Port). It uses the PC parallel port to control a
target 68HC908 processor via the MON08 port
2 REQUIREMENTS FOR DEBUGGING/PROGRAMMING VIA
MON08
a. High voltage on target IRQ line during reset sequence
The MON08 Multilink board controls and provides high voltage for
both the IRQ and the RESET lines.
b. Certain port pins driven to specific values during reset
The software package that comes with the MON08 Multilink
allows you to choose your specific target processor, with different
monitor mode options.
c. Single-wire serial communications at a baud rate proportional
to MCU frequency
The MON08 Multilink defaults to an auto-baud feature, which
samples the target frequency and sets the proper communications
rate.
d. Target hardware must be power sequenced so VDD goes below
0.1V at certain points during the security protocol
The MON08 Multilink performs automatic power sequencing of
the target MCU system.
e. Communications pin and port pin voltage must match target
VDD
The MON08 Multilink provides 2V, 3V, or 5V DC power through
the MON08 header to the target system.

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3 MON08 MULTILINK HARDWARE CONFIGURATIONS
3.1 PC Parallel Port
The MON08 Multilink uses the PC parallel port to control a target 68HC908
processor via the MON08 port. The PC parallel port should be set to one of the
following in the PC’s BIOS settings: Standard, Normal, Compatible, AT, SPP.
DO NOT use ECP or EPP or PS/2 Bidirectional.
3.2 Power Supply
The MON08 Multilink uses a 9V DC power supply with a center positive 1.3 x
3.5mm plug.
3.3 Target Power Management
The MON08 Multilink provides 2V, 3V, or 5V 125mA DC power to the target
system through the MON08 connector.
3.4 Optional Oscillator
The MON08 Multilink provides an oscillator of 4.9152 MHz to pin 13 of the
MON08 connector. If the target is a 5V system, the user may use this clock
signal to overdrive the target crystal.
3.5 Target MON08 Connector
The MON08 CYCLONE provides a MON08 connector to the target MON08
Port. It adopts the standard pin-out for MON08 debugging (as used on different
ICS boards) with some additions. The general pin-out is as follows:
PIN1 - NC GND - PIN2
PIN3 - NC RST - PIN4
PIN5 - NC IRQ - PIN6
PIN7 - NC MON4 - PIN8
PIN9 - NC MON5 - PIN10
PIN11 - NC MON6 - PIN12
PIN13 - OSC MON7 - PIN14
PIN15 - Vout MON8 - PIN16
Please note that NC designates “No Connect.” These pins are reserved for

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future use. Make sure you do not connect any signal to these lines.
The GND/RST/IRQ connections are standard for debugging all 68HC908
devices.
The OSC pin is added by the MON08 Multilink. The MON08 Multilink
provides the Pin 13 of the MON08 connector with an oscillator frequency of
4.9152 MHz. It may be used to overdrive the target crystal if the target crystal
is of very low frequency.
The Vout pin is added by the MON08 Multilink. 2V, 3V, or 5V is connected to
pin 15 of the MON08 connector.
The MON4-MON8 signals are software configurable to support connections
to different 68HC908 devices. Depending upon the device, either the MON4 or
MON5 pin is the single-wire communications line (which usually corresponds
to PORTA0 or PORTB0). The rest of the lines are either no connect or are port
lines which must be driven to particular values upon reset. The MON08
Multilink software lists the target processor types and their corresponding pin-
outs for user references. The software also selects the single-wire
communications line according to the target processor type.
Specifically, the following figures depict the MON08 connector pin-outs for
the corresponding target processor types:
3.5.1 68HC908AB
Figure 3-1. 68HC908AB Family MON08 Pinout
PORTA0 from the target processor is connected to the MON08 connector Pin
10, acting as the communications line. The user should pull this line up to
target VDD.
PORTC0, PORTC1, and PORTC3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC0 and pull down PORTC1, and pull
up/down PORTC3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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3.5.2 68HC908AS
Figure 3-2. 68HC908AS Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTC0, PORTC1, and PORTC3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC0 and pull down PORTC1, and pull
up/down PORTC3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.
3.5.3 68HC908AT
Figure 3-3. 68HC908AT Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTC0, PORTC1, and PORTC3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC0 and pull down PORTC1, and pull
up/down PORTC3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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3.5.4 68HC908AZ
Figure 3-4. 68HC908AZ Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTC0, PORTC1, and PORTC3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC0 and pull down PORTC1, and pull
up/down PORTC3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.
3.5.5 68HC908BD
Figure 3-5. 68HC908BD Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTC0, PORTC1, and PORTC3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC0 and pull down PORTC1, and pull
up/down PORTC3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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3.5.6 68HC908EY
Figure 3-6. 68HC908EY Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTA1, PORTB3, PORTB4, and PORTB5 are used for entering monitor
mode. By default the user may bring these signals out to the MON08
connector.
Alternatively, the user may pull up PORTB4, pull down PORTA1 and
PORTB3, and pull up/down PORTB5 for clock division, in which case these
signals do not need to be connected to the MON08 connector.
3.5.7 68HC908GP
Figure 3-7. 68HC908GP Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTA7, PORTC0, PORTC1, and PORTC3 are used for entering monitor
mode. By default the user may bring these signals out to the MON08
connector.
Alternatively, the user may pull up PORTC0 and pull down PORTA7,
PORTC1, and pull up/down PORTC3 for clock division. In which case these
signals do not need to be connected to the MON08 connector.

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3.5.8 68HC908GR
Figure 3-8. 68HC908GR Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTA1, PORTB0, and PORTB1 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTB0 and pull down PORTA1, and
PORTB1. In which case these signals do not need to be connected to the
MON08 connector. The clock division is fixed Div 4.
3.5.9 68HC908JB
Figure 3-9. 68HC908JB Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTA1, PORTA2, and PORTA3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTA1 and pull down PORTA2, and pull
up/down PORTA3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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3.5.10 68HC908JK
Figure 3-10. 68HC908JK Family MON08 Pinout
As shown in the figure, the PORTB0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTB1, PORTB2, and PORTB3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTB1 and pull down PORTB2, and pull
up/down PORTB3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.
3.5.11 68HC908JL
Figure 3-11. 68HC908JL Family MON08 Pinout
As shown in the figure, the PORTB0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTB1, PORTB2, and PORTB3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTB1 and pull down PORTB2, and pull
up/down PORTB3 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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3.5.12 68HC908KX
Figure 3-12. 68HC908KX Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTA1, PORTB0, and PORTB1 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTB0 and pull down PORTA1, and
PORTB1. In which case these signals do not need to be connected to the
MON08 connector. The clock division is fixed Div 4.
3.5.13 68HC908LD
Figure 3-13. 68HC908LD Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTA7, PORTC0, PORTC1, and PORTC3 are used for entering monitor
mode. By default the user may bring these signals out to the MON08
connector.
Alternatively, the user may pull up PORTC0 and pull down PORTA7,
PORTC1, and pull up/down PORTC3 for clock division. In which case these
signals do not need to be connected to the MON08 connector.

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3.5.14 68HC908MR
Figure 3-14. 68HC908MR Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 8, acting as the communications line. The user
should pull this line up to target VDD.
PORTC2, PORTC3, and PORTC4 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTC3 and pull down PORTC4, and pull
up/down PORTC2 for clock division. In this case these signals do not need to
be connected to the MON08 connector.
3.5.15 68HC908RK
Figure 3-15. 68HC908RK Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTB0, PORTB1, and PORTB3 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTB0 and pull down PORTB1, and pull
up/down PORTB3 for clock division. In case these signals do not need to be
connected to the MON08 connector.

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3.5.16 68HC908SR
Figure 3-16. 68HC908SR Family MON08 Pinout
As shown in the figure, the PORTA0 from the target processor is connected to
the MON08 connector Pin 10, acting as the communications line. The user
should pull this line up to target VDD.
PORTA2, PORTA1, and PORTC1 are used for entering monitor mode. By
default the user may bring these signals out to the MON08 connector.
Alternatively, the user may pull up PORTA1 and pull down PORTA2, and pull
up/down PORTC1 for clock division. In which case these signals do not need
to be connected to the MON08 connector.

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