Pioneer SPEC-2 User manual

STEREO POWER
AMPLIFIER
SPEGI?,
KCU
(DrrroNEER'

1.
2.
3.
4.
CONTENTS
SPEC|F|CAT|ONS
..... 3
FRONT
PANELFACILITIES ... ... .. 4
CoNNECTION
DIAGRAM .. ....... 5
CIRCUIT
DESCRIPTION
4.1 Power
Amplifier 6
4.2 PeakLevelMeterCircuit 7
4.3 ProtectionCircuit , 8
4.4 SurgeCurrent
Suppressor
Circuit. '........ 10
BLOCK
DIAGRAM... ...... 11
ADJUSTING
PROCEDURES
6.1 ldleCurrentAdiustment ....'... 13
6.2 Current LimiterSensitivity
Adiustment . . . . 14
6.3 MeterAmplifier
Adjustment ...... 15
D|SASSEMBLY ... .. . 16
PARTSLOCATTONS ........ 20
5.
6.
7.
8.
9.
10.
EXPLODED
VIEWS
SCHEMATIC
DIAGRAMS,
P.C.BOARD
PATTERNSAND
PARTSLIST
10.1 Schematic
Diagram
andMiscellaneous
Parts.. ....... 30
10.2 Power Supply
CircuitAssembly
(AWR-093) .... '... 33
10.3 PowerAmplifierAssembly
(AWH-045) .. -. '. 37
10.4 MeterAmplifierAssembly
(AWM-0811 . . ' ' 42
11. PACKING ...... ... 47
12. PARTSLISTOFEXPLODEDVIEWS. .........48
23

EiPEC.E
1.SPECIFICAT|ONS
Semiconductors
Transistors ...........55
Diodes.. ...........75
PowerAmplifier
Circuitry
. ....... CascadeddifferentialAmplifier,
Push-pulldrive,Triple
push-pull,
directcoupledOCL.
Continuous
Power
Outout
from 20 Hertzto 20,000Hertz
(Both
channels
driven). . . . . . 250
watts
per
channel
(g
ohms)
Total HarmonicDistortion at20 Hertzto 20.000Hertz
(Continuous
rated
power
output) o.1%
(125
watts
per
channel
power
output,8
ohms)
.
........O.O5%
(1
watt
per
channel
poweroutput,8
ohms). . . . . . . , . . .0.Q5o/o
lntermodulationDistortion
(Continuous
rated'power
output) ......... - O."lo/o
(125
watts
per
channel
power
output,Sohms).. .. -....0.05%
(1
watt
per
channel
power
output,
8ohms)
. . . .O.O5%
FrequencyResponse
. 5Hertzto80,000HertzlldB
Input
(Sensitivity/lmpedance)
. . . . . . .2Vl50kohms
Output
Speaker.. . 4ohmstoSohms
Damping
Factor
(20
Hertzto20,000Hertz,
Sohms)...,... 50
Hum
and
Noise
(lHF,
short-circuited,
A network). . . . . . .110d8
Miscellaneous
PowerRequirements . . AC120V60 Hertz
Power
Consumotion. . . .. . .,.. 500watts
Dimensions ......480(W)x186.5(H)x445(D)mm
19-5/16x7x13-3116in
Weight:
WithoutPackage
.
FurnishedParts 24.3kg;
54lb
ConnectionCordwith PinPlugs
Operatinglnstuctions
NOTE:
Specificdtiotrt and the design subject to possible mod,fication
without notice
due to improuements.

2. FRONTPANEL
FACILITIES
PEAKLEVEL
METERS
When
speaker
systemsof 8O nominalimpedance
arecon-
nected,these
provide
directreadout
of theoutput
power
in Watts.
NOTE:
Speohersyotemimpedanceuaries
occording
tofrequency.
To obtoin o preciae
medsurcment
of the output poue\
remoueSpedhercon\ectiotrs ond connect 8a dumtuy
loodsocro4ithe SPEAKERS
termindls-
POWER
SWI CH
S'etto ON to energize
the SPEC-2.Output will not be
obtaineduntilthePRoTEcTIoN indicatorlamp
Soes
out.
Thiseffect
isdueto theinternalmuting
circuitanddoes
notindicate
malfunction.
METER
ZEROPOINT
ADJUSTMENT
PROTECTIONINDICATOR
The lamp lightswhen the protection
circuit functions.
lf the lamp stayson during operation, turn off the
POWER
switch and checkas described in the section
"Protection Circuit Operation".After identifyingand
correctingthe sourceof difficulty, if the lampstillfails
to extinguish,contact a Pioneer Authorized Service
Center,
INPUT
LEVELCONTROLS
(LEFT
& RIGHT)
Adjust LEFT and RIGHT controls according
to the
output level
(voltage)
of the pre-amplifier
connectedto
the SPEC-2INPUT (L & R) jacks.
Control positions
correspondto 2V at MAX (fully clockwise),4V atcenter
of rotation, and d at MIN (fully counter-ciockwise)
Normally
setthesecontrols
to MAX (2V).
. lf the minimumoutput voltage
of theemployed
pre-
amplifier
doesnot reach2V. setthecontrolsto MAX
(2V). In thiscasetheeffectiveoutput indicatedinthe
specificationswill not be obtained
(for example
1/4
of the specified
output can be attained
with a pre-
amplifier
outputvoltage
of 1V).

sPEC-e
3. CONNECTION DIAGRAM
STEREO
TURNTABLE TAPEDECK
-i . , 1 I , r ,
'\..,,
; rl tO C i O q1 o
STEREO
PRE-AMPLIFIER
(e.s.
Pioneer
SPEC-1)
SPEAKERS IMPEDANCE swilch
S€t to malch the nominal imDed-
ance of the spoaker syst€ms em-
ployed with the SPEC-2. Be sure
to turn otf the po!!€r before
chenging
thisswitch setting.
For about 6 to 12 seconds 6tter
changing the position o{ the
IMPEDANCE swirch the PRO-
TECTION lamp lights and sound
is not obtained from the speaksr
systems. This is du6 to the built-
in muting circuit,
RIGHT
CHANNEL LEFTCHANNEL
SPEAKER
SYSTEMS

4. CIRCUITDESCRIPTION
4.1 POWER
AMPLIFIER
The SPEC-2
is a high power design,employing a
cascodeddifferential amplifier first stage, push-pull
drive, and darlington triple push-pull circuit with
all stages direct coupled (OCL).
The circuit diagram is shown in Fig. 2. Q1 and Q2
form the differntial amplifier. The input signal is
applied to Q1 and NFB from the output stage
applied to Q2 base.These two transistors are con-
nected in common basecircuits with Q3 and Q4,
forming a cascodeamplifier. Since the common
emitter circuit (Q1 & Q2) load becomesthe input
of the following common basecircuit stage,
load
impedance is low and stable amplification can be
achieved.
Q3 and Q4 outputs drive Q5 and Q6 in opposite
phase. The Qb output via Q7 is applied to the
current mirror circuit formed by D2 and Q8, where
the phase is again inverted. Q6 and Q8 outputs
thus becomesignals
of the same
phaseand perform
apre-driver function.
The cunent mirror circuit is depicted in Fig. 1.
Current flowing through R2 and Q8 becomes
equal
to that flowing through Rl andD2. In other words,
since R1 and R2 are equal, and the characteristics
of. D2 and Q8 base-emitter are also equal, the
current +BL reachingpoint A (in Fig. 1) through
R1 and D2 is equal to that reaching the samepoint
through R2 and Q8 base-emitter.This becomes
equivalent to having Q5 output directly driving
Q8.
IIIPUTH
By adopting this current mirror circuit, when
muting relay RLb is OFF Q8 iscut off, Q10 - Q20
are switched OFF in succession, and operation
stops. The reversed phases of Q8 and Q6 outputs
cause them to cancel each other, reducing pop
noise and muting relay switching noise.
Q13 and Q14 in the following driver stage drive
the power transistors by direct coupling. The final
stage is a high output design with three power
transistors for each channel coupled in parallel.
This parallel coupling permits comparatively large
current (Ic) to be employed through each tran-
sistor, plus selection of an operating point with
good linearity and high amplification (hfe).
+Bl
ll:t2
- llrirel
€
Fig.
1 Current
Mirror
Circuit
tu
Fig.
2 Power Amplifier
Circuit

CurrentLimiter Circuit
The current limiter circuit, shown in Fig. 2, consists
of Q9 - qLz. If an overcurrent flows in the power
transistors,
due to low load (less
than 4S2) or load
shorting, this circuit utilizes the voltage drop
produced in the power transistor emitter resistance
to limit the input voltage. Q9 - Q12 are normally
OFF, but if for some rea.son
an overcurrent occurs
in the power transistors, the voltage drop compo-
nent of the power transistor emitter resistance
increases.This voltage is divided and used to bias
the bases of Q9 and Q11, switching them ON.
Q9 and Ql1 make Q10 and Q12 conductive,
limiting the signal voltages applied to the basisof
Q13 and Q14.
VR2 and VR3 in this circuit set the current limit-
ing value, while TH1 and TH2 arefor temperature
compensation. RLG is a selector switch for chang-
ing the current limiting value at 4O load.
4.2 PEAK LEVEL METER
CIRCUIT
Logarithmic indication is required in order to
provide a broad indicating range in a single meter,
without the need for range selection by the user.
With respect to an 8O load, approximately 50dB
logarithmic compression is performed to allow
meter indication in the range
of 0.01 - 500W.
As shown in Fig. 3, the circuit is divided into
positive and negative sides. Each side consists of
logarithmic compression, peak value holding and
voltage to current converter circuits. In addition
there is a cunent resultant circuits, common to
both sides. The positive side circuit operation is
describedhere.
SPEC-p
A portion of the pov/er amplifier output signal is
compressed
by the logarithmic compression circuit,
which utilizes the exponential function properties
of diodes. Figs. 4 and 5 illustrate the operating
principle and input-output response. The com-
pressed signal is then rectified and retained for a
suitable length of time by the peak holding circuit,
which employs a simple diode and capacitor con-
struction. Holding time is determined by ttre time
constantof C1 and R1.
The holding circuit voltage is then applied to the
voltage-current converter, where it is converted
into a current value and amplified. The current
afterwards passes through the current resultant
circuit and drives the meter.
The current resultant circuit applies the larger
current of the positive and negative sides to the
.meterfor operation.
Fig.
4 Equivalent
Circuitof theLogarithmicCompression
lCinput
voltage
Fig.
5 Input-outputResponse
I\ f
EL
+ Inprtvoltagc(lC)
o
E
o
e
I
Yoltage
current
Conve
rter
e
4
=
e
e
€
o
E
PostTtvt
stDE
logarithmic
comp
ress
ion
Peak
ralue
holding
7
It0lltvt
st0t
Fig.
3 Peak LevelMeter
Circuit
- Positive
peak
current
--'llegatiYe
peal
current

4.3 PROTECTION
CIRCUIT
The main purpose of the protection circuit is to
protect the equipment and give an indication in
the event of malfunction, incorrect operation,
faulty connections,
or other causes.
The block diagram of the protection circuit func-
tions is shown in Fig. 6. The following description
is in referenceto the dia$am.
Relayand LampDrivers
q27 - Q30 form the relay drive circuit (see
Fig.7).
while Q31 drives the lamp. In normal operation,
reversebias is applied to Q27, maintaining it in
the cut off state. When an abnormality is detected
by the DC balanceor temperature detector, current
flows through R1. Q27 base
potential falls rapidly
and it switches ON. This causes forward bias
voltage to be applied to Q28, turning Q28 ON.
Potential at point B drops, turning off Q29 and
Q30. With Q29 OFF, current to relay RL5 is cut
off, tuming Q31 (lamp drive) ON and lighting the
protection lamp. Q30 cuts off the current to RL4
and RL2 (when impedanceswitch is at 8Q; when
at 4Q, RL4, RL6 and RL3).
Becauseof RL4 off, output circuit of the power
amplifier becomesopen,and the stagesbeyond the
predriver are stopped operation completely by
RL5.
RL2, RLg and RL6 are for changing the trans-
former secondary taps when the impedance switch
is selectedand determining the value of the current
control circuit in the power amplifier. They are
thus not directly related to the protectiorr func-
tion.
Zener diodes D2 and DB fix the operating poten-
tials of Q29 and Q30, and the difference in their
starting points prevent misoperation.
Power
SwitchON Muting
This circuit also includes a delaying function when
the power switch is set to ON. The delay time is
determined by R8 and C1 in the Q29 and Q30
basecircuits.
Immediately after the power switch is turned ON,
Q27 andQ28 are reversebiasedby -B1 and -B2,
and switched OFF. Point B potential from'+B3
passesthrough R8 and rises as Cl charges. The
rise time is determined by the time constant of
C1 and R8. When the potential exceeds D3
(zener diode) zener voltage, Q30 is switched ON
and current flows in the relay circuit connected
to Q30.
In the samemanner, when the potential at point
B exceeds
D2 zenervoltage, Q29 is switched ON
and current flows in RL5. Correct voltage is thus
applied to the power amplifier.
Fig.
6 Block
Diagramof the
Protection
Circuit

Power
SwitchOFF Muting
Since +B3 normally passes
from R7 to R6 and
flows to -B.2, Q28 base is maintained at cut off
potential. When the power switch is tumed OFF,
-B2 immediately ceases,sinceits time constant is
smaller than +83. Consequently, +83 passes
through Dl and is applied to Q28 base,tuming
Q28 ON. Point B potential then falls rapidly,
tuming Q27andQ30OFF.
lmpedance
SelectorMuting
When the impedance selector switch (S1) is
changed from 8Sl to 4Sl, uncharged capacitor C2
is introduced into the - 82 circuit, temporarily
reducing -B2 voltage. This causes
Q28 to switch
ON, C1 to be discharged,
and Q29 & Q30 to be
switchedOFF.
SPEG.El
Although Q28 switches OFF again,
Q29 and Q30
continue in the OFF condition for severalseconds
while C1 is charging.
TemperatureDetector
The temperature detector employs positive coeffi-
cient thermistors (posistors). Thesearetemperature
sensitiveelements possessing a positive temperature
response, rapidly increasing in resistance when a
certain temperature is exceeded(see
Figs. 8 & 9).
The posistors (TH3 & TH4) are mounted on the
power transistor. If some abnormality increa.ses
the temperature to the posistor operating point,
their resistance rapidly increases, reducing the
potential at point C. This allows DB to conduct,
so that the potential at point D drops and Q27
switches ON.
q
4
o
,2
o
4Apoint
-Tem0erature
t ("
Fig.8 Posistor-temperature
Response
Fig.
9 TemperatureDetectorCircuit

DC Balance Detector
Q25 and Q26 make up a differential amplifier,
as shown in Fig. 10. The inputs (bases) of these
transistors are connected to the left and right
power amplifier. If for some reason the DC
balance of the power stage is upset, a potential
difference arisesin the differential amplifier input
signal,unbalancing q25 and Q26 collector currents.
When one of the collector potentials becomes
lower than Q27 basepotential, this basepotential
is dissipated through D1 or D2, q27 switches ON,
and relay and lamp drives operate.
r- -----
i itcll
r--------J I
I
I
L- --:E---..i
Fig.
10 DCBalanceDetectorCircuit
4.4 SURGE
CURRENTSUPPRESSOR
CIRCUITS
A toroidal core power transformer is used in the
SPEG2, which while possessing
compactnessand
a large handling capacity, also exhibits extremely
low intemal resistance. In combination with the
four 15,000pF electrolytic capacitorsforming the
power supply, surge current accompanying power
switch operation can reach a maximum of 3004.
The power supply can therefore be damagedunless
protective measures
aretaken.
The main sources of surge current generation are
power transformer excitation current and power
supply electrolytic capacitor charging current.
Two surgesuppressor circuits are employed in the
SPEC-2, one each in the primary and secondary
power transformer circuits. These circuits are
shownin Fig. 11.
Power transformer excitation current is handled
by the relay surge suppressor circuit at the
primary side. When the power switch is turned
ON, the current passes through R2 & D1 and
chargesC1, therefore it does not flow through the
relay drive coil immediately, and RLl remains
OFF. The transformer excitation current flows
through R1 during this interval. After. C1 is
completely charged, current flows in the RL1
+83 drive coil switching it ON, and R1 is shorted.
The surge suppressor circuit in the
secondary side of the power trans-
former is designed to handle the
electrolytic capacitor charging cur-
rent. When the power switch is
turned ON, RL2 and RLB remain
OFF due to protection circuit op-
eration. Consequently, the current
passesthrough R3 and R4, gradu-
ally charging the electrolytic capaci-
tors through a bridge type rectifier
circuit. RL2 or RLB is switched ON
when charging has beencompleted,
gving the normal operating mode.
By employing these circuits, surge
current is limited to approximately
40 A.
tlectrolytic
capacitor
Poror
amplilicr
+Bl
+
tlectrolytic
catac
ito
t
Relay
and
lanp
drivors
10
Fig.
11 SurgeCurrent
SuppressorCircuit
-Bl

5.BLOCK
DIAGRAM
POWER
AMPLIFIER
LEFT I
TNPUT I
etl
u*,il-
Li
_
-- --_\
Qlr I
PROTECTIOI
LANP
PROTECTION
CIRCUIT t
RIGHT
INPUT
@-9_l : l--- -----r
u*tf*l RIGHTCHANNEL
powER
AMPLTFTER
(same as Lelt, cirannel,,) I
ll
Irl
LE--
'l
tl
44

sPEC-e
t-
OUTPUT
METER
ANPLIFIER
t-- -
aRrcHT
CHANNELMETER
AllPLtFtER
!
| (Sarne
as Left, channeL)
AC LINE
SWITCHES
:
Sr : P0WER0N*_0EF
Sz . SPEAKER
I|'lPEDANCE
8.0* 4Q,
POTENTIOMETERS
:
VRr
: LEFTLEVELC0NTR0L
VR2:RIGHT
LEVELC0I{TR0L
RELAYS
;
RL1:
PRIMARY
SURGE
CURRENT
CONTROL
RL2,RLs
: SECSNDARY
SURGE
CURRENT
CONTROLANDVOLTAGE
SELECTOR
RLn:
P0WER
SUPPLY
CUT_OFF
RELAY
RL5:
MUTING
RELAY
Rh' CURRENTLIM{TER
SENSITIVITY
CONTROL
PEAK LEVEL
METE
R
LEFT
1
TPUT
@+
RIGH
6\-
+
\I
PEAK
LEVEL
METER
t<

6.
ADJUSTINGPROCEDURES
Since the sameconfiguration is used for both left
and right channels of the SPEC-2power amplifier
assembly,the following adjustments apply to both
channels.
6.1
1)
2)
IDLE CURRENT ADJUSTMENT
Connectas
shownin Fig. 12.
Set LEFT LEVEL and RIGHT LEVEL con-
trols on the front panel to minimum (fully
counter-clockwise).
Set POWER switch to ON. After I or 2
minutes adjust VR1 to give an indication of
30mV on the voltmeter.
After the po\Mer
hasbeenON for 30 minutes,
readjust VRl for 30mV indication on the
voltmeter.
3)
4)
Power
amplifier
assembly
13
Fig.12 Connection Diagram
for ldle
Current
Adjustment

6.2 CURRENT
LIMITER
SENSITIVITY
ADJUSTMENT
Note:
The high output power of the SPEC-2 requires a
dummy load of 4O and more than 200W. If a
200W dummy load is not available,connect two
8S},
100Wloadsin parallel.
Connectasshownin Fig. 14.
Set SPEC-2impedance selector switch to 8O
(even
though a4O dummy load is used).
While the voltmeter indicated 30V/(40 ), adjust
VR2 to just distorted point the upper half of
the waveform.
In the same manner, adjust VR3 to just dis-
torted point the lower half with 28.3V/(44).
Waveform
1)
2)
3)
VR3
Voltmeter Osilloscope
ooo
AF signal generator
Fig.
13 ThePosition
ofVR2
andVR3
/|
ilPur
la
Fig.
14 Connection
Diagramfor CurrentLimiter
Sensitivity
Adjustment

6.3
1)
2)
3)
METER
AMPLIFIER
ADJUSTMENT
Connectasshown in Fig. 16.
Adjust input level to give an indication of
44.7V on the voltmeter.
At this time, adjust VR1 (left channel; VR2
is for right channel)for OdB
(250W) indication
on the LEVEL meter.
SPEG.E!
VR2
The
Positionof VR1
VRl
and
VR2
Fis.15
SPEC-2
r INPUT
IA
R
AF.
S
aatt\
'J-'
Meter
amplifierassembly
Voltmeter
RIGHT .----.
Fig.
16 ConnectionDiagramfor Meter
AmplifierAdjustment
15

7. DISASSEMBLY
1. Removingthe Top Cover
Remove t],:.e L2 screws(A) to detach the top
cover.
2. RemovingtheBottomPlate
Remove
the
13screws
(B)
to detachthebottom
plate.
(A)
Y
(A)
9
(A)
E
@
A)
I
g
,a/-*rutez&tt"-..^ -\
""*€:
?soo
i "€a*... (A) ToP cover
-.
n *""'-€(A,
.--
""",:'i,*u*

sPEC-e
3. Removingthe Front Panel
(1) Remove all control knobs by pulling them
out.
(2) Remove the LEFT LEVEL and RIGHT
LEVEL shaftnuts andwashers.
(3) Removethe 4 screws (C) on eachside of the
main body. The front panel is ready for
removal.
Front
panel
Main
body
)
,/.
'--=- 7
-..----
.-'-
j @(c)
Washer
17

4. Removingthe MeterAmplifier Assembly
(1) Remove
the top cover,bottom plate and front
panel.
(2) Unscrewthe 4 screws
(D). Remove the panel
stay.
(3) Unscrew the 4 screws(E) which mount the
printed circuit board on peaklevelmeter.
This allows the printed circuit board to be
moved, though the distanceis limited by the
length of lts lead wire.
Meteramplifierassembly
Panel
stay

SFEC.A
5. Removing
the PowerAmplifier Assembly
(1) Remove
the top coverand bottom plate.
(2) Unscrew the 4 screws(F) which mount the
power amplifier assemblyon the rear panel.
(3) Unscrew the 4 screws(G) which mount the
printed circuit board on the heat sink.
Printed
circuitboard
Heatsink
19

8. PARTS LOCATIONS
1.TopView Power
amplifier
assembly
{RIGHTCHANNEL)
AWH-045
Power
supply
circuit
assembly
AWR.093 Electrolyticcapacitor
r5,00&F
100v
ACH-052
Power
amplitier
assembly
(LEFT
CHANNEL}
AWH-045
Power
transformer
ArT-245 Meter
amplifier
assembly
AWM.081
Oiode
KBH2504