PTC PT6315 User manual

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 1 Sep. 2002
DESCRIPTION
PT6315 is a Vacuum Fluorescent Display (VFD) Controller driven on a 1/4 to 1/12 duty factor. Sixteen
segment output lines, 4 grid output lines, 8 segment/grid output drive lines, one display memory, control circuit,
key scan circuit are all incorporated into a single chip to build a highly reliable peripheral device for a single chip
micro computer. Serial data is fed to PT6315 via a three-line serial interface. It is housed in a 44-pin, SSOP
and LQFP Package.
FEATURES
•CMOS Technology
•Low Power Consumption
•Key Scanning (16 x 2 matrix)
•Multiple Display Modes: (16 segments, 12 digits to 24 segments, 4 digits)
•8-Step Dimming Circuitry
•LED Ports Provided (4 channels, 20 mA max.)
•Serial Interface for Clock, Data Input, Data Output, Strobe Pins
•No External Resistors Needed for Driver Outputs
•Available in 44-pin, SSOP and LQFP Package
APPLICATION
•Microcomputer Peripheral Device

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 2 Sep. 2002
BLOCK DIAGRAM
Figure 1: PT6315 Internal Block Diagram
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
SG5/KS5
SG6/KS6
SG7/KS7
SG8/KS8
SG9/KS9
SG10/KS10
SG11/KS11
SG12/KS12
SG13/KS13
SG14/KS14
SG15/KS15
SG16/KS16
SG21/GR8
SG22/GR7
SG23/GR6
SG24/GR5
24 12

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 3 Sep. 2002
PIN CONFIGURATION 44PIN LQFP
Figure 2: PT6315 LQFP Pin Configuration
SG24/GR5 SG23/GR6 SG22/GR7 SG21/GR8 SG20/GR9
LED1
LED2
LED3
LED4
OSC
DOUT
DIN
CLK
STB
K1
K2
SG19/GR10
SG18/GR11
SG17/GR12
VEE
SG16/KS16
SG15/KS15
SG14/KS14
SG13/KS13
SG12/KS12
SG11/KS11
SG10/KS10
VSS
VDD
SG1/KS1 SG2/KS2 SG3/KS3 SG4/KS4 SG5/KS5 SG6/KS6 SG7/KS7 SG8/KS8 SG9/KS9
VSS
VDD
GR1 GR2 GR3 GR4

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 4 Sep. 2002
PIN CONFIGURATION 44PIN SSOP
Figure 3: PT6315 SSOP Pin Configuration
38
37
36
35
34
33
32
31
30
29
7
8
9
10
11
12
13
14
15
16
LED1
LED2
LED3
LED4
OSC
DOUT
DIN
CLK
STB
K1
SG18/GR11
SG17/GR12
VEE
SG16/KS16
SG15/KS15
SG14/KS14
SG13/KS13
SG12/KS12
SG11/KS11
SG10/KS10
22
21
20
19
18
17
23
24
25
26
27
28
K2
VSS
VDD
SG1/KS1
SG2/KS2
SG3/KS3
SG4/KS4
SG5/KS5
SG6/KS6
SG7/KS7
SG8/KS8
SG9/KS9
1
2
3
4
5
6
44
43
42
41
40
39
VSS
VDD
GR1
GR2
GR3
GR4
SG24/GR5
SG23/GR6
SG22/GR7
SG21/GR8
SG20/GR9
SG19/GR10

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 5 Sep. 2002
PIN DESCRIPTION
Pin Name I/O Description Pin No.
LED1 to LED4 OLED Output Pin 1 to 4
OSC IOscillator Input Pin A resistor is connected to this pin to
determine the oscillation frequency 5
DOUT O
Data Output Pin (N-Channel, Open-Drain)
This pin outputs serial data at the falling
edge of the shift clock (starting from the
lower bit).
6
DIN
(Schmitt Trigger) I
Data Input Pin
This pin inputs serial data at the rising edge
of the shift clock (starting from the lower
bit)
7
CLK
(Schmitt Trigger) IClock Input Pin
This pin reads serial data at the rising edge
and outputs data at the falling edge. 8
STB
(Schmitt Trigger) I
Serial Interface Strobe Pin
The data input after the STB has fallen is
processed as a command.
When this pin is "HIGH", CLK is ignored.
9
K1 to K2 IKey Data Input Pins The data inputted to these pins are latched
at the end of the display cycle. 10 ,11
VSS -Logic Ground Pin 12,44
VDD -Logic Power Supply 13,43
SG1/KS1 to SG16/KS16 OHigh-Voltage Segment Output Pins
Also acts as the Key Source 14 to 29
VEE -Pull-Down Level 30
SG17/GR12 to SG24/GR5 OHigh Voltage Segment/Grid Output Pins 31 to
38
GR4 to GR1 OHigh-Voltage Grid Output Pins 39 to
42

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 6 Sep. 2002
FUNCTIONAL DESCRIPTION
Commands
Commands determine the display mode and status of PT6315. A command is the first byte (b0 to b7) inputted
to PT6315 via the DIN Pin after STB Pin has changed from “HIGH” to “LOW” State. If for some reason
the STB Pin is set to “HIGH” while data or commands are being transmitted, the serial communication is
initialized, and the data/commands being transmitted are considered invalid.
COMMAND 1: DISPLAYMODE SETTINGCOMMANDS
PT6315 provides 8 display mode settings as shown in the diagram below: As stated earlier a
command is the first one byte (b0 to b7) transmitted to PT6315 via the DIN Pin when STB is
“LOW”. However, for these commands, the bits 5 to 6 (b4 to b5) are ignored, bits 7 & 8 (b6 to
b7) are given a value of “0”.
The Display Mode Setting Commands determine the number of segments and grids to be used
(1/4 to 1/12 duty, 16 to 24 segments). When these commands are executed, the display is
forcibly turned off, the key scanning stops. A display command “ON” must be executed in order
to resume display. If the same mode setting is selected, no command execution is take place,
therefore, nothing happens.
When Power is turned “ON”, the 12-digit , 16-segment modes is selected.
Figure 3: Display Mode Settings
0 0 - - b3 b2 b1 b0
MSB
LSB
Display Mode Settings:
0000 : 4 digits, 24 segments
0001: 5 digits, 23 segments
0010: 6 digits,22 segments
0011: 7 digits, 21 segments
0100: 8 digits, 20 segments
0101: 9 digits, 19 segments
0110: 10 digits, 18 segments
0111: 11 digits, 17 segments
1XXX: 12 digits, 16 segments
Not Relevant

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 7 Sep. 2002
Display Mode and RAM Address
Data transmitted from an external device to PT6315 via the serial interface are stored in the
Display RAM and are assigned addresses. The RAM Addresses of PT6315 are given below in 8
bits unit.
SG1 SG4 SG5 SG8 SG9 SG12 SG13 SG16 SG17 SG20 SG21 SG24
Figure 4: PT6315 RAM Address
DIG1
DIG2
DIG3
DIG4
DIG5
DIG6
DIG7
DIG8
DIG9
DIG10
DIG11
DIG12
xxHL xxHU
b0 b3 b4 b7
Lower 4 bits Higher 4 bits
00HL00HU01HL01HU02HL02HU
03HL03HU04HL04HU05HL05HU
06HL06HU07HL07HU08HL08HU
09HL09HU0AHL0AHU0BHL0BHU
0CHL0CHU0DHL0DHU0EHL0EHU
0FHL0FHU10HL10HU11HL11HU
12HL12HU13HL13HU14HL14HU
15HL15HU16HL16HU17HL17HU
18HL18HU19HL19HU1AHL1AHU
1BHL1BHU1CHL1CHU1DHL1DHU
1EHL1EHU1FHL1FHU20HL20HU
21HL21HU22HL22HU23HL23HU

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 8 Sep. 2002
COMMAND 2: DATASETTINGCOMMANDS
The Data Setting Commands executes the Data Write or Data Read Modes for PT6315. The data
Setting Command, the bits 5 and 6 (b4, b5) are ignored, bit 7 (b6) is given the value of “1” while
bit 8 (b7) is given the value of “0”. Please refer to the diagram below.
When power is turned ON, the bit 4 to bit 1 (b3 to b0) are given the value of “0”.
Figure 5: Data Settings
Don't Care

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 9 Sep. 2002
PT6315 Key Matrix & Key Input Data Storage RAM
PT6315 Key Matrix consists of 16 x 2 array as shown below:
Figure 6: PT6315 Key Matrix
Each data inputted by each key are stored as follows. They are read by a READ Command, starting
from the last significant bit. When the most significant bit of the data (SG1, b0) has been read, the least
significant bit of the next data (SG16, b7) is read.
Figure 7: PT6315 Key Input Data Storage
K1
K2
SG1/KS1
SG2/KS2 SG3/KS3 SG4/KS4 SG5/KS5 SG6/KS6 SG7/KS7 SG8/KS8 SG9/KS9
SG10/KS10 SG11/KS11 SG12/KS12
SG13/KS13
K1 ........... K2 K1 ............... K2
K1 ........... K2 K1 ............... K2
SG1/KS1
SG5/KS5
SG9/KS9
SG11/KS11
SG3/KS3
SG7/KS7
SG11/KS11
SG15/KS15
SG2/KS2
SG6/KS6
SG10/KS10
SG14/KS14
SG4/KS4
SG8/KS8
SG12/KS12
SG16/KS16
READING
SEQUENCE
b0 ............b1

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 10 Sep. 2002
LED Display
PT6315 provides 4 LED Display Terminals, namely LED1 to LED4. Data is written to the LED
Port starting from the least significant bit (b0) of the port using a WRITE Command. Each bit
starting from the least significant (b0) activates a specific LED Display Terminal -- b0
corresponds LED1 Display, b1 activates LED2 and so forth. Since there are only 4 LED display
terminals, bits 5 to 8 (b4 ~ b7) are not used and therefore ignored. This means that b4 to b7
does NOT in anyway activate any LED Display, they are totally ignored.
When a bit (b0 ~ b3) in the LED Port is “1”, the corresponding LED is OFF. Conversely, when
the bit is “0”, the LED Display is turned ON. For example, Bit 1 (as designated by b0) has the
value of “1”, then this means that LED1 is OFF. It must be noted that when power is turned
ON, bit 1 to bit 4 (bo to b3) are given the value of “0” (all LEDs are turned ON). Please
refer to the diagrams below.
Figure 8: PT6315 LED Display Designation
MSB
LSB
-b3 b2 b1 b0
--
-
NOT USED
LED1
LED2
LED3
LED4

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 11 Sep. 2002
COMMAND 3: ADDRESS SETTINGCOMMANDS
Address Setting Commands are used to set the address of the display memory. The address is
considered valid if it has a value of “00H” to “23H”. If the address is set to 24H or higher, the
data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”.
Please refer to the diagram below.
Figure 10: Address Settings
MSB
LSB
b4 b3 b2 b1 b0
1
1
b5
Address: 00H to 23H

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 12 Sep. 2002
COMMAND 4: DISPLAYCONTROLCOMMANDS
The Display Control Commands are used to turn ON or OFF a display. It also used to set the pulse
width. Please refer to the diagram below. When the power is turned ON, a 1/16 pulse width is
selected and the displayed is turned OFF (the key scanning is stopped).
Figure 11: Display Control Settings

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 13 Sep. 2002
SCANNING AND DISPLAYTIMING
The Key Scanning and display timing diagram is given below. One cycle of key scanning consists of 2 frames.
The data of the 16 x 2 matrix is stored in the RAM.
Internal Operating Frequency (fosc) = 224/T
Figure 12: PT6315 Scanning & Display Timing Diagram
1 2 8
9 10 16
SGn
G1
G2
G3
T=500us
DISPLAY
Key Scan Data
Gn
1 Frame=Tx (n +1) DISPLAY
T
Note: T is the width of Segment only

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 14 Sep. 2002
SERIAL COMMUNICATION FORMAT
The following diagram shows the PT6315 serial communication format. The DOUT Pin is an N-channel, open-
drain output pin, therefore, it is highly recommended that an external pull-up resistor (1 KOhms to 10 KOhms)
must be connected to DOUT.
Figure 13: PT6315 Serial Communication Format
where: twait (waiting time) >1us
It must be noted that when the data is read, the waiting time (twait) between the rising of the eighth clock that has
set the command and the falling of the first clock that has read the data is greater or equal to 1µs.
b0
b1
b2
b3
b4
b5

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 15 Sep. 2002
SWITCHING CHARACTERISTIC WAVEFORM
PT6315 Switching Characteristics Waveform is given below.
where: PWCLK (Clock Pulse Width)>400ns PW STB (Strobe Pulse Width)>1us
t setup (Data Setup Time) >100ns thold (Data Hold Time)>100ns
tCLK-STB (Clock - Strobe Time)>1us tTHZ (Fall Time)<150us
tTZH2 (Grid Rise Time)<0.5us (at VDD=5V) tPZL (Propagation Delay Time)<100ns
tTZH2 (Grid Rise Time)<1.0us (at VDD=3.3V) tPLZ (Propagation Delay Time)<400ns
tTZH1 (Segment Rise Time)<2.0us (at VDD=5V) fosc = Oscillation Frequency
tTZH1 (Segment Rise Time)<3.0us (at VDD=3.3V)
Figure 14: PT6315 Switching Characteristic Waveform

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 16 Sep. 2002
APPLICATIONS
Display memory are updated by incrementing addresses. Please refer to the following diagram.
Figure 15: Display Memory Updated by Address Increments
The following diagram shows the waveforms when updating specific addresses.
Figure 16: Address Update
3
3
3
Data Setting Command
Address Setting Command
where: Command 1: Display Mode Setting Command
Command 2: Data Setting Command
Command 3: Address Setting Command
Data 1 to n : Transfer Display Data (36 Bytes max.)
Command 4: Display Control Command

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 17 Sep. 2002
RECOMMENDED SOFTWARE FLOWCHART
Note: 1. Command 1: Display Mode Commands
2. Command 2: Data Setting Commands
3. Command 3 : Address Setting Commands
4. Command 4: Display Control Commands
5. When IC power is applied for the first time, the contents of the Display RAM are not defined; thus, it
is strongly suggested that the contents of the Display RAM must be cleared during the initial setting.
Figure 17: Recommended Software Flowchart
START
SET
COMMAND 2
(Write Data)
SET
COMMAND 2
(READ KEY &
WRITEDATA
INCLUDED)
SET
COMMAND 3
END
INITIAL
SETTING
MAIN
LOOP
SET
COMMAND 3
Clear Display RAM
(See Note 5)
SET
COMMAND 1
MAIN
PROGRAM
SET
COMMAND 4
SET
COMMAND 4
(88H ~ 8FH : Display
ON)
Delay 200 ms
SET
COMMAND 1

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PT6315 v2.0 Page 18 Sep. 2002
ABSOLUTE MAXIMUM RATINGS
(Unless otherwise stated, Ta=25oC, GND=0V)
RECOMMENDED OPERATING RANGE
(Unless otherwise stated, Ta=-20 to +70oC, GND=0V)
+
Parameter Symbol Ratings Unit
Logic Supply Voltage VDD -0.5 to +7 Volts
Driver Supply Voltage VEE VDD+0.5 to VDD- 40 Volts
Logic Input Voltage VI-0.5 to VDD+0.5 Volts
VFD Driver Output Voltage Vo VEE-0.5 to VDD+0.5 Volts
LED Driver Output Current IOLED 20 mA
VFD Driver Output Current IOVFD -40 (Grid)
-15 (Segment) mA
Parameter Symbol Min. Typ. Max. Unit
Logic Supply Voltage VDD 3.0 55.5 V
High-Level Input Voltage VIH 0.7VDD -VDD V
Low-Level Input Voltage VIL 0-0.3VDD V
Driver Supply Voltage VEE VDD-35 -0V

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 19 Sep. 2002
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, VDD=5V, GND=0V, VEE=VDD-35 V, Ta=25oC)
Parameter Symbol Test Condition Min. Typ. Max. Unit
High-Level
Output Voltage VOHLED IOHLED=-12mA LED1 to LED4 VDD -1 - - V
Low-Level
Output Voltage VOLLED IOLLED=+15mA LED1 to LED4 - - 1V
Low-Level
Output Voltage VOLDOUT DOUT, IOLDOUT=4mA - - 0.4 V
High-Level
Output Current IOHSG Vo=VDD-2V
SG1/KS1 to
SG16/KS16 -3 - - mA
High-Level
Output Current IOHGR
Vo=VDD-2V
GR1 to GR8,
SG17/GR12 to
SG24/GR5
-15 - - mA
Oscillation
Frequency fosc R=82 Kohms (see Note) 350 500 650 KHz
Schmitt-Trigger
Transfer Voltage
(+) VT+ VDD=5V
(DIN, CLK, STB) 2.7 33.3 V
Schmitt-Trigger
Transfer Voltage
(-) VT-VDD=5V
(DIN, CLK, STB) 0.7 1.0 1.3 V
Hysteresis
Voltage Vhys VDD=5V (DIN, CLK, STB) 1.4 2.0 -V
Input Current IIVI= VDD or VSS - - ±1 uA
Dynamic Current
Consumption IDDdyn Under no load Display OFF - - 5mA
Note: The frequency value is for PTC test condition. fosc=224/T
If you want to know details data, please see page 13.

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VFD Driver/Controller IC PT6315
PT6315 v2.0 Page 20 Sep. 2002
ELECTRICAL CHARACTERISTICS
(Unless otherwise stated, VDD=3.3V, GND=0V, VEE=VDD-35 V, Ta=25oC)
Parameter Symbol Test Condition Min. Typ. Max. Unit
High-Level
Output Voltage VOHLED IOHLED=-6mA LED1 to LED4 VDD -1 - - V
Low-Level
Output Voltage VOLLED IOLLED=+15mA LED1 to LED4 - - 1V
Low-Level
Output Voltage VOLDOUT DOUT, IOLDOUT=4mA - - 0.4 V
High-Level
Output Current IOHSG Vo=VDD-2V
SG1/KS1 to
SG16/KS16 -1.5 - - mA
High-Level
Output Current IOHGR
Vo=VDD-2V
GR1 to GR8,
SG17/GR12 to
SG24/GR5
-6 - - mA
Oscillation
Frequency fosc R=100 Kohms (see Note) 350 500 650 KHz
Schmitt-Trigger
Transfer Voltage
(+) VT+ VDD=3.3V
(DIN, CLK, STB) 1.8 2.0 2.2 V
Schmitt-Trigger
Transfer Voltage
(-) VT-VDD=3.3V
(DIN, CLK, STB) 0.2 0.4 0.6 V
Hysteresis
Voltage Vhys VDD=3.3V (DIN, CLK, STB) 1.0 1.6 -V
Input current IIVI= VDD or VSS - - ±1 uA
Dynamic Current
Consumption IDDdyn Under no load Display OFF - - 3mA
Note: The frequency value is for PTC test condition. fosc=224/T
If you want to know details data, please see page 13.