Rabbit 2000 User manual

Rabbit 2000™ Microprocessor
Designers Handbook
Revision C

Rabbit 2000 Microprocessor
Rabbit 2000 Microprocessor Designer’s Handbook
Part Number 019-0070 • Revision C
Last revised on July 5, 2000 • Printed in U.S.A.
Copyright
© 2000 Rabbit Semiconductor • All rights reserved.
Rabbit Semiconductor reserves the right to make changes and improvements to its prod-
ucts without providing notice.
Trademarks
• Dynamic C® is a registered trademark of Z-World
• Z80/Z180™ is a trademark of Zilog, Inc.
Notice to Users
Rabbit Semiconductor products are not authorized for use as critical components in life-
support devices or systems unless a specific written agreement regarding such intended
use is entered into between the customer and Rabbit Semiconductor prior to use. Life-
support devices or systems are devices or systems intended for surgical impantation into
the body or to sustain life, and whose failure to perform, when properly used in accor-
dance with instructions for use provided in the labeling and user’s manual, can be reason-
ably expected to result in significant injury.
No complex software or hardware system is perfect. Bugs are always present in a system
of any size. In order to prevent danger to life or property, it is there responsibility of the
system designer to incorporate redundant protective mechanisms appropriate to the risk
involved.
Company Address
Rabbit Semiconductor
2932 Spafford Street
Davis, California 95616-6800
USA
Telephone: [phone]
Facsimile: [phone]
Web site: http://www.rabbitsemiconductor.com

Designer’s Handbook
1. Introduction.....................................................................................................................1
2. Hardware Design Overview............................................................................................3
3. How Dynamic C Cold-Boots the Target System............................................................5
3.1 How the Cold Boot Mode Works In Detail.................................................................................5
3.2 Program Loading Process Overview...........................................................................................6
3.3 Program Loading Process Details ...............................................................................................6
4. Dynamic C Rabbit Programming Overview...................................................................9
4.1 Memory Organization ...............................................................................................................10
4.2 How The Compiler Compiles to Memory.................................................................................14
5. The Rabbit BIOS ..........................................................................................................17
5.1 Startup Conditions Set Up By the BIOS...................................................................................17
5.2 BIOS Flowchart.........................................................................................................................18
5.3 Internally defined macros..........................................................................................................19
5.4 Modifying the BIOS..................................................................................................................19
5.5 Origin Directives to the Compiler.............................................................................................20
6. The System ID Block....................................................................................................23
6.1 Definition ..................................................................................................................................23
6.2 Access........................................................................................................................................24
6.3 Reading the ID block.................................................................................................................24
7. BIOS Support for Program Cloning .............................................................................27
8. Low-Power Design and Support...................................................................................29
8.1 Software Support for Low-Power Sleepy Modes .....................................................................31
8.2 Baud Rates in Sleepy Mode......................................................................................................32
9. Memory Planning .........................................................................................................33
10. Flash Memories...........................................................................................................35
10.1 Writing Your Own Flash Driver..............................................................................................36
11. Hardware Bring-Up Procedure ...................................................................................39
11.1 Bringing up a New Rabbit System..........................................................................................39
11.2 Initial Checks...........................................................................................................................39
11.3 Diagnostic Test #2...................................................................................................................39
11.4 Diagnostic Test #3...................................................................................................................40
Legal Notice.....................................................................................................................41

Rabbit 2000 Microprocessor

Designer’s Handbook 1
1. Introduction
This manual is intended for the engineer designing a system using the Rabbit micropro-
cessor and Z-World’s Dynamic C development environment. It explains how to develop a
Rabbit-based microprocessor system that can be programmed with Z-World’s Dynamic C.
This manual is preliminary. An improved manual will be issued at a later date.
With the Rabbit and Dynamic C, many traditional tools and concepts are obsolete. Com-
plicated and fragile in-circuit emulators are unnecessary. EPROM burners are unneeded.
The Rabbit microprocessor and Dynamic C work together without elaborate hardware
aids provided that the designer observes certain design conventions. The design conven-
tions are straight forward and enhance design creativity.
As shown in Figure 1, the Rabbit programming cable connects a PC serial port to the pro-
gramming connector of the target microprocessor system.
Figure 1. Dynamic C Programming
The Rabbit programming cable is a smart cable with an active circuit board in the middle
of the cable. The circuit board converts RS-232 voltage levels used by the PC serial port to
CMOS voltage levels used by the Rabbit.
Dynamic C runs as an application on the PC, and can cold-boot the Rabbit-based target
system with no pre-existing program installed in the target. The flash memory on the tar-
get system can be blank or it may contain any data. The cold-boot capability permits the
use of soldered-in flash memory on the target. Soldered-in memory eliminates sockets,
boot blocks and prom programming devices. However, it is important that the memory
have its software data protection enabled before it is soldered in.
PC Hosts Dynamic CRabbit
Programming
Cable
Programming
Connector
Target Microprocessor
System
Rabbit
Microprocessor
Level
Conversion
PC Serial
Port

2Rabbit 2000 Microprocesssor

Designer’s Handbook 3
2. Hardware Design Overview
Because of the glueless nature of the external interfaces, especially the memory interface,
it is easy to design hardware in a Rabbit-based system. More details on hardware design
are given in the Rabbit 2000 Microprocessor User’s Manual.
Generally a system will have two oscillator crystals, a 32.768 kHz crystal to drive the bat-
tery-backable timer, and another crystal that has a frequency that is 1.8432 MHz or a mul-
tiple of 3.6864 MHz. Typical values are 1.8432, 3.6864, 7.3728, 11.0592, 14.7456,
18.432, 25.8048, and 29.4912 MHz. These crystal frequencies (except 1.8432 MHz) all
allow generation of standard baud rates up to at least 115,200 bps. The clock frequency
can be doubled by an on-chip clock doubler, but the doubler should not be used to achieve
frequencies higher than about 22.1184 MHz on a 5 V system and 14.7456 MHz on a 3.3 V
system. A quartz crystal should be used for the 32.768 kHz oscillator. For the main oscil-
lator a ceramic resonator, accurate to 0.5%, will usually be adequate and less expensive
than a quartz crystal.
Most systems have one static RAM chip and one or two flash memory chips, but more
memory chips can be used when appropriate. Static RAM chips are available in 32K x 8,
64K x 8, 128K x 8, 256K x 8 and 512K x 8 sizes. The 256K x 8 is mainly available in 3 V
versions. The other chips are available in 5 V or 3 V versions. Suggested flash memory
chips between 128K x 8 and 512K x 8 are given in Chapter 10, Flash Memories.
The operating voltage in Rabbit-based systems will usually be 5 V or 3.3 V, but 2.7 V is
also a possibility. The maximum computation per watt is obtained in the range of 3.0 V to
3.6 V. The highest clock speeds require 5 V. The maximum clock speed with a 3.3 V sup-
ply is 18.9 MHz, but it will usually be convenient to use the less expensive R25 part and a
7.3728 MHz crystal, doubling the frequency to 14.7456 MHz. Good computational per-
formance, but not the absolute maximum, can be implemented for 5V systems by using
an 11.0592 MHz crystal and doubling the frequency to 22.1184 MHz. Such a system will
operate with 70 ns memories. If the maximum performance is required, then a 29.4912
MHz crystal or resonator (for a crystal this must be the first overtone, and may need to be
special ordered) or a 29.4912 MHz external oscillator can be used. A 29.4912 MHz sys-
tem will require 55 ns memory access time. A table of timing specification is contained in
the Rabbit 2000 Microprocessor User’s Manual.
When minimum power consumption is required, a 3.3 V power supply and a 3.6864 MHz
or a 1.8432 MHz crystal will usually be good choices. Such a system can operate at the
main 3.6864 MHz or 1.8432 MHz frequency either doubled or divided by 8 (or both). A
further reduction in power consumption at the expense of computing speed can be
obtained by adding memory wait states. Operating at 3.6864 MHz, such a system will
draw approximately 11 mA at 3.3 V, not including the power required by the memory.
Approximately 2 mA is used for the oscillator and 9 mA is used for the processor. Reduc-
ing the processor frequency will reduce current proportionally. At 1/4th the frequency or
(0.92 MHz) the current consumption will be approximately 4 mA. At 1/8th the frequency,
(0.46 MHz) the total power consumption will be approximately 3 mA, not including the
memories. Doubling the frequency to 7.37 MHz will increase the current to approxi-
mately 20 mA.

4 Rabbit 2000 Microprocessor
If the main oscillator is turned off and the microprocessor is operated at 32.768 kHz from
the clock oscillator, the current will drop to about 200 µA exclusive of the current required
by the memory. The level of power consumption can be fine-tuned by adding memory
wait states, which have the effect of reducing power consumption. In order to obtain
microampere level power consumption, it is necessary to use auto powerdown flash mem-
ories to hold the executing code. Standby power while the system is waiting for an event
can be reduced by executing long strings of multiply zero by zero instructions. Keep in
mind that a Rabbit operating at 3.68 MHz has the compute power of a Z180 microproces-
sor operating at approximately triple the clock frequency (11 MHz).
Most design advice given for the Rabbit assumes the use of surface-mount technology.
However, it is possible to use the older through hole technology and develop a Rabbit sys-
tem. One can use Z-World’s Rabbit-based Core Module, a small daughter circuit board
with a complete Rabbit core that includes memory and oscillators. Another possibility is
to solder the Rabbit processors by hand to the circuit board. This is not difficult and is sat-
isfactory for low production volumes if the right technique is used.

Designer’s Handbook 5
3. How Dynamic C Cold-Boots the Target System
Dynamic C assumes that target controller boards using the Rabbit CPU have no pre-
installed firmware. It takes advantage of the Rabbit’s bootstrap (cold boot) mode that
allows memory and I/O writes to take place over the programming port.
When the programming cable connects a PC serial port to the user’s system the PC run-
ning Dynamic C is connected to the Rabbit as shown in Table 1..
The programming cable includes an RS-232 to CMOS signal level converter circuit. The
level converter is powered from the +5 V or +3.3 V power supply voltage present on the
Rabbit programming connector (see Figure 7 on page 31). Plugging the programming
cable into the Rabbit programming connector results in pulling the Rabbit SMODE0,
SMODE1 (startup mode) lines high. This causes the Rabbit to enter the cold-boot mode
after reset.
3.1 How the Cold Boot Mode Works In Detail
The microprocessor starts executing a 12-byte program contained in an internal ROM.
The program contains the following code.
; origin zero
00 ld l,n ; n=0c0h for serial port A
; n=020h for parallel (slave port)
02 ioi ld d,(hl) ; get address most sig byte
04 ioi ld e,(hl) ; get least sig byte
06 ioi ld a,(hl) ; get data (h is ignored)
08 ioi or nop ; if D(7)==1 ioi, else nop
09 ld (de),A ; store in memory or I/O
10 jr 0 ; jump back to zero
; note wait states inserted at bytes 3, 5 and 7 waiting
; for serial port or parallel port ready
The contents of the boot ROM vary depending on the settings of SMODE1, SMODE2 and
on the contents of register D bit 7 which determines if the store is to be an I/O store or a
data store. If the boot is terminated by storing 80h to I/O register 24h then when the boot
Table 1. Programming Port Connections
PC Serial Port Signal Rabbit Signal
DTR (output) /RESET (input, reset system)
DSR (input) STATUS (gen purpose output)
TX (serial output) RXA (serial input, chan A)
RX (serial input) TXA (serial output, chan A)

6 Rabbit 2000 Microprocessor
program reaches address zero the boot mode is disabled and instruction fetching resumes
at address zero.
Wait states are automatically inserted during the fetching of bytes 3, 5 and 7 to wait for
the serial or parallel port ready. The wait states continue indefinitely until the serial port is
ready. This will cause the processor to be in the middle of an instruction fetch until the
next character is ready. While the processor is in this state the chip select, but not the out-
put enable, will be enabled if the memory mapping registers are such as to normally
enable the chip select for the boot ROM address. The chip select will stay low for
extended periods while the processor is waiting for the serial or parallel port data to be
ready. Additionally, the chip select will go low when a write is performed to an I/O
address if the address is such as to enable that chip select if it were a write to a memory
address.
3.2 Program Loading Process Overview
On start up, Dynamic C first uses the PC’s DTR line on the serial port to assert the Rabbit
RESET line and put the processor in cold-boot mode. Next, Dynamic C uses a four stage
process to load a user program:
1. Load an initial loader (coldloader) via triplets sent at 2400 baud from the PC in to a tar-
get in cold-boot mode.
2. Run the initial loader and load a secondary loader (pilot BIOS) at 19200 baud.
3. Run the secondary loader and load the BIOS (as Dynamic C compiles it)
4. Run the BIOS and load the user program at 115200 baud (after Dynamic C compiles it
to a file).
3.3 Program Loading Process Details
When Dynamic C starts, the following sequence of events takes place:
1. The serial port is opened at with the DTR line low, closed, then reopened with the DTR
line high at 2400 baud. This pulses the reset line on the target low (the programming
cable inverts the DTR line) and prepares the PC to send triplets.
2. A group of triplets defined in the file COLDLOAD.BIN consisting of 2 address bytes
and a data byte are sent to the target. The first few bytes sent are sent to I/O addresses to
set the up MMU and MIU and do system initialization. The MMU is set up so that
RAM is mapped to 0x00000, and flash is mapped 0x80000.
3. The remaining triplets place a small program at memory location 0x00000. The last
triplet sent is 0x80,0x24,0x80, which tells the CPU to ignore the SMODE pins and start
running code at address 0x00000.
4. The PC now bumps the baud rate on the serial port being used to 19200.
5. The primary loader measures the crystal speed to determine what divisor is needed to
set a baud rate of 19200. The divisor is stored at address 0x4002 for later use by the
BIOS, and the programming port is set up to be a 19200 baud serial port.