Rabbit Rabbit 4000 User manual

Rabbit®4000 Microprocessor
User’s Manual
019–0152 • 070720–H

Rabbit 4000 Microprocessor User’s Manual
Rabbit Semiconductor Inc.
www.rabbit.com
Rabbit 4000 Microprocessor User’s Manual
Part Number 019-0152 • 070720–H • Printed in U.S.A.
©2006–2007 Rabbit Semiconductor Inc. • All rights reserved.
Rabbit Semiconductor reserves the right to make changes and
improvements to its products without providing notice.
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Rabbit and Dynamic C are registered trademarks of Rabbit Semiconductor Inc.
Rabbit 4000 is a trademark of Rabbit Semiconductor Inc.
No part of the contents of this manual may be reproduced or transmitted in any form or by any means
without the express written permission of Rabbit Semiconductor.
Permission is granted to make one or more copies as long as the copyright page contained therein is
included. These copies of the manuals may not be let or sold for any reason without the express written
permission of Rabbit Semiconductor.
The latest revision of this manual is available on the Rabbit Semiconductor Web site,
www.rabbit.com, for free, unregistered download.

Table of Contents
TABLE OF CONTENTS
Chapter 1. The Rabbit 4000 Processor 1
1.1 Introduction...........................................................................................................................................1
1.2 Features.................................................................................................................................................1
1.3 Block Diagram......................................................................................................................................4
1.4 Basic Specifications..............................................................................................................................5
1.5 Comparing Rabbit Microprocessors.....................................................................................................6
Chapter 2. Clocks 9
2.1 Overview...............................................................................................................................................9
2.1.1 Block Diagram ...........................................................................................................................10
2.1.2 Registers .....................................................................................................................................10
2.2 Dependencies......................................................................................................................................11
2.2.1 I/O Pins ......................................................................................................................................11
2.2.2 Other Registers ...........................................................................................................................11
2.3 Operation ............................................................................................................................................12
2.3.1 Main Clock .................................................................................................................................12
2.3.2 Spectrum Spreader .....................................................................................................................13
2.3.3 Clock Doubler ............................................................................................................................15
2.3.4 32 kHz Clock .............................................................................................................................18
2.4 Register Descriptions..........................................................................................................................20
Chapter 3. Reset and Bootstrap 25
3.1 Overview.............................................................................................................................................25
3.1.1 Block Diagram ...........................................................................................................................25
3.1.2 Registers .....................................................................................................................................26
3.2 Dependencies......................................................................................................................................26
3.2.1 I/O Pins ......................................................................................................................................26
3.2.2 Clocks .........................................................................................................................................26
3.2.3 Other Registers ...........................................................................................................................26
3.2.4 Interrupts ....................................................................................................................................26
3.3 Operation ............................................................................................................................................27
3.4 Register Descriptions..........................................................................................................................29
Chapter 4. System Management 31
4.1 Overview.............................................................................................................................................31
4.1.1 Block Diagram ...........................................................................................................................32
4.1.2 Registers .....................................................................................................................................32
4.2 Dependencies......................................................................................................................................33
4.2.1 I/O Pins ......................................................................................................................................33
4.2.2 Clocks .........................................................................................................................................33
4.2.3 Interrupts ....................................................................................................................................33
4.3 Operation ............................................................................................................................................34
4.3.1 Periodic Interrupt .......................................................................................................................34
4.3.2 Real-Time Clock ........................................................................................................................34
4.3.3 Watchdog Timer ........................................................................................................................35
4.3.4 Secondary Watchdog Timer .......................................................................................................35
4.4 Register Descriptions..........................................................................................................................36

Rabbit 4000 Microprocessor User’s Manual
Chapter 5. Memory Management 41
5.1 Overview............................................................................................................................................41
5.1.1 Block Diagram ...........................................................................................................................43
5.1.2 Registers ....................................................................................................................................44
5.2 Dependencies .....................................................................................................................................45
5.2.1 I/O Pins ......................................................................................................................................45
5.2.2 Clocks ........................................................................................................................................45
5.2.3 Other Registers ..........................................................................................................................45
5.2.4 Interrupts ....................................................................................................................................45
5.3 Operation............................................................................................................................................46
5.3.1 Memory Management Unit (MMU) ..........................................................................................46
5.3.2 8-bit Operation ...........................................................................................................................47
5.3.3 16-bit and Page Modes ..............................................................................................................49
5.3.4 Separate Instruction and Data Space .........................................................................................52
5.3.5 Memory Protection ....................................................................................................................52
5.3.6 Stack Protection .........................................................................................................................52
5.4 Register Descriptions .........................................................................................................................53
Chapter 6. Interrupts 65
6.1 Overview............................................................................................................................................65
6.2 Operation............................................................................................................................................66
6.3 Interrupt Tables .................................................................................................................................. 66
Chapter 7. External Interrupts 69
7.1 Overview............................................................................................................................................69
7.2 Block Diagram ...................................................................................................................................69
7.2.1 Registers ....................................................................................................................................70
7.3 Dependencies .....................................................................................................................................70
7.3.1 I/O Pins ......................................................................................................................................70
7.3.2 Clocks ........................................................................................................................................70
7.3.3 Interrupts ....................................................................................................................................70
7.4 Operation............................................................................................................................................70
7.4.1 Example ISR ..............................................................................................................................70
7.5 Register Descriptions .........................................................................................................................71
Chapter 8. Parallel Port A 73
8.1 Overview............................................................................................................................................73
8.1.1 Block Diagram ...........................................................................................................................73
8.1.2 Registers ....................................................................................................................................73
8.2 Dependencies .....................................................................................................................................74
8.2.1 I/O Pins ......................................................................................................................................74
8.2.2 Clocks ........................................................................................................................................74
8.2.3 Other Registers ..........................................................................................................................74
8.2.4 Interrupts ....................................................................................................................................74
8.3 Operation............................................................................................................................................74
8.4 Register Descriptions .........................................................................................................................75
Chapter 9. Parallel Port B 77
9.1 Overview............................................................................................................................................77
9.1.1 Block Diagram ...........................................................................................................................78
9.1.2 Registers ....................................................................................................................................78
9.2 Dependencies .....................................................................................................................................78
9.2.1 I/O Pins ......................................................................................................................................78
9.2.2 Clocks ........................................................................................................................................78
9.2.3 Other Registers ..........................................................................................................................78
9.2.4 Interrupts ....................................................................................................................................79
9.3 Operation............................................................................................................................................79
9.4 Register Descriptions .........................................................................................................................79

Table of Contents
Chapter 10. Parallel Port C 81
10.1 Overview...........................................................................................................................................81
10.1.1 Block Diagram .........................................................................................................................82
10.1.2 Registers ...................................................................................................................................82
10.2 Dependencies....................................................................................................................................83
10.2.1 I/O Pins ....................................................................................................................................83
10.2.2 Clocks .......................................................................................................................................83
10.2.3 Other Registers .........................................................................................................................83
10.2.4 Interrupts ..................................................................................................................................83
10.3 Operation ..........................................................................................................................................83
10.4 Register Descriptions........................................................................................................................84
Chapter 11. Parallel Port D 87
11.1 Overview...........................................................................................................................................87
11.1.1 Block Diagram .........................................................................................................................89
11.1.2 Registers ...................................................................................................................................90
11.2 Dependencies....................................................................................................................................90
11.2.1 I/O Pins ....................................................................................................................................90
11.2.2 Clocks .......................................................................................................................................90
11.2.3 Other Registers .........................................................................................................................91
11.2.4 Interrupts ..................................................................................................................................91
11.3 Operation ..........................................................................................................................................91
11.4 Register Descriptions........................................................................................................................92
Chapter 12. Parallel Port E 97
12.1 Overview...........................................................................................................................................97
12.1.1 Block Diagram .........................................................................................................................99
12.1.2 Registers .................................................................................................................................100
12.2 Dependencies..................................................................................................................................100
12.2.1 I/O Pins ..................................................................................................................................100
12.2.2 Clocks .....................................................................................................................................100
12.2.3 Other Registers .......................................................................................................................101
12.2.4 Interrupts ................................................................................................................................101
12.3 Operation ........................................................................................................................................101
12.4 Register Descriptions......................................................................................................................102
Chapter 13. Timer A 107
13.1 Overview.........................................................................................................................................107
13.1.1 Block Diagram .......................................................................................................................109
13.1.2 Registers .................................................................................................................................110
13.2 Dependencies..................................................................................................................................110
13.2.1 I/O Pins ..................................................................................................................................110
13.2.2 Clocks .....................................................................................................................................110
13.2.3 Other Registers .......................................................................................................................110
13.2.4 Interrupts ................................................................................................................................111
13.3 Operation ........................................................................................................................................111
13.3.1 Handling Interrupts ................................................................................................................111
13.3.2 Example ISR ..........................................................................................................................111
13.4 Register Descriptions......................................................................................................................112
Chapter 14. Timer B 115
14.1 Overview.........................................................................................................................................115
14.1.1 Block Diagram .......................................................................................................................115
14.1.2 Registers .................................................................................................................................116
14.2 Dependencies..................................................................................................................................116
14.2.1 I/O Pins ..................................................................................................................................116
14.2.2 Clocks .....................................................................................................................................116
14.2.3 Other Registers .......................................................................................................................116
14.2.4 Interrupts ................................................................................................................................116

Rabbit 4000 Microprocessor User’s Manual
14.3 Operation........................................................................................................................................117
14.3.1 Handling Interrupts ................................................................................................................117
14.3.2 Example ISR ..........................................................................................................................117
14.4 Register Descriptions .....................................................................................................................118
Chapter 15. Timer C 121
15.1 Overview........................................................................................................................................121
15.1.1 Block Diagram .......................................................................................................................122
15.1.2 Registers ................................................................................................................................123
15.2 Dependencies .................................................................................................................................124
15.2.1 I/O Pins ..................................................................................................................................124
15.2.2 Clocks ....................................................................................................................................124
15.2.3 Other Registers ......................................................................................................................124
15.2.4 Interrupts ................................................................................................................................124
15.3 Operation........................................................................................................................................125
15.3.1 Handling Interrupts ................................................................................................................125
15.3.2 Example ISR ..........................................................................................................................125
15.4 Register Descriptions .....................................................................................................................126
Chapter 16. Serial Ports A – D 129
16.1 Overview........................................................................................................................................129
16.1.1 Block Diagram .......................................................................................................................131
16.1.2 Registers ................................................................................................................................132
16.2 Dependencies .................................................................................................................................133
16.2.1 I/O Pins ..................................................................................................................................133
16.2.2 Clocks ....................................................................................................................................134
16.2.3 Other Registers ......................................................................................................................134
16.2.4 Interrupts ................................................................................................................................134
16.3 Operation........................................................................................................................................135
16.3.1 Asynchronous Mode ..............................................................................................................135
16.3.2 Clocked Serial Mode .............................................................................................................136
16.4 Register Descriptions .....................................................................................................................138
Chapter 17. Serial Ports E – F 145
17.1 Overview........................................................................................................................................145
17.1.1 Block Diagram .......................................................................................................................146
17.1.2 Registers ................................................................................................................................147
17.2 Dependencies .................................................................................................................................148
17.2.1 I/O Pins ..................................................................................................................................148
17.2.2 Clocks ....................................................................................................................................148
17.2.3 Other Registers ......................................................................................................................148
17.2.4 Interrupts ................................................................................................................................149
17.3 Operation........................................................................................................................................150
17.3.1 Asynchronous Mode ..............................................................................................................150
17.3.2 HDLC Mode ..........................................................................................................................150
17.3.3 More on Clock Synchronization and Data Encoding ............................................................151
17.4 Register Descriptions .....................................................................................................................155
Chapter 18. Slave Port 161
18.1 Overview........................................................................................................................................161
18.1.1 Block Diagram .......................................................................................................................162
18.1.2 Registers ................................................................................................................................162
18.2 Dependencies .................................................................................................................................163
18.2.1 I/O Pins ..................................................................................................................................163
18.2.2 Clocks ....................................................................................................................................163
18.2.3 Interrupts ................................................................................................................................163

Table of Contents
18.3 Operation ........................................................................................................................................164
18.3.1 Master Setup ..........................................................................................................................165
18.3.2 Slave Setup .............................................................................................................................165
18.3.3 Master/Slave Communication ................................................................................................166
18.3.4 Slave/Master Communication ................................................................................................166
18.3.5 Handling Interrupts ................................................................................................................166
18.3.6 Example ISR ..........................................................................................................................166
18.3.7 Other Configurations ..............................................................................................................167
18.3.8 Timing Diagrams ...................................................................................................................168
18.4 Register Descriptions......................................................................................................................170
Chapter 19. DMA Channels 173
19.1 Overview.........................................................................................................................................173
19.1.1 Block Diagram .......................................................................................................................175
19.1.2 Registers .................................................................................................................................176
19.2 Dependencies..................................................................................................................................177
19.2.1 I/O Pins ..................................................................................................................................177
19.2.2 Clocks .....................................................................................................................................177
19.2.3 Interrupts ................................................................................................................................177
19.3 Operation ........................................................................................................................................178
19.3.1 Handling Interrupts ................................................................................................................179
19.3.2 Example ISR ..........................................................................................................................179
19.3.3 DMA Priority with the Processor ...........................................................................................179
19.3.4 DMA Channel Priority ...........................................................................................................181
19.3.5 Buffer Descriptor Modes .......................................................................................................181
19.3.5.1 Single Buffer ..................................................................................................................182
19.3.5.2 Buffer Array ...................................................................................................................182
19.3.5.3 Linked List .....................................................................................................................183
19.3.5.4 Circular Queue ...............................................................................................................184
19.3.5.5 Linked Array ..................................................................................................................184
19.3.6 DMA with Peripherals ...........................................................................................................185
19.3.6.1 DMA with HDLC Serial Ports .......................................................................................185
19.3.6.2 DMA with Ethernet ........................................................................................................185
19.3.6.3 DMA with PWM and Timer C .......................................................................................185
19.3.7 DMA Bug Workarounds (Appendix B.2) ..............................................................................185
19.3.7.1 DMA/HDLC/Ethernet Interaction ..................................................................................185
19.3.8 DMA/Block Copy Interaction ................................................................................................186
19.3.9 Single-Byte DMA Requests to internal I/O Registers ...........................................................186
19.4 Register Descriptions......................................................................................................................187
Chapter 20. 10Base-T Ethernet 201
20.1 Overview.........................................................................................................................................201
20.1.1 Block Diagram .......................................................................................................................203
20.1.2 Registers .................................................................................................................................204
20.2 Dependencies..................................................................................................................................205
20.2.1 I/O Pins ..................................................................................................................................205
20.2.2 Clocks .....................................................................................................................................205
20.2.3 Other Registers .......................................................................................................................205
20.2.4 Interrupts ................................................................................................................................205
20.3 Operation ........................................................................................................................................206
20.3.1 Setup .......................................................................................................................................206
20.3.2 Transmit .................................................................................................................................206
20.3.3 Receive ...................................................................................................................................206
20.3.4 Handling Interrupts ................................................................................................................207
20.3.5 Multicast Addressing .............................................................................................................208
20.4 Ethernet Interface Circuit................................................................................................................209
20.5 Register Descriptions......................................................................................................................210

Rabbit 4000 Microprocessor User’s Manual
Chapter 21. Input Capture 219
21.1 Overview........................................................................................................................................219
21.1.1 Input-Capture Mode ..............................................................................................................219
21.1.2 Input-Count Mode .................................................................................................................220
21.1.3 Block Diagram .......................................................................................................................220
21.1.4 Registers ................................................................................................................................221
21.2 Dependencies .................................................................................................................................222
21.2.1 I/O Pins ..................................................................................................................................222
21.2.2 Clocks ....................................................................................................................................222
21.2.3 Other Registers ......................................................................................................................222
21.2.4 Interrupts ................................................................................................................................222
21.3 Operation........................................................................................................................................223
21.3.1 Input-Capture Channel ..........................................................................................................223
21.3.2 Handling Interrupts ................................................................................................................223
21.3.3 Example ISR ..........................................................................................................................223
21.3.4 Capture Mode ........................................................................................................................224
21.3.5 Count Mode ...........................................................................................................................224
21.4 Register Descriptions .....................................................................................................................225
Chapter 22. Quadrature Decoder 231
22.1 Overview........................................................................................................................................231
22.1.1 Block Diagram .......................................................................................................................233
22.1.2 Registers ................................................................................................................................233
22.2 Dependencies .................................................................................................................................234
22.2.1 I/O Pins ..................................................................................................................................234
22.2.2 Clocks ....................................................................................................................................234
22.2.3 Other Registers ......................................................................................................................234
22.2.4 Interrupts ................................................................................................................................234
22.3 Operation........................................................................................................................................235
22.3.1 Handling Interrupts ................................................................................................................235
22.3.2 Example ISR ..........................................................................................................................235
22.4 Register Descriptions .....................................................................................................................236
Chapter 23. Pulse Width Modulator 239
23.1 Overview........................................................................................................................................239
23.1.1 Block Diagram .......................................................................................................................241
23.1.2 Registers ................................................................................................................................241
23.2 Dependencies .................................................................................................................................242
23.2.1 I/O Pins ..................................................................................................................................242
23.2.2 Clocks ....................................................................................................................................242
23.2.3 Other Registers ......................................................................................................................242
23.2.4 Interrupts ................................................................................................................................242
23.3 Operation........................................................................................................................................243
23.3.1 Handling Interrupts ................................................................................................................243
23.3.2 Example ISR ..........................................................................................................................243
23.4 Register Descriptions .....................................................................................................................244
Chapter 24. External I/O Control 247
24.1 Overview........................................................................................................................................247
24.1.1 Auxiliary I/O Bus ..................................................................................................................247
24.1.2 I/O Strobes .............................................................................................................................248
24.1.3 I/O Handshake .......................................................................................................................249
24.1.4 Block Diagram .......................................................................................................................250
24.1.5 Registers ................................................................................................................................250
24.2 Dependencies .................................................................................................................................251
24.2.1 I/O Pins ..................................................................................................................................251
24.2.2 Clocks ....................................................................................................................................251
24.2.3 Other Registers ......................................................................................................................251
24.2.4 Interrupts ................................................................................................................................251

Table of Contents
24.3 Operation ........................................................................................................................................252
24.3.1 Auxiliary I/O Bus ...................................................................................................................252
24.3.2 I/O Strobes .............................................................................................................................252
24.3.3 I/O Handshake ........................................................................................................................252
24.4 Register Descriptions......................................................................................................................253
Chapter 25. Breakpoints 263
25.1 Overview.........................................................................................................................................263
25.1.1 Block Diagram .......................................................................................................................264
25.1.2 Registers .................................................................................................................................265
25.2 Dependencies..................................................................................................................................266
25.2.1 I/O Pins ..................................................................................................................................266
25.2.2 Clocks .....................................................................................................................................266
25.2.3 Other Registers .......................................................................................................................266
25.2.4 Interrupts ................................................................................................................................266
25.3 Operation ........................................................................................................................................266
25.3.1 Handling Interrupts ................................................................................................................266
25.3.2 Example ISR ..........................................................................................................................267
25.4 Register Descriptions......................................................................................................................268
Chapter 26. Low-Power Operation 271
26.1 Overview.........................................................................................................................................271
26.1.1 Registers .................................................................................................................................272
26.2 Operation ........................................................................................................................................273
26.2.1 Unused Pins ............................................................................................................................273
26.2.2 Clock Rates ............................................................................................................................273
26.2.3 Short Chip Selects ..................................................................................................................274
26.2.4 Self-Timed Chip Selects ........................................................................................................279
26.3 Register Descriptions......................................................................................................................280
Chapter 27. System/User Mode 283
27.1 Overview.........................................................................................................................................283
27.1.1 Registers .................................................................................................................................284
27.2 Dependencies..................................................................................................................................285
27.2.1 I/O Pins ..................................................................................................................................285
27.2.2 Clocks .....................................................................................................................................285
27.2.3 Other Registers .......................................................................................................................285
27.2.4 Interrupts ................................................................................................................................286
27.3 Operation ........................................................................................................................................287
27.3.1 Memory Protection Only .......................................................................................................287
27.3.2 Mixed System/User Mode Operation ....................................................................................288
27.3.3 Complete Operating System ..................................................................................................288
27.3.4 Enabling the System/User Mode ............................................................................................289
27.3.5 System/User Mode Instructions .............................................................................................290
27.3.6 System Mode Violation Interrupt ..........................................................................................291
27.3.7 Handling Interrupts in the System/User Mode ......................................................................292
27.4 Register Descriptions......................................................................................................................294
Chapter 28. Specifications 301
28.1 DC Characteristics..........................................................................................................................301
28.2 AC Characteristics..........................................................................................................................303
28.3 Memory Access Times ...................................................................................................................304
28.3.1 Memory Reads .......................................................................................................................304
28.3.2 Memory Writes ......................................................................................................................305
28.3.3 External I/O Reads .................................................................................................................308
28.3.4 External I/O Writes ................................................................................................................309
28.3.5 Memory Access Times ...........................................................................................................311
28.4 Clock Speeds...................................................................................................................................314
28.4.1 Recommended Clock/Memory Configurations .....................................................................314

Rabbit 4000 Microprocessor User’s Manual
28.5 Power and Current Consumption...................................................................................................317
28.5.1 Sleepy Mode Current Consumption ......................................................................................318
28.5.2 Battery-Backed Clock Current Consumption ........................................................................319
Chapter 29. Package Specifications and Pinout 321
29.1 LQFP Package................................................................................................................................321
29.1.1 Pinout .....................................................................................................................................321
29.1.2 Mechanical Dimensions and Land Pattern ............................................................................322
29.2 Ball Grid Array Package................................................................................................................324
29.2.1 Pinout .....................................................................................................................................324
29.2.2 Mechanical Dimensions and Land Pattern ............................................................................325
29.3 Rabbit Pin Descriptions..................................................................................................................327
Appendix A. Parallel Port Pins with Alternate Functions 329
A.1 Alternate Parallel Port Pin Outputs.................................................................................................329
A.2 Alternate Parallel Port Pin Inputs....................................................................................................331
Appendix B. Rabbit 4000 ESD Design Guidelines and Bug Workarounds 333
B.1 ESD Sensitivity................................................................................................................................334
B.1.1 ESD Design Guidelines ..........................................................................................................334
B.2 Bugs.................................................................................................................................................335
Index 339