Realtek RTL8762D User manual

Realtek Bluetooth
Solutions
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
•Bluetooth Products Introduction
•Bluetooth Low Energy (BLE) SoC Solution
•BLE SoC (RTL8762D) Evaluation Board User Manual
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•Bluetooth Products Introduction
•Bluetooth Dual-mode HCI Transceiver Ⅰ
•Bluetooth Low Energy (BLE) SoC Ⅱ
•Bluetooth Audio SoC Ⅲ
•Bluetooth Low Energy (BLE) SoC Solution
•EVB Introduction Ⅳ
•RTL8762D Evaluation Board User Manual Ⅵ
Realtek Bluetooth Solutions
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
CONTENT
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•BT4.2 dual mode SoC
•GATT+SPP profile inside
•AT command with external MCU
•Tx power up to +10dBm
•QFN32 4x4
•OTT/TV/Camera/Printer
•BT5 dual mode/HCI Transceiver
•UART/USB I/F
•mSBC/eSCO/PLC supported
•Tx Power up to +10dBm
•Rx sensitivity -94.5dBm (2Mbps EDR);
-98 dBm (BLE)
•QNF32 4x4
Smart Home/IoT/VoIP Application
RTL8761ATT
RTL8761B
WorkerBEE
BT HCI
Transceiver
1
5
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
I
Realtek Bluetooth Solutions
NEW
4.2
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5.1
•BT5/Cortex M4F 40MHz; 160KB RAM
•Voice ADC for voice search; IR
transceiver
•Tx Power up to +7.5dBm
•Low Power; ADCx8; EQ Bandx5
•I2C/SPI/UART/I2S/PWMx8
•240x240 I8080 I/F supports
•Support Scatternet/Routing based on BT
SIG
•Support BLE HomeKit / Amazon BLE
Mesh / Amazon Gadget
•BT5.1
•Cortex-M4F 90MHz, 192KB SRAM for
sensor fusion
•SPIC(XiP) for flash, max 32MB (45MHz)
•SPIC(XiP) for PSRAM, max 8MB (45MHz)
•SPIC for AMOLED (45MHz)
•I8080 for TFT/AMOLED (20MHz)
•SPI for TFT (45MHz)
•Supports AMOLED 454x454
•Ultra low power consumption
RTL8762CRTL8762D
HoneyBEE
BLE SoC
2
•BLE5.2
•Cortex M0+ 40MHz, 1MB Flash,
104KB SRAM
•Capacitive touch sensor
•RF TX 4.75mA (0dBm), RX 3.5mA
•QFN32/40/48
•ES: 2021/Q2, MP: 2021/Q4
5.2
RTL8762E
5
NEW
Find More
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
II
Realtek Bluetooth Solutions
Wristband
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•BT5 dual mode supported
•Cortex-RealM300 80MHz+DSP 120Mhz+
stereo codecs
•Tx Power +10dBm
•High-res audio codec integrated
•Google Fast Pairing
•RWS v1.1: low dual-ear latency for talking
•Opus encoder for AI headset/speaker
•Low power consumption <7mA (A2DP)
•Ultra small package QFN4x6,TFBGA 4.5x6
•Suited for high C/P products
•BT5 dual mode supported
•Tx Power +10dBm
•High-res audio codec integrated
•USB Audio/Charger/2xMic/AEC/NR
•Google Fast Pairing
•Low power hybrid ANC
•Opus encoder for AI headset/speaker
•RWS v2.0
•Role swap function
•Low dual-ear latency for phone-talk
•Low power consumption < 6mA (A2DP)
•Ultra small package QFN4.5x6.5,TFBGA
4.5x6
RTL8753C
RTL8773B
BumbleBEE Pro
BT Audio
SoC
3
5
5
RWS/ANC/
LOW POWER
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
III
Realtek Bluetooth Solutions
Find More
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OS Supported
FreeRTOS
,AliOS, Huawei LiteOS, RT-Thread
IDE
Keil
MDK-ARM, GCC, IAR
Debug Tool
SEGGER’s J
-Link
HDK/SDK/MP
Tool
All the design materials will release by
Realtek’s
Anchor system directly
EVB
Link
Realtek BT Development Board Introduction
BLE SoC
Development Environment
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
IV
Realtek Bluetooth Solutions
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Realtek can Provide Bluetooth
SIG Mesh Turnkey Solution
Where to buy RTL8762CMF Mesh EVB
HDK/SDK/MP Tool: all the design materials will release by Realtek’s Anchor
system directly
Mesh SDK support SIG Mesh and ALI/MIOT/Baidu/Amazon Mesh
iOS/Android APP
Update mesh nodes with new firmware image
SIG draft OTA
Background mode
Low speed
Updating over the mesh network(via adv.)
Realtek proprietary OTA
Based GATT connection
High speed
Update old device automatically
MIOT OTA
Support Mijia App
Encoded & More Flash size left for application
SMART HOME SOLUTION INTRODUCTION LINK
Smart speaker with MESH dongle demonstration APP Interface
AdjustmentHome 1
on off
All Device
Control
Control
Control Set up
Set up
Single Device
Group
Group 1
Group 0
Add
Group
Cool Warm
Mesh EVB dongle- RTL8762CMF
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
V
Realtek Bluetooth Solutions
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Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
VI
RTL8762D (BLE SoC)
Evaluation Board
User Manual
V1.0 2021/01/20
Realtek Bluetooth Solutions
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RTL8762D Evaluation Board User Manual
Copyright 2021 Realtek Semiconductor Corporation. All Rights Reserved.
2
Revision History
Date
Version
Amendment
Author
2021/01/20 V1.0 First Draft Sillo Yin
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Contents
Revision History.................................................................................................................................................2
Contents of Tables..............................................................................................................................................4
Contents of Figures.............................................................................................................................................5
1.RTL8762D Evaluation Board Introduction.........................................................................................................6
1.1 RTL8762D EVB introduction ......................................................................................................................6
1.2 Evaluation Board Interface ...........................................................................................................................6
1.2.1 Interface Description..............................................................................................................................6
1.2.2 Main Chip (Module) ..............................................................................................................................7
1.2.3 Power supply .........................................................................................................................................8
1.2.4 IO Port ...................................................................................................................................................9
1.2.5 Interface .................................................................................................................................................9
1.2.6 Others...................................................................................................................................................10
1.2.7 Pin Allocation on Motherboard of Evaluation Board ..........................................................................11
2.Development Board Operation Instructions......................................................................................................14
2.1 Acquiring Log with Onboard USB to UART Converter ............................................................................14
2.2 Current test..................................................................................................................................................14
2.3 6-axis Motion Sensor..................................................................................................................................15
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Contents of Tables
Table 1.1 IO Pin Allocation on Motherboard .......................................................................................................... 11
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Contents of Figures
Figure 1-1 EVB Interface Block Diagram .............................................................................................................. 6
Figure 1-2 EVB Interface Distribution ................................................................................................................... 7
Figure 1-3 Daughter Board ..................................................................................................................................... 7
Figure 1-4 Power jumper ........................................................................................................................................ 8
Figure 1-5 Connection of HCI UART Jumper........................................................................................................ 9
Figure 1-6 Connection of LOG............................................................................................................................... 9
Figure 1-7 G-sensor I2C connection..................................................................................................................... 10
Figure 1-8 Schematic of LED circuit.................................................................................................................... 10
Figure 1-9 Schematic of Keys ...............................................................................................................................11
Figure 2-1 LOG out connection............................................................................................................................ 14
Figure 2-2 Schematic of Power jumpers on EVB................................................................................................. 14
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1. RTL8762D Evaluation Board Introduction
1.1 RTL8762D EVB introduction
This document introduces usage of 8762D Bluetooth® Evaluation Board (EVB) Hardware. 8762D EVB provides
hardware environment for customer to develop their own application, which includes:
1. Voltage converter.
2. 6-axis motion sensor.
3. 4 LEDs and 6 keys.
4. Button battery and Li-ion battery holder.
5. USB to UART converter (FT232RL).
1.2 Evaluation Board Interface
1.2.1 Interface Description
Distribution of EVB block and interface is shown in Figure 1-1 and Figure 1-2.
Figure 1-1 EVB Interface Block Diagram
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P4
P4
P4
Power
IO
LED1_JP
LED/Key
LED0_JP Interface
GND
VCC
RX
FT232_TX
TX
FT232_RX
LOG
GND
GND
M1_2
VBAT
M0_3RST
1V2
M5_6
M1_5M1_6
M3_6
M3_7
M3_4M3_5
M3_2
M3_3
M3_0
M3_1
32KXI_GPIO
32KXO_GPIO
M2_0
M2_1
M2_2M2_3
M2_4
M2_5
M2_6M2_7
MICBIAS
M5_7
KEY2(2_4)
KEY3(2_3)
KEY4(M2_5)
RST
KEY0(M4_0)
KEY1(M4_1)
SWO
RST
GND
IO
CLK
SWD
Interface
VCC
VDDIO
GND
VDDIO
GND
P0_4
M1_0
P4_3
M0_1
P4_3M0_3
P4_0
M1_4
P0_6
M5_0
P0_4
M5_2
P0_2
M5_4
P0_0M1_2
P3_5
M0_6
P3_3
M4_0
M4_1
M4_2
GND
RST
GND
GND
GND
UART
Interface
VDEV_JP PowTest_JP
MICBIAS
UART GND
Interface
MIC_P
MIC_N
LED3_JP LED3(M1_4)
LED2_JP LED2(M1_3)
LED1_JP LED1(M0_2)
LED0_JP LED0(M0_1)
LDO_3V3
VDD_OUT
LDO_2V5
VCR2302
Figure 1-2 EVB Interface Distribution
1.2.2 Main Chip (Module)
Mark 5: Connection socket used to connect daughter board with mother board. Make sure that the orientation of
PCB antenna on daughter board is the same as the silkscreen mark of antenna on mother board. Daughter board is
shown in Figure 1-3.
Figure 1-3 Daughter Board
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1.2.3 Power supply
1) Mark 10: Power supply selection module of motherboard, shown in Figure 1-4.
Figure 1-4 Power jumper
a) 3V3：Powered by USB power source on evaluation board, IC voltage 3.3V.
b) VCR2302: Powered by a CR2302 battery (on the rear)
c) 2V5：Powered by USB on evaluation board, IC voltage is 2.5V, generally used while burning eFUSE.
2) Mark 21: CR2032 battery holder (at the bottom side of PCB)
3) Mark 15: Li-ion battery holder: evaluation board can be powered by Lithium-ion battery.
Note: If EVB is powered by Li-ion battery, jumper cannot be put on mark 10.
4) Mark 13/14: AMS1117 3.3V output and AMS1117 2.5V output LDP chip that provide 5V to 3.3V and 5V to
2.5V voltage conversion circuit when EVB is powered by Li-ion battery.
5) Mark 9: Power G-sensor and SWD VCC. This jumper must be connected during normal operation.
6) Mark 8: Jumper for RTL8762D overall power consumption test. Remove J23 and cascade with an ammeter
when performing overall power consumption test.
Note:
a) J23 must be shorted during normal operation.
b) When performing current measurement, LOG printed must be disabled. UART should be left not
connected and disconnect SWD with debugger to avoid affecting measurement.
c) Under some special circumstance that current measurement at 3V needs to be performed, replace
onboard power supply with external 3V DC power supply.
7) Mark 12: Micro USB 5V power supply. It can be connected to either external 5V power supply or USB port
of PC.
8) Mark 4: GND jumper.
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1.2.4 IO Port
1) Mark 1: 2 × 15 IO Jumper
2) Mark 19: 2 × 14 IO Jumper
1.2.5 Interface
1) Mark 2: MIC Test Jumper for external MIC
2) Mark 3: UART /LOG Test Jumper.
a) Connection of Jumper for HCI UART Test is shown in figure 1-5:
Figure 1-5 Connection of HCI UART Jumper
b) Connection of Jumper for Log Test:
Figure 1-6 Connection of LOG
3) Mark 6: G-sensor, which is a 6-axis motion sensor, is powered by VDD_DEV. Thus, J6 need be connected
when G-sensor is required.
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4) Mark 7: I2C interface of 6-axis motion sensor. Connection of Jumper J18, J19 and J20 is shown in figure 1-7.
If I2C interface is applied, J18 and J19 should be shorted with jumper. That is to say, connect I2C signal line
to M3_2 and M3-3. INT single line can be connected to M2_2 via J20, and can be left not connected if INT
function is not configured.
If SPI interface is applied, R1 need be removed. Connect test point AD0 and nCS to specified IO port with
SDO and nCS jump wire respectively, and then short J18 and J19 with jumper.
Figure 1-7 G-sensor I2C connection
5) Mark 12: Micro USB interface. It can be used as UART communication port when connected to PC.
6) Mark 20: SWD interface used for SWD debug.
1.2.6 Others
1) Mark 16: 4 independent LED used for development of customized application. Confirm that corresponding
jumpers (J24 to J27) are connected properly before develop. Schematic is shown in figure 1-8.
Figure 1-8 Schematic of LED circuit
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2) Mark 17: 4 LED jumpers. When testing power consumption, LED may be lighted up and affect result of test.
Under such circumstance, LED Jumpers should be removed. Default LED configuration is provided in table 1-1.
If customers would like to use IOs that not listed in table 1-1 to control LEDs, LEDs can be connected to specified
IO port with jump wire.
3) Mark 18: RESET key and 5 independent keys, as shown in Figure 1-9.
Note: Debouncing capacitors and internal pull-up resistor make up a filter circuit to reduce ripples when
buttons are pressed. However, it can also affect the result of keyboard array scan. Capacitors are not
mounted on board by default. User can solder 0.1uF capacitor on pads when necessary.
Figure 1-9 Schematic of Keys
4) Mark 11: FT232 chip.
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1.2.7 Pin Allocation on Motherboard of Evaluation Board
When edges of daughter board are flush with the white lines and PCB antenna on daughter board is aligned with
silkscreen mark on motherboard, the pins on daughter board are properly inserted; otherwise it is necessary to be
cautious about improper connection.
Pin allocation of motherboard is listed as follows:
Table 1.1 IO Pin Allocation on Motherboard & Daughterboard
RTL8752
EVB
FunctIOn
RTL8762 RTL8762 DJF RTL8762 RTL8762 RTL8762 EVB
DW DK RTL8762 DDF DGF DKF socket
DJF
P0_0 P0_0 P0_0 P0_0 P0_0 P0_0 M0_0
P0_1 P0_1 P0_1 P0_1 P0_1 P0_1 LED0 M0_1
P0_2 P0_2 P0_2 P0_2 P0_2 P0_2 LED1 M0_2
P0_3 P0_3 P0_3 P0_3 P0_3 P0_3 LOG M0_3
P0_4 P0_4 P0_4 P0_4 P0_4 P0_4 M0_4
P0_5 P0_5 P0_5 P0_5 P0_5 P0_5 M0_5
P0_6 P0_6 P0_6 P0_6 P0_6 P0_6 M0_6
P0_7 P0_7 P0_7 P0_7 P0_7 P0_7 M0_7
P1_0 P1_0 P1_0 P1_0 P1_0 P1_0 SWDIO M1_0
P1_1 P1_1 P1_1 P1_1 P1_1 P1_1 SWDCLK M1_1
P1_2 P1_2 P1_2 P1_2 P1_2 P1_2 M1_2
P1_3 P1_3 P1_3 P1_3 P1_3 P1_3 LED2 M1_3
P1_4 P1_4 P1_4 P1_4 P1_4 P1_4 LED3 M1_4
P1_5 P1_5 P1_5 P1_5 P1_5 P1_5 M1_5
P1_6 P1_6 P1_6 P1_6 P1_6 P1_6 M1_6
P1_7 P1_7 P1_7 P1_7 P1_7 P1_7 M1_7
MICBIAS MICBIAS MICBIAS MICBIAS MICBIAS MICBIAS
MIC_BIA
S
M_MICB
IAS
32k_XI 32k_XI 32k_XI 32k_XI 32k_XI 32k_XI
M_32k_
XI
32k_XO 32k_XO 32k_XO 32k_XO 32k_XO 32k_XO
M_32k_
XO
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P2_0 P2_0 P2_0 P2_0 P2_0 P2_0 M2_0
P2_1 P2_1 P2_1 P2_1 P2_1 P2_1 M2_1
P2_2 P2_2 P2_2 P2_2 P2_2 P2_2
ICM2061
8_INT/C
UT
M2_2
P2_3 P2_3 P2_3 P2_3 P2_3 P2_3 KEY3 M2_3
P2_4 P2_4 P2_4 P2_4 P2_4 P2_4 KEY2 M2_4
P2_5 P2_5 P2_5 P2_5 P2_5 P2_5 M2_5
P2_6 P2_6 P2_6 P2_6 P2_6 P2_6 MIC_N M2_6
P2_7 P2_7 P2_7 P2_7 P2_7 P2_7 MIC_P M2_7
P3_0 P3_0 P3_0 P3_0 P3_0 P3_0
UART_T
X
M3_0
P3_1 P3_1 P3_1 P3_1 P3_1 P3_1
UART_R
X
M3_1
P3_2 P3_2 P3_2 P3_2 P3_2 P3_2 ICM2061 M3_2
8_I2C_S
CL
P3_3 P3_3 P3_3 P3_3 P3_3 P3_3
ICM2061
8_I2C_S
DA
M3_3
P3_4 P3_4 P3_4 P3_4 P3_4 P3_4 M3_4
P3_5 P3_5 P3_5 P3_5 P3_5 P3_5 KEY4 M3_5
P3_6 P3_6 P3_6 P3_6 P3_6 P3_6 M3_6
P4_0 P4_0 P4_0 P4_0 P4_0 P4_0
SPI0_CL
K /
KEY0/SWO
M4_0
P4_1 P4_1 P4_1 P4_1 P4_1 P4_1
SPI0_MI
SO /
KEY1
M4_1
P4_2 P4_2 P4_2 P4_2 P4_2 P4_2
SPI0_M
OSI
M4_2
P4_3 P4_3 P4_3 P4_3 P4_3 P4_3
SPI0_CS
_N
M4_3
P5_0 P5_0 P5_0 P5_0 P5_0 P5_0 P5_0 M5_0
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