Renesas ISL78229EV1Z User manual

USER’S MANUAL
UG065
Rev 1.00
January 6, 2016
ISL78229EV1Z
Evaluation Board User Guide
UG065 Rev 1.00 Page 1 of 32
January 6, 2016
Description
The ISL78229EV1Z board demonstrates the 2-phase
synchronous boost operation and PMBus™ functionalities of
the ISL78229. It verifies the high efficiency of synchronous
boost operation and all the features of the IC including input
Constant Current (CC) control, analog/digital tracking, diode
emulation, phase dropping, PMBus™ functions, etc.
Specifications
This board has been configured and optimized for the following
operating conditions. Refer to “Operating Range” on page 3 for
more detailed descriptions.
• VIN_MIN = 7.5V (or lower, refer to “Operating Range”)
• VIN_TYP = 12V
• VIN_MAX = 30V (typical)
• VOUT = 36V (typical)
•IOUT_MAX=12A(typical)
• IIN_AVG_MAX = 41.5A (typical)
•f
SW = 200kHz
Key Features
• Input/output voltage withstands 55V DC and 60V transients
• Input average Constant Current (CC) control loop
• PWM and analog track functions
• Forced PWM operation with negative current limiting
• External synchronization
• Selectable Continuous Conduction Mode (CCM), Diode
Emulation (DE) and Phase Dropping (PH_DROP) modes
• Comprehensive protections
• Selectable Hiccup or Latch-off fault responses
•I
2C/PMBus™ compatible digital interface to control/monitor
operation parameters
• Boards can be stacked for parallel operations
• Monitoring test points for key signals
References
•ISL78229 Datasheet
•AN1900, “USB to PMBus™ Adapter User Guide”
•PowerNavigator™ Software
•PowerNavigator User Guide
Ordering Information
PART NUMBER DESCRIPTION
ISL78229EV1Z ISL78229 Evaluation Board, ZLUSBEVAL3Z
adapter, USB cable
FIGURE 1. ISL78229EV1Z BLOCK DIAGRAM
ISL78229
BOOT1
PH1
NTC
FB
LG1
UG1
BOOT2
PH2
LG2
UG2
EN
TRACK
SDA
SCL
SALERT
PMBus
signals
ISEN1N
ISEN1P
ISEN2N
ISEN2P
RSEN1
RSEN2
PVCC
VIN PVCC
PGND
DE/PHDRP
HIC/LATCH
ATRK/DTRK
T4: GND
T3: VOUT
T2: GND
T1: VIN
J1
VCC
J29
VCC
J23
J18
VCC
J17
VCC
J7
J50
VCC
VCC
SGND

UG065 Rev 1.00 Page 2 of 32
January 6, 2016
ISL78229EV1Z
ISL78229EV1Z Evaluation Board
FIGURE 2. TOP VIEW OF THE ISL78229EV1Z
FIGURE 3. BOTTOM VIEW OF THE ISL78229EV1Z
J20: PH2- GND
T1: VIN T2: GND
T3: VOUT T4: GND
J29: GND-EN- PIN3
J50: CONNECT TO INTERSIL
J39: OPTIONAL CONNECTOR FOR PMBus™ SIGNALS
J23: GND-DE/PHDRP-VCC
J21: PH1- GND
J56 (PIN 5-12): FOR BOARD STACKING TO CONNECT CONTROL SIGNALS J54: FOR BOARD STACKING TO CONNECT
J55: FOR BOARD STACKING
POWER VOUT AND GND
PMBus™ DONGLE ZLUSBEVAL3Z
POWER VIN AND GND
TO CONNECT
(VIN_UVLO)
J57: FOR BOARD STACK TO CONNECT CONTROL SIGNALS
J52: FOR BOARD STACKING TO CONNECT POWER VIN AND GND
J53: FOR BOARD STACKING TO CONNECT POWER VOUT AND GND

UG065 Rev 1.00 Page 3 of 32
January 6, 2016
ISL78229EV1Z
Recommended Equipment
• 0V to 60V power supply with 45A source current capability
• 0V to 5V power supply with 0.5A source current capability
• Load capable of 20A (or up to 30A)
•Functiongenerator
• 2 to 4 Digital Multimeters (DMM)
• 1 oscilloscope
Functional Description
The ISL78229EV1Z evaluation board pictures are shown in
Figures 2 and 3. The board supports a quick evaluation of various
features of the ISL78229.
The ISL78229EV1Z demonstrates ISL78229 as the controller of
a high efficiency 2-phase synchronous boost.
The ISL78229EV1Z demonstrates the IC’s unique function of
accepting either digital or analog signals for the user to adjust
the reference voltage externally.
The ISL78229EV1Z demonstrates the ISL78229’s unique feature
of average Constant Current (CC) control for the input current. The
board can have the average input current as a controlled constant
without shutdown, which helps the user to optimize the system
with the power devices’ capability that is fully utilized by the
well-controlled constant input current.
The ISL78229EV1Z has connector options to select Continuous
Conduction Mode (CCM), Diode Emulation (DE) and Phase
Dropping (PH_DROP) modes.
Combined with the Intersil PowerNavigator™ Software as the GUI
and the included USB to PMBus™ Adapter (dongle,
ZLUSBEVAL3Z), the user can conveniently evaluate the
ISL78229’s PMBus™ functionalities, which provides access to a
number of useful system control parameters and diagnostic
features.
Two ISL78229EV1Z evaluation boards can be stacked to
demonstrate 2 ICs operating in parallel to control a 4-phase
boost regulator.
Operating Range
• VIN_MIN = 7.5V or lower.
- The board starts up when the input voltage, VIN, rises above
10V and shuts down when VIN falls below 7.5V. This
10V/7.5V input voltage UVLO is determined by the resistor
divider (R36, R37) from the input voltage to the EN pin. These
VIN UVLO thresholds can be modified by changing the
resistor divider values.
- With the ISL78229’s EN pin (through J29’s center pin)
directly controlled by the external supply instead of the VIN
UVLO described above, the board can operate at VIN as low
as 5V to 6V while the output power is limited by IIN_MAX
(41.5A typical, controlled by the input CC control).
• VIN_TYP = 12V
• VIN_MAX = 30V (typical). To keep VOUT regulated at 36V, the
maximum input voltage is typically 30V determined by the
minimum duty cycle.
•V
OUT = 36V (typical)
• IOUT_MAX = 12A (typical at 12V VIN, depending on VIN due to
the IIN_AVG_MAX being 41.5A controlled by the input CC
control)
• IIN_AVG_MAX = 41.5A (typical, controlled by the input CC
control)
•f
SW = 200kHz
• The board is set in CCM mode by default with J23’s Pin 2
(DE/PHDRP) shorted to Pin 3 (GND) by the jumper.
• The board is set to have Hiccup mode as the fault protection
response by default (can be changed via PMBus™) with J18’s
Pin 2 (HIC/LATCH) connected to VCC by the jumper.
• Per phase inductor’s peak current limit is set at 38.5A (OC1:
cycle-by-cycle, continuously switching).
• Per phase inductor’s peak current fault protection is set at
48.5A (OC2_PEAK fault, Hiccup response set by J18’s default
setting).
• The board is set to accept an analog signal as the input (J17’s
Pin 2 (ATRK/DTRK) shorted to VCC by the jumper).
Quick Guide for Configurations
and Test Points
Figures 4 and 5show the schematics of this evaluation board.
The “Bill of Materials”are listed on page 13. The layout
information of the board can be found in Figures 12 through 21.
Table 1 on page 11 shows the detailed descriptions for all the
connectors/monitor pins.
Key signals such as VCC, PVCC, SS, FB, COMP, EN, PGOOD,
CLKOUT, PHx, LGx, etc., are available at the monitoring pins for
easy measurement. Figures 22 through 55 show the
performance data taken with this evaluation board at the default
configurations.
The board setting can be changed by configuring the connection
of the corresponding connectors (header/pin type) or replacing
the resistors and/or capacitors populated on the board. Some
examples are described as follows:
• J23 is for selection of CCM/DE/PH_DROP modes (refer to
Table 2 in the ISL78229 datasheet). The board is set in CCM
mode by default. Do Not short J23 on both sides at the same
time.
- Short J23’s Pin 2 (DE/PHDRP) to VCC with jumper for the DE
mode
- Leave all J23’s 3 pins open for DE plus Phase Dropping
mode
- Short J23’s Pin 2 (DE/PHDRP) to GND for the CCM mode
(default board setting)

UG065 Rev 1.00 Page 4 of 32
January 6, 2016
ISL78229EV1Z
• J18 is for selection of the fault protection response modes
(Hiccup/Latch-off) as the default (can be further changed via
PMBus™). Do Not short J18 on both sides at the same time.
- Short J18’s Pin 2 (HIC/LATCH) to VCC with the jumper for
default Hiccup fault response (default board setting)
- Short J18’s Pin 2 (HIC/LATCH) to GND with the jumper for
default Latch-off fault response
• The switching frequency on the ISL78229EV1Z is fixed at
200kHz. To change the frequency, replace R15, which is
connected between FSYNC and GND. Please refer to the
“Oscillator and Synchronization” section in the ISL78229
datasheet for details. The switching clock can be synchronized
with an external clock source applied at the FSYNC pin
(through J11). The external clock frequency range can be
50kHz to 1.1MHz.
• The output voltage of ISL78229EV1Z is fixed at 36V in default
setting. This can be changed by replacing the feedback resistor
R3or R2. When changing the feedback resistor, the maximum
output current will be changed accordingly because the
maximum input current is controlled to be fixed by input CC.
• The input average CC limit (41.5A typical) can be adjusted by
two methods.
1. Replacing the resistor R1, which is connected to IMON pin.
For the setting of the average CC control, please refer to
“Average Current Sense for 2 Phases - IMON” and “Constant
Current Control (CC)” sections in the ISL78229 datasheet.
2. Via PMBus™ command CC_LIMIT, change the CC control
loop’s reference VREF_CC to different values. Please refer to
“CC_LIMIT (D5h)” command in the ISL78229 datasheet.
• The per phase inductor’s cycle-by-cycle peak current limit
(OC1) can be changed by replacing the current sense resistor
R11 (R12) and/or current sense gain setting resistors R9, R10,
R21, R22 (R7, R8, R19, R20) for the respective phases. Please
refer to “Current Sensing” and “Cycle-by-Cycle Peak
Overcurrent Limiting/Protection” sections in ISL78229
datasheet for details. Note: if these resistors are changed, the
R1may need to be changed accordingly to keep the desired CC
control level.
Quick Start Guide
Setup of Test Equipment
As described in “Recommended Equipment” on page 3, prepare
2 power supplies, 1 electronic load, 2 to 4 DMMs and 1
oscilloscope.
• The first power supply 60V/45A (VIN power supply) will be used
for the VIN power rail.
• The second power supply 5V/0.5A (EN power supply) will be
used to supply bias for EN. This power supply is not necessary
if EN is connected to the VIN resistor divider with J29’s Pin 2
shorted with Pin 3 by the jumper.
• The electronic load (or resistive load) will be used as the load
for VOUT and should have a capability to sink 20A (or up to
30A).
• The DMMs will be used to monitor output voltage, input voltage
and other signals such as PVCC, VCC, IMON, FB, etc. if
interested.
External Connections and Setup Before
Start-Up
• Connect the VIN power supply between VIN (T1) and GND (T2).
Before start-up, typically set the VIN power supply voltage to
12V. The power supply output should remain off before
start-up.
• Connect the EN power supply (if used) between EN and GND
using J29’s pin 2 (EN) and GND (pin 1). Typically, set the EN
power supply voltage in the range of 3V to 5V. The power
supply output should remain off before start-up.
• Connect the electronic load between VOUT (T3) and GND (T4).
Set the electronic load to 0A for the first start-up. The load
should remain off before start-up.
• Place the DMMs appropriately where the signals are to be
measured. The input and output voltage can be measured using
J54 and J30. (Note: To measure the voltage of high current
nodes, it is recommended to use a Kelvin connection to avoid
the effect of parasitic resistances of the connections. These
connections are supplied at J54 and J30.)
• Set the oscilloscope probes to monitor PH1 (J21), PH2 (J20),
VOUT (J30), IMON (J5), or any other signals.
Start-Up and Measurement
On the ISL78229EV1Z, the user can select one of the 3 basic
operation modes of CCM/DE/PH_DROP (refer to Table 2 in the
ISL78229 datasheet) by configuring J23.
1. CCM mode - The ISL78229EV1Z board is set in CCM mode by
default with J23’s Pin 2 (DE/PHDRP) shorted to Pin 3 (GND)
with the jumper.
• Before powering up, keep EN power supply and VIN power
supply outputs off. Keep the electronic load off.
• Set VIN power supply to 12V (or desired voltage). Turn on the
output of VIN power supply.
- Confirm the VIN voltage of the evaluation board is correct.
- Confirm the supply current of VIN power supply is small.
• Enable the output of the EN power supply.
- Confirm the evaluation board output voltage is 36V (typical).
- Confirm the CCM switching pulses at PH1 and PH2. The PH1
(PH2) switching frequency is 200kHz (typical).
• Increase the load to heavy load - Slowly increase the load from
0A to 10A. Keep the input voltage around 12V. The input
current is around 31A. Check to see if PH1/PH2 waveforms
are normal and if VOUT is regulated at 36V.
• Increase the load to CC mode - Continue to slowly increase the
load. At the same time, the user can monitor the IMON pin
voltage using the DMM or Oscilloscope. When the load
increases to around 14A, VOUT starts to drop below 36V (at
around 34.5V) and the IMON pin voltage reaches 1.6V. This
shows the CC loop is working and the input current is
controlled to be fixed at 41.5A (typical). When the load current
continues to increase, the input current is fixed at 41.5A

UG065 Rev 1.00 Page 5 of 32
January 6, 2016
ISL78229EV1Z
(controlled by the CC loop) and the VOUT continues to drop. The
heavier the load, the lower the VOUT, which is the characteristic
of constant power (VIN is kept at 12V fixed and the input
current is controlled at 41.5A fixed).
•Poweroff
-Turnofftheloadto0A
- Turn off the EN power supply
- Power down VIN power supply
2. DE mode plus Phase Drop mode - Remove the jumper at J23
and keep J23 open. The ISL78229’s DE/PHDRP pin is floating
and the IC is set in DE+PH_DROP mode.
• Enable the system and repeat the procedures in Step 1.
• Confirm the input voltage, output voltage, load current and
operation mode.
- At no load, only Phase 1 is switching and it is pulse skipping.
Phase 2 is dropped and not switching.
- When the load increases to a level when the IMON voltage is
higher than 1.15V, Phase 2 is added and switching.
- CC control at overloading has the same scenario described
in Step 1.
3. DE mode - Short J23’s Pin 2 (DE/PHDRP) and Pin 3 (VCC) with
a jumper to set the IC in DE Mode. Leave J23 Pin 1 (GND)
floating.
• Enable the system and repeat the procedures in Step 1.
• Confirm the input voltage, output voltage, load current and
operation mode.
- At no load, either Phase 1, or Phase 2, or both is/are
switching at Discontinuous Conduction Mode (DCM) and
pulse skipping.
- When the load increases from 0 to a certain light load, both
Phase 1 and Phase 2 are switching at DCM mode.
- When the load is higher than a certain level (inductor current
is higher than the boundary current between DCM and CCM),
Phase 1 and Phase 2 will be switching at CCM mode.
- CC control at overloading has the same scenario described
in Step 1.

UG065 Rev 1.00 Page 6 of 32 January 6, 2016
ISL78229EV1Z
ISL78229EV1Z Schematic
FIGURE 4. ISL78229EV1Z BOARD SCHEMATIC - PAGE 1
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TIM KLEMANN 08/11/2015
OPTIONAL CONNECTOR FOR PMBUS SIGNALS
HEADER CONNECTOR ON TOP
OPTIONAL INDUCTOR FOOTPRINTS
OPTIONAL INDUCTOR FOOTPRINTS
PHASE1
PHASE2
SOCKET CONNECTOR ON BOTTOM
CONNECTOR FOR INTERSIL PMBUS DONGLE - ZLUSBEVAL3Z
OUT
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BOOT2
SLOPE
SDA
SALERT
NTC
IMON
TRACK
FB
COMP
SS
ADDR1
PGOOD
FSYNC
EP
SCL
UG2
PH2
LG2
PGND
PH1
LG1
UG1
BOOT1
SGND
DE/PHDRP
RBLANK
PLLCOMP EN CLKOUT VIN
ISEN1N
ISEN1P
ISEN2N
ISEN2P
NC
HIC/LATCH
ATRK/DTRK
RDT
U1
ISL78229ARZ
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ADDR2
ATRK/DTRK
BOOT1BOOT2
CLKOUT
CLKOUT
CLKOUT
COMP
COMP
COMP
DE/PHDRP
EN
EN
EN
EN
FB
FB
FB
FSYNC
FSYNC
GND
GND
GND
GND
GND
HIC/LATCH
IMON
IMON
IMON
ISEN1N
ISEN1P
ISEN2N
ISEN2N
ISEN2P
ISEN2P
LG1
LG1
LG2
LG2
NTC
PGOOD
PH1
PH1
PH2
PH2
PH2
PLL_COMP
PVCC
PVCC
RBLANK
SALERT
SALERT
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SCL
SCL
SCL
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UNNAMED_1_CONN12_I48 0_IN1
UNNAMED_1_ISL7 8229_I433_1
UNNAMED_1_ISL78229_I433_31UNNAMED_1_ISL78229_I433_39
UNNAMED_1_JUMPER2_I 337_IN1UNNAMED_1_JUMPER2_I 337_IN2
UNNAMED_1_JUMPER2_I 338_IN2
UNNAMED_1_JUMPER3_I 384_IN2
UNNAMED_1_JUMPER3_I411_IN3
UNNAMED_1_NCHANNEL_ I173_G
UNNAMED_1_NCHANNEL_ I186_G
UNNAMED_1_NCHANNEL_I189_G
UNNAMED_1_NCHANNEL_ I191_G
UNNAMED_1_NCHANNEL_ I302_G
UNNAMED_1_NCHANNEL_I303_G
UNNAMED_1_NCHANNEL_ I305_G
UNNAMED_1_NCHANNEL_I306_G
UNNAMED_1_POWERIND_I199_A
UNNAMED_1_POWERIND_I207_A
UNNAMED_1_SMCAP_I142_A
UNNAMED_1_SMCAP_I1 43_A UNNAMED_1_SMCAP_I156_B
UNNAMED_1_SMCAP_I198_A
UNNAMED_1_SMCAP_I201_A
UNNAMED_1_SMCAP_I2 05_B
UNNAMED_1_SMCAP_I230_B
UNNAMED_1_SMCAP_I4 46_A
UNNAMED_1_SMCAP_I449_A
UNNAMED_1_SMCAP_I55_A
UNNAMED_1_SMRES_I434_B
VCC VCC VCC
VCC
VCC
VCC
VCC
VCC
VI2C_EXT
VI2C_EXT
VI2C_EXT
VIN
VIN
VOUT
VOUT

UG065 Rev 1.00 Page 7 of 32 January 6, 2016
ISL78229EV1Z
FIGURE 5. ISL78229EV1Z BOARD SCHEMATIC - PAGE 2
ISL78229EV1Z Schematic (Continued)
IN
IN
IN
IN
78
43
2
20
18
16
14
1
13
15
17
19
11
9
65
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7 8
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17 18
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18
16
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13
11
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4
6
8
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16
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12
10
7
J53
ESQ-108-33-L-D
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
3
5
15
13
11
12
4
6
8
9
16
14
12
10
7
J55
TSM-108-03-L-DV
1 2
3 4
5 6
7 8
910
11 12
13 14
15 16
GND
GND
VIN VOUT

UG065 Rev 1.00 Page 8 of 32
January 6, 2016
ISL78229EV1Z
Stack Two Boards for Parallel
Operation
Two ISL78229EV1Z boards can be stacked. This allows for two
ISL78229s to operate in parallel achievng a 4-phase interleaved
boost regulator.
The ISL78229EV1Z has connectors to stack multiple boards for
parallel operation. Figures 6 and 7show two ISL78229EV1Z
boards stacked. To stack two boards properly, align the two
boards with one on top of the other, and plug in the 3 groups of
connectors described in the following (first 3 bullet points).
Directions for stacking board #1 on top of board #2:
• Plug board #2’s J54 (header/pin type, on board top) into board
#1’s J52 (socket type, on board bottom) to connect both
boards’ inputs together.
• Plug board #2’s J55 (header/pin type, on board top) into board
#1’s J53 (socket type, on board bottom) to connect both
boards’ outputs together.
• Plug board #2’s J56’s Pins 5-12 (header/pin type, on board
top) into board #1’s J57 (socket type, 8 pins, on board bottom)
to connect both boards’ signals needed for the boards’ parallel
operation, e.g., TRACK, GND, EN, SS, IMON, FB and COMP
signals.
• Short board #1’s J56’s Pin 3 and Pin 4 with the jumper to
connect board #1’s CLKOUT signal to the board #2’s FSYNC
input.
• Short board #2’s J56’s Pin 1 and Pin 2 with the jumper to
connect board #2’s FSYNC input to the board #1’s CLKOUT
signal.
•Externalsetup:
- Connect the input VIN power supply to T1/T2 of both boards.
- Connect the load to T3/T4 of both boards. Since both
boards’ EN pin signals are tied together, only one external
EN power supply (3V to 5V) is needed for enable/disable
through J29’s Pins 1-2 of top board.
•PowerUp:
- Keep EN power supply off.
- Turn on the VIN power supply.
- Then turn on the EN power supply.
•PowerDown:
- Turn off the EN power supply.
- Then turn off the VIN power supply.
FIGURE 6. STACK TWO ISL78229EV1Z FOR PARALLEL OPERATION TO ACHIEVE 4-PHASE INTERLEAVED BOOST REGULATOR (VIEW FROM
INPUTS SIDE)
FIGURE 7. STACK TWO ISL78229EV1Z FOR PARALLEL OPERATION TO ACHIEVE 4-PHASE INTERLEAVED BOOST REGULATOR (VIEW FROM
OUTPUTS SIDE)
Bottom board’s J56’s Pins 5-12 (header/pin type)
Bottom board’s J54 (header/pin type) plugged
both boards’ power inputs (VIN and GND) together.
to connect both boards’ connect control signals
Short one board’s (top board) J56’s Pin 3 and Pin 4
Short one board (bottom board) J56’s Pin 1 and Pin 2
with jumper to connect its CLKOUT signal to the
other board’s FSYNC input.
with jumper to connect its FSYNC input to the other
board’s CLKOUT signal.
plugged into top board’s J57 (socket type)
Connect EN power supply (3V to 5V) to top board’s J29’s
Pin 2 (EN) and Pin 1 (GND) to enable/disable the boards.
Note: Remove both boards’ default jumpers at J29’s
Pin 2 to Pin 3.
into top board’s J52 (socket type) to connect
Bottom board’s J55 (header/pin type) plugged
connect both boards’ power
into top board’s J53 (socket type) to
outputs (VOUT and GND) together.

UG065 Rev 1.00 Page 9 of 32
January 6, 2016
ISL78229EV1Z
Evaluate PMBus™ Functions
The ISL78229EV1Z can demonstrate all the ISL78229’s
PMBus™ functions with Intersil’s PMBus™ evaluation software,
PowerNavigator™ GUI and the included ZLUSBEVAL3Z dongle
(USB-to-PMBus™ adapter board).
Hardware Setup
Figures 8 and 9show the setup of the ISL78229EV1Z connected
with the ZLUSBEVAL3Z dongle (user guide available as AN1900).
• Connect the included ZLUSBEVAL3Z dongle to
ISL78229EV1Z’s J50 as Figure 8 shows.
• With the included USB cable, connect the ZLUSBEVAL3Z
dongle to the host PC
Software Setup
The PowerNavigator™ evaluation software can operate in
Windows XP, 7 or 8 operating systems. Install the evaluation
software from the following Intersil website:
http://www.intersil.com/powernavigator
Refer to PowerNavigator User Guide to see instructions how to
use th GUI. Also PowerNavigator™ tutorial videos are available on
the Intersil website. www.intersil.com/powernavigator
Note the GUI is designed to support most of the Intersil parts with
PMBus™ functions. Some of the GUI features and PMBus™
functions are not supported by ISL78229. Only use the ISL78229
related features.
FIGURE 8. ISL78229EV1Z CONNECTED TO INTERSIL DONGLE FOR GUI (TOP VIEW)
CONNECT THE ZLUSBEVAL3Z DONGLE TO J50 OF THE ISL78229EV1Z
CONNECT THE ZLUSBEVAL3Z DONGLE CABLE TO HOST PC
FIGURE 9. ISL78229EV1Z CONNECTED TO INTERSIL DONGLE FOR GUI (BOTTOM VIEW)

UG065 Rev 1.00 Page 10 of 32
January 6, 2016
ISL78229EV1Z
PROCEDURE TO OPERATE THE PMBUS™ DEMO
1. Install PowerNavigator™ software to the host PC from the
following Intersil website: www.intersil.com/powernavigator
2. Connect the ZLUSBEVAL3Z dongle to the ISL78229EV1Z
board as described in “Hardware Setup” on page 9.
3. Connect supplied USB cable from the host PC’s USB port to
the ZLUSBEVAL3Z dongle as described in “Hardware Setup”
on page 9.
4. Set the VIN power supply and the EN power supply output to
off (Refer to “Setup of Test Equipment” on page 4 for the
mentioned power supplies). Keep the electronic load off.
5. Connect the VIN power supply between VIN (T1) and GND (T2).
6. Connect the EN power supply (if used, typically 3V to 5V)
between EN and GND using J29’s Pin 2 (EN) and Pin 1 (GND).
7. Connect the electronic load between VOUT (T3) and GND (T4).
8. Set the VIN power supply to 12V (or desired voltage). Turn on
the output of the VIN power supply. Keep the EN power supply
output off.
9. Enable the output of the EN power supply. Confirm the
ISL78229EV1Z board output is regulated at 36V.
10. Launch the PowerNavigator™ software.
11. Monitor and configure the ISL78229EV1Z board using the
PMBus™ commands in the evaluation software.
PCB Layout Guidelines
For a DC/DC converter design, the PCB layout is very important to
ensure the desired performance.
1. Place input ceramic capacitors as close as possible to the IC's
VIN and PGND/SGND pins.
2. Place the output ceramic capacitors as close as possible to
the power MOSFET. Keep this loop (output ceramic capacitor
and MOSFETs for each phase) as small as possible to reduce
voltage spikes induced by the trace parasitic inductances
when MOSFETs are switching ON and OFF.
3. Place the output aluminum capacitors close to power
MOSFETs also.
4. Keep the phase node copper area small but large enough to
handle the load current.
5. Place the input aluminum and some ceramic capacitors close
to the input inductors and power MOSFETs.
6. Place multiple vias under the thermal pad of the IC. The
thermal pad should be connected to the ground copper plane
with as large an area as possible in multiple layers to
effectively reduce the thermal impedance. Figure 10 shows
the layout example for vias in the IC bottom pad.
7. Place the 10µF decoupling ceramic capacitor at the PVCC pin
and as close as possible to the IC. Put multiple vias close to
the ground pad of this capacitor.
8. Place the 1µF decoupling ceramic capacitor at the VCC pin
and as close as possible to the IC. Put multiple vias close to
the ground pad of this capacitor.
9. Keep the bootstrap capacitor as close as possible to the IC.
10. Keep the driver traces as short as possible and with relatively
large width (25 mil to 40 mil is recommended) and avoid
using via or minimal number of vias in the driver path to
achieve the lowest impedance.
11. Place the current sense setting resistors and the filter
capacitor (shown as RSETxB, RBIASxB and CISENx in the
ISL78229 datasheet) as close as possible to the IC. Keep
each pair of the traces close to each other to avoid undesired
switching noise injections.
12. The current sensing traces must be laid out very carefully
since they carry tiny signals with only tens of mV.
13. For the current sensing traces close to the power sense
resistor (RSENx), the layout pattern shown in Figure 11 is
recommended. Assuming the RSENx is placed in the top layer
(red), route one current sense connection from the middle of
one RSENx pad in the top layer under the resistor (red trace).
For the other current sensing trace, from the middle of the
other pad on RSENx in top layer, after a short distance, via
down to the second layer and route this trace right under the
top layer current sense trace.
14. Keep the current sensing traces far from the noisy traces like
gate driving traces (LGx, UGx and PHx), phase nodes in power
stage, BOOTx signals, output switching pulse currents, driving
bias traces and input inductor ripple current signals, etc.
FIGURE 10. RECOMMENDED LAYOUT PATTERN FOR VIAS IN THE
IC BOTTOM PAD
FIGURE 11. RECOMMENDED LAYOUT PATTERN FOR CURRENT
SENSE TRACES REGULATOR

UG065 Rev 1.00 Page 11 of 32
January 6, 2016
ISL78229EV1Z
TABLE 1. CONNECTOR/MONITOR-PIN DESCRIPTIONS
CONNECTOR
/TEST POINT SIGNAL NAME DESCRIPTION
T1 VIN Positive power input terminal for the boost regulator input.
T2 GND Power ground input terminal for the boost regulator input.
T3 VOUT Positive power output terminal for the boost regulator output.
T4 GND Power ground output terminal for the boost regulator output.
J1 VIN, VIN_PIN Short with jumper to connect input voltage to the ISL78229 IC VIN pin.
J5 GND - IMON Test point to monitor the IMON voltage.
A jumper can be added to short the IMON pin to ground to disable the constant current
limit (41.5A typical).
To adjust the constant current control level, replace resistor (R1) between IMON and GND.
J7 GND (Pin 1), TRACK (Pin 2), VCC (Pin 3) Pin 2 is for monitoring TRACK voltage. It can also be used to inject a tracking reference
signal to the TRACK pin.
When the TRACK function is not used, short Pin 2 (TRACK) and Pin 2 (VCC) with the
jumper. Do Not short both sides at the same time.
J8 GND, FB Test point to monitor FB voltage (Do Not short with jumper).
J9 GND, PGOOD Test point to monitor PGOOD voltage.
J10 GND, VCC Test point to monitor VCC voltage (Do Not short with jumper).
J11 GND, FSYNC External synchronization clock input terminal or test point for the FSYNC pin voltage (Do
Not short with jumper).
J12 GND (Pin 1), ADDR1 (Pin 2), VCC (Pin 3) PMBus™ Address setting pins to pull ADDR1 to ground or VCC (Do Not short both sides at
the same time).
J13 SLOPE, GND Test point to monitor IMON voltage (Do Not short with jumper).
J14 GND (Pin 1), ADDR2 (Pin 2), VCC (Pin 3) PMBus™ Address setting pins to pull ADDR2 to ground or VCC (Do Not short both sides at
the same time).
J15 Test points to monitor Phase 2 current sense input signals.
J16 Test points to monitor Phase 1 current sense input signals.
J17 VCC (Pin 1), ATRK/DTRK (Pin 2), GND (Pin 3) TRACK input mode (analog tracking or digital tracking input) selection pins. Connect to
VCC with jumper for analog tracking input or short to GND for digital tracking input (Do
Not short both sides at the same time).
J18 VCC (Pin 1), HIC/LATCH (Pin 2), GND (Pin 3) Default fault protection response mode (Hiccup/Latch-off) selection pins. Connect to VCC
with jumper for Hiccup fault response as default or short to GND for Latch-off fault
response as default (Do Not short both sides at the same time).
J19 RDT, GND Test point to monitor the RDT voltage (Do Not short with jumper).
J20 GND, PH2 Test point to monitor the PH2 waveform (Do Not short with jumper).
J21 GND, PH1 Test point to monitor the PH1 waveform (Do Not short with jumper).
J22 GND, NTC Test point to monitor the NTC voltage. Do Not short with jumper (shorting to ground will
trigger a NTC fault protection).
J23 VCC (Pin 1), DE/PHDRP (Pin 2), GND (Pin 3) CCM/DE/PH_DROP modes selection pins. Connect to VCC with jumper for DE mode;
Leave all the 3 pins open for DE plus Phase Dropping mode; Short to GND for CCM mode
(Do Not short both sides at the same time).
J24 GND, LG2 Test point to monitor the LG2 waveform (Do Not short with jumper).
J25 GND, LG1 Test point to monitor the LG1 waveform (Do Not short with jumper).
J26 GND, BOOT2 Test point to monitor the BOOT2 waveform (Do Not short with jumper).
J27 GND, BOOT1 Test point to monitor the BOOT1 waveform (Do Not short with jumper).
J28 GND, RBLANK Test point to monitor RBLANK voltage (Do Not short with jumper).

UG065 Rev 1.00 Page 12 of 32
January 6, 2016
ISL78229EV1Z
J29 GND (Pin 1), EN (Pin 2), Pin 3 (For VIN_UVLO) Enable/Disable options.
Pin 2 (EN) can be used to apply external signal to enable and disable the IC.
To connect Pin 2 (EN) to Pin 3 with jumper connects the resistor divider (R36, R37, dividing
input voltage) output to the EN pin, in such a way the part has an input voltage UVLO. The
board starts up when input voltage VIN > 10V and shuts down when VIN < 7.5V. This
10V/7.5V VIN UVLO setting can be changed by changing the resistor divider values. Do Not
short both sides at the same time.
J30 GND, VOUT Test point to monitor output voltage VOUT (Do Not short with jumper).
J31 COMP, GND Test point to monitor COMP voltage (Do Not short with jumper).
J32 GND, PLLCOMP Test point to monitor PLLCOMP voltage (Do Not short with jumper).
J34 PH2, UG2 Test point to monitor UG2-PH2 voltage waveforms (Do Not short with jumper). Differential
voltage probe is required to monitor UG2-PH2 waveforms.
J35 PH1, UG1 Test point to monitor UG1-PH1 voltage waveforms (Do Not short with jumper). Differential
voltage probe is required to monitor UG1-PH1 waveforms.
J37 GND, PVCC Test point to monitor PVCC voltage (Do Not short with jumper).
J39 Optional connector for PMBus™ signals.
J40 GND, CLKOUT Test point to monitor CLKOUT voltage (Do Not short with jumper).
J50 Connector to connect to Intersil PMBus™ dongle ZLUSBEVAL3Z.
J51 VI2C_EX (Pin 1), Pin 2, VCC (Pin 3) PMBus™/I2C bus pull-up options. Connect Pin 2 to Pin 3 (VCC) with the jumper to pull up
the I2C bus with VCC voltage. Connect Pin 2 to Pin 1 (VI2C_EX) with the jumper to pull up
the I2C bus with externally available voltage VI2C_EX. Do Not short both sides at the same
time.
J52 VIN, GND Socket type connector for power input used to stack boards. It is plugged in by J54
(header/pin type connector) of the other board.
J53 VOUT, GND Socket type connector for power output used to stack boards. It is plugged in by J55
(header/pin type connector) of the other board.
J54 VIN, GND Header/pin type connector for power input used to stack boards. It is plugged to J52
(socket type connector) of the other board. Pins 1-10: VIN, Pins 11-20: GND.
J55 VOUT, GND Header/pin type connector for power output used to stack boards. It is plugged in by J53
(socket type connector) of the other board. Pins 1-8: VOUT, Pins 9-16: GND.
J56 Pin 1: FSYNC if Pin 1 and Pin 2 shorted by
jumper; CLKOUT if Pin 3 and Pin 4 shorted by
jumper.
Pin 2: FSYNC
Pin 3: FSYNC if Pin 1 and Pin 2 shorted by
jumper; CLKOUT if Pin 3 and Pin 4 shorted by
jumper.
Pin 4: CLKOUT
Pin 5: FSYNC if Pin 1 and Pin 2 shorted by
jumper; CLKOUT if Pin 3 and Pin 4 shorted by
jumper.
Pin 6: TRACK
Pin 7: EN
Pin 8: GND
Pin 9: IMON
Pin 10: SS
Pin 11: COMP
Pin 12: FB
Header/pin type connector on board top side for connections of signals needed for the
boards’ parallel operation. Its Pins 5-12 are used to plug into another board’s J57 (socket
type connector, 8 pins) with both boards stacked. Check the description in J57 for details.
TABLE 1. CONNECTOR/MONITOR-PIN DESCRIPTIONS (Continued)
CONNECTOR
/TEST POINT SIGNAL NAME DESCRIPTION

UG065 Rev 1.00 Page 13 of 32
January 6, 2016
ISL78229EV1Z
J57 Pin 1: TRACK
Pin 2: FSYNC if J56 Pin 1 and Pin 2 shorted
by jumper; CLKOUT if J56 Pin 3 and Pin 4
shorted by jumper.
Pin 3: GND
Pin 4: EN
Pin 5: SS
Pin 6: IMON
Pin 7: FB
Pin 8: COMP
Socket type connector on the board’s bottom side for connections of the signals needed
for the boards’ parallel operation. With it being plugged by Pins 5-12 of J56 (header/pin
type connector) of the other board, the two boards’ signals of TRACK, GND, EN, SS, IMON,
FB and COMP are connected respectively.
With board #1, J56 Pin 3 and Pin 4 are shorted by the jumper, and board #2 J56 Pin 1
and Pin 2 are shorted by the jumper, board #1 CLKOUT is connected to board #2 FSYNC.
With board #1, J56 Pin 1 and Pin 2 are shorted by the jumper, and board #2 J56 Pin 3
and Pin 4 are shorted by the jumper, board #2 CLKOUT is connected to board #1 FSYNC.
TABLE 1. CONNECTOR/MONITOR-PIN DESCRIPTIONS (Continued)
CONNECTOR
/TEST POINT SIGNAL NAME DESCRIPTION
Bill of Materials
REFERENCE
DESIGNATOR
MANUFACTURER
PART NUMBER MANUFACTURER DESCRIPTION
C1, C7, C32-C35 EKZE800ELL221MK20S UNITED CHEMI-CON Capacitor, Alum. Electrolytic, RADIAL, 12.5x20, 220µF, 80V, 20%,
ROHS
C10 Various Various Capacitor, Ceramic, SMD, 0603, 0.022µF, 50V,10%, X7R, ROHS
C11 Various Various Capacitor, Ceramic, SMD, 0603, 0.015µF, 50V, 10%, X7R, ROHS
C14, C16 Various Various Capacitor, Ceramic, SMD, 0603, 200pF, 50V, 10%, NP0, ROHS
C15 Various Various Capacitor, Ceramic, SMD, 0603, 1.0µF, 16V, 10%, X7R, ROHS
C2, C4, C6, C9, C37-C44 Various Various Capacitor, Ceramic, SMD, 1206, 1µF, 100V, 10%, X7R, ROHS
C20, C31, C36, C45-C49,
C52
Various Various Capacitor, Ceramic, SMD, 0805, 0.1µF, 100V, 10%, X7R, ROHS
C21, C53 Various Various Capacitor, Ceramic, SMD, 0603, 0.022µF, 100V, 10%, X7R, ROHS
C22, C24 Various Various Capacitor, Ceramic, SMD, 0603, 0.47µF, 16V, 10%, X7R, ROHS
C23, C54 Various Various Capacitor, Ceramic, SMD, 0603, 1000pF, 50V, 10%, X7R, ROHS
C25 Various Various Capacitor, Ceramic, SMD, 0603, 6800pF, 50V, 10%, X7R, ROHS
C26, C51 Various Various Capacitor, Ceramic, SMD, 0805, 10µF, 6.3V, 10%, X5R, ROHS
C3, C8, C17 Various Various Capacitor, Ceramic, SMD, 0603, 0.1µF, 50V, 10%, X7R, ROHS
C5, C27-C30 Various Various Capacitor, Ceramic, SMD, 0603, DNP-PLACE HOLDER, ROHS
C50 Various Various Capacitor, Ceramic, SMD, 0603, 100pF, 50V, 5%, C0G, ROHS
D1, D2 V12P10-M3/86A VISHAY Diode-Schottky, SMD, TO-277A(SMPC), 100V, 12A, ROHS
D3, D4 BAT46W-E3-08 DIODES INC. Diode-Schottky, SMD, SOD-123, 100V, 0.15A, ROHS
Four corners PMSSS 440 0025 PH BUILDING FASTENERS SCREW, 4-40x1/4in, PHILLIPS, PANHEAD, STAINLESS, ROHS
Four corners 2204 KEYSTONE STANDOFF, 4-40x3/4in, HEX, ALUMINUM, 0.25 OD, ROHS
J1, J5, J8-J11, J13, J15, J16,
J19-J22, J24-J28, J30-J32,
J34, J35, J37, J40
69190-202HLF BERG/FCI Connector-Header, 1x2, RETENTIVE, 2.54mm Pitch, ROHS
J39 22-11-2042 MOLEX Connector-Header, 1x4, SOLID, 2.54mm Pitch, VERTICAL, FRICTION
LOCK, GOLD
J50 TSW-103-08-T-D-RA SAMTEC Connector-Header, 2x3, BRKAWY, 2.54mm Pitch, TIN, RIGHT ANGLE,
ROHS
J52 ESQ-110-33-L-D SAMTEC Connector-Socket, ELEVATED, Through-Hole, 2x10, DUALROW,
2.54mm Pitch, ROHS

UG065 Rev 1.00 Page 14 of 32
January 6, 2016
ISL78229EV1Z
J53 ESQ-108-33-L-D SAMTEC Connector-Socket, ELEVATED, Through-Hole, 2x8, DUALROW,
2.54mm Pitch, ROHS
J54 TSM-110-03-L-DV SAMTEC Connector-Header, SMD, 2x10, 2.54mm Pitch, VERTICAL, ROHS
J55 TSM-108-03-L-DV SAMTEC Connector-Header, SMD, 2x8, 2.54mm Pitch, VERTICAL, ROHS
J56 TSM-106-03-L-DV SAMTEC Connector-Header, SMD, 2x6, 2.54mm Pitch, VERTICAL, ROHS
J57 ESQ-104-33-L-D SAMTEC Connector-Socket, ELEVATED, Through-Hole, 2x4, DUALROW, 2.54mm
Pitch, ROHS
J7, J12, J14, J17, J18, J23,
J29, J51
68000-236HLF BERG/FCI Connector-Header, 1x3, BREAKAWAY, 1x36, 2.54mm Pitch, ROHS
Jumpers shorting:
J1,
J12-Pins 1-2,
J14-Pins 1-2,
J17-Pins 1-2,
J18-Pins 1-2,
J23-Pins 2-3,
J29-Pins 2-3
SPC02SYAN SULLINS Connector-Jumper, SHORTING, 2-PIN, BLACK, GOLD, ROHS
L1, L2 SER2915H-472KLB COILCRAFT Power Inductor, SMD, 27x19.1, 4.7µH, 20%, 1.8mΩ, ROHS
L11, L12, L21, L22 Power Inductor, SMD, DNP-PLACE HOLDER
Q1-Q8 BUK9Y6R0-60E NXP SEMICONDUCTOR Transistor-MOSFET, N-CHANNEL, SMD, 56LFPAK, 60V, 100A, 6mΩ,
ROHS
R1 Various Various Resistor, SMD, 0603, 57.6kΩ, 1%, ROHS
R11, R12 WSLP25121L000FEA VISHAY/DALE Resistor, Current Sense, SMD, 2512, 0.001Ω, 3W, 1%, ROHS
R13 Various Various Resistor, SMD, 0603, 36kΩ, 1%, ROHS
R14 Various Various Resistor, SMD, 0603, 10Ω, 1%, ROHS
R15 Various Various Resistor, SMD, 0603, 61.9kΩ, 1%, ROHS
R2 Various Various Resistor, SMD, 0603, 97.6kΩ, 1%, ROHS
R23 Various Various Resistor, SMD, 0603, 20kΩ, 1%, ROHS
R28 Various Various Resistor, SMD, 0603, 100kΩ, 1%, ROHS
R29 NTCS0805E3474FXT VISHAY/BC
COMPONENTS
Thermistor-NTC, SMD, 0805, 470k, 0.21W, 1%, B = 4025k, ROHS
R3 Various Various Resistor, SMD, 0603, 4.53kΩ, 1%, ROHS
R30, R31, R35, R38 Various Various Resistor, SMD, 0603, 3Ω, 1%, ROHS
R32 Various Various Resistor, SMD, 0603, 40.2kΩ, 1%, ROHS
R33, R34 Various Various Resistor, SMD, 0603, 1.5Ω, 1%, ROHS
R36 Various Various Resistor, SMD, 0603, 200kΩ, 1%, ROHS
R37 Various Various Resistor, SMD, 0603, 27.4kΩ, 1%, ROHS
R39 Various Various Resistor, SMD, 0603, 3.24kΩ, 1%, ROHS
R4 Resistor, SMD, 0603, DNP-PLACE HOLDER
R40-R43 Various Various Resistor, SMD, 0603, 0Ω, ROHS
R44, R45, R46, R47 Resistor, SMD, 1206, DNP-PLACE HOLDER
R48 Various Various Resistor, SMD, 0603, 5.11Ω, 1%, ROHS
R5 Various Various Resistor, SMD, 0603, 3.3kΩ, 1%, ROHS
Bill of Materials (Continued)
REFERENCE
DESIGNATOR
MANUFACTURER
PART NUMBER MANUFACTURER DESCRIPTION

UG065 Rev 1.00 Page 15 of 32
January 6, 2016
ISL78229EV1Z
R6, R16, R17, R18 Various Various Resistor, SMD, 0603, 10kΩ, 1%, ROHS
R7, R9, R19, R21 Various Various Resistor, SMD, 0603, 51.1Ω, 1%, ROHS
R8, R10, R20, R22 Various Various Resistor, SMD, 0603, 432Ω, 1%, ROHS
T1, T3 8199-2 KEYSTONE Connector, Screw Terminal, Through-Hole, SNAP-IN, 30A, RED,
BRASS, ROHS
T2, T4 8199-3 KEYSTONE Connector, Screw Terminal, Through-Hole, SNAP-IN, 30A, BLACK,
BRASS, ROHS
U1 ISL78229ARZ INTERSIL IC-2 Phase Boost Controller, 40-Pin, WFQFN, 6x6, ROHS
ISL78229EV1ZREVEPCB PCB, ROHS
Bill of Materials (Continued)
REFERENCE
DESIGNATOR
MANUFACTURER
PART NUMBER MANUFACTURER DESCRIPTION

UG065 Rev 1.00 Page 16 of 32
January 6, 2016
ISL78229EV1Z
Board Layout
FIGURE 12. TOP COMPONENT ASSEMBLY

UG065 Rev 1.00 Page 17 of 32
January 6, 2016
ISL78229EV1Z
FIGURE 13. TOP SILKSCREEN AND PIN PADS
Board Layout (Continued)

UG065 Rev 1.00 Page 18 of 32
January 6, 2016
ISL78229EV1Z
FIGURE 14. TOP LAYER
Board Layout (Continued)

UG065 Rev 1.00 Page 19 of 32
January 6, 2016
ISL78229EV1Z
FIGURE 15. 2nd LAYER
Board Layout (Continued)

UG065 Rev 1.00 Page 20 of 32
January 6, 2016
ISL78229EV1Z
FIGURE 16. 3rd LAYER
Board Layout (Continued)