RTP 3000/06 User manual

Technical Manual
3000/06
Node Processor

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© 2002 - 2018 RTP Corporation
Specifications, information and graphics are subject to change without notice. Contact RTP’s
corporate office for specifics regarding any changes.
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Corp.
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of RTP Corp. unless otherwise indicated and are to be considered RTP Corp. confidential. This
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RTP Corporation
2832 Center Port Circle
Pompano Beach, FL 33064
Phone: [phone]
Internet: http://www.rtpcorp.com
Last Updated: 4/4/2018

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TABLE OF CONTENTS
INTRODUCTION........................................................................................4
SPECIFICATIONS.....................................................................................6
FAILURE RATES IN ACCORDANCE TO IEC 61508 ...............................8
HARDWARE CONFIGURATION...............................................................9
Switches........................................................................................................9
Cabling ..........................................................................................................9
SOFTWARE CONFIGURATION..............................................................12
Editing the Configuration File.......................................................................12
Configuration Parameters............................................................................14
ipaddress, ipaddress_b, ipaddress_c, ipaddress_d................................14
Subnetmask...........................................................................................15
Scan cycle..............................................................................................15
Nodenum...............................................................................................15
Maxconn ................................................................................................15
Peer alltime............................................................................................16
Ip route...................................................................................................16
Maxpgm.................................................................................................16
Udl mem.................................................................................................17
Host activity max....................................................................................17
Tcp min rt timeout ..................................................................................17
Dsvc max points.....................................................................................17
Id_a, id_b, id_c, id_d..............................................................................17
redundant...............................................................................................17
Firmware Upgrades .....................................................................................18
Firmware Upgrade Order .......................................................................18
Firmware Upgrade Procedure................................................................18
NetArrays Configuration...............................................................................19
I/O Configuration....................................................................................19
Diagnostic Information............................................................................23
Device Status Window.................................................................................26
COMPLIANCE WITH CE MARK .............................................................28
ENVIRONMENTAL CONDITIONS...........................................................30
REFERENCED COMPANIES..................................................................31
DEFINITIONS........................................................................................... 31

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Introduction
The 3000/06 Node Processor card is the Main Processing Unit (MPU), which solves user application logic,
communicates with the 3000/01 Chassis Processor cards and also host applications. It can be configured
single, dual redundant, triple redundant or quad redundant.
Two indicator LEDs are located near the top of the front panel. The left LED indicator displays the overall
health status of the card. If this LED is on, the card is functioning normally; if it is off, the card has detected
an error or is offline. The right indicator LED indicates the node processor status as shown below:
On If left LED is On - Primary without errors
If left LED is Off - WWDT/WDT expires, Board/CPU temperature is > 90
degrees Celsius, or expiration of 2-0 Tolerance Time
1 Blink Primary with chassis/card error or forced read-only variable
2 Blinks Redundant without errors
3 Blinks Redundant with chassis/card error or forced read-only variable
4 Blinks Bootloader mode
6 Blinks Offline (Insufficient I/O communication links)
Off No valid program loaded
If the left LED on the top is off and the right LED on the top is on, then the windowed watchdog timer on
the node processor is expired due to an error (node is running faster or slower than it is configured in
WWDT) or Board/CPU temperature was higher than temperature defined in node processor shutdown
object or 2-0 Tolerance Time, defined in node processor shutdown object, is expired. 2-0 Tolerance time
should be configured only when you operate the SIS with redundant Node Processors. Setting a non-zero
value (between 0.01 seconds and 327.67 seconds) enables the SIS to start the Elapsed timer; when it is
Latched true in redundant mode (more than one node processor had come on line and operational) and
only one Node Processor is left online and operational. If successful redundant Node Processor operation
is not established within the 2-0 Tolerance Time, the remaining Node Processor CPU is turned off,

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effectively de-energizing all outputs and putting the SIS into a safe state. It is necessary to de-energize
node processor card to put card in normal function again.
Each Ethernet port on the card has two LED’s: The top LED turns on whenever there is transmit / receive
activity. The bottom LED on the Ethernet port indicates the link status: If the link is functioning normally, it
will turn on.
Power
ON Power on and within limits
OFF Power off or error
Transmit/Receive
ON Message transmit/receive
OFF No link activity
Link Status
ON Link is functioning normally
OFF Link error
Node Processor Status
ON Primary, no errors (If Power
LED is ON)
If Power LED is OFF and NP
Status LED is ON it indicates
that Node is in Reset because
WWDT/WDT is expired or
board/CPU temperature was
too high or 2-0 Tolerance Time
is expired
1 Blink Primary, chassis/card error or
forced read-only variable
2 Blinks Redundant, no errors
3 Blinks Redundant, chassis/card error
or forced read-only variable
4 Blinks Bootloader mode
6 Blinks Node Processor Offline
OFF No valid Program loaded
Figure 1: 3000/06 Node Processor Front Panel
Host Network A
I/O Network B or
Host Network B
I/O Network C
I/O Network D
Transmit/Receive
Link Status
Transmit/Receive
Link Status
Transmit/Receive
Link Status
Transmit/Receive
Link Status
Node
Power Processor
Status
3000/06

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Specifications
Module Safety Integrity Level: SIL-2 (SIL-3 in redundant configuration)
Card Address: Determined by software configuration
Watchdog Timers:
Fixed: 600 ms maximum
Windowed: 3 ms minimum, 80 ms maximum
Host Network Compatibility: 1 GB TX full-duplex with auto-negotiation
I/O Network Compatibility: 1 GB TX full-duplex with auto-negotiation
Ethernet Cable Length: 328 feet (100 meters) maximum, card to switch or card to card
Ethernet Cable Type: STP Category 5 (EIA 568B, Cat 5) shielded Ethernet cables with 4
twisted-pair wires and RJ-45 tips
Program Memory: Up to 4096512 bytes for PGM files
Up to 1500000 bytes for UDL files
Data Memory Type: SDRAM
Program Memory Type: IDE Disk Chip
Power Requirements: +5 VDC @ 1.75 Amps
Battery: Processor contains a lithium battery (see Figure 2) that powers the
time-of-day clock whenever power to chassis is turned off. The
expected life span of this battery is five (5) years. Replace this
battery (see Figure 2) only with an agency-approved battery of the
same voltage and capacity (3V, 180 mAh). Two recommended
replacements are:
Panasonic part number BR 2032
Varta part number CR 2032
WARNING! If you replace the battery with an incorrect type, it may
explode.
Do not dispose of batteries in the trash. Dispose of batteries
according to local regulations.
Please recycle according to local regulations.
Programming Tools: NetArrays Developer Studio
Programming Languages: Flow Charts, Objects, Structured Text, C/C++, Fuzzy Logic
Processor Utilization: Processor can be configured for cyclic execution: 5 ms, 10 ms, 15 ms,
20 ms or 25 ms. Processor utilization is measured via Node Info
Object, which reports the reserve time in each execution cycle.
Minimum 1 ms reserve time is recommended.
Processing of I/O: The 3000/06 Node Processor communicates each scan cycle with
3000/01 Chassis Processor. Inputs from the modules are acquired by
the 3000/01 Chassis Processor, transferred to the 3000/06 Node
Processor and are processed in the user application program after
two scan cycles. Computational results of the user application
program are sent back to the 3000/01 Chassis Processor to activate
the output modules.

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Self-Tests and Diagnostics: Processor performs a Power-On-Self-Test (POST) upon cold startup
or if instructed by the Node Shutdown object. POST includes
comprehensive memory tests and verification of the onboard
peripherals. Runtime diagnostics tests CPU, registers and allocated
memory.

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Failure Rates in Accordance to IEC 61508
The following table summarizes the failure rates of the modules, which were calculated from Failure Mode
and Diagnostic Effects in accordance to standard IEC 61508. The information can be used in calculating
probability of dangerous failures using Reliability Block Modeling or Markov Modeling. Such modeling
should consider redundant node processors in a 1oo2, 2oo3 or 3oo4 configuration.
Model
3000/06 Atom NP
Safety Integrity Level
2
Safe Failure Fraction:
99.71%
Diagnostic Coverage:
99.48%
Failure Rates In Common Circuitry:
Safe Detected
4.3012E-07
Safe Undetected
4.3447E-09
Dangerous Detected
8.7354E-07
Dangerous Undetected
4.5318E-09
Don't Care
6.6874E-07
Failure Rates In Per Channel Circuitry:
Safe Detected
2.7041E-07
Safe Undetected
2.7314E-09
Dangerous Detected
2.5215E-07
Dangerous Undetected
2.0830E-10
Don't Care
1.3170E-07
Average Frequency of a Dangerous Failure per Hour (1oo1D):
4.7401E-09
Average Frequency of a Dangerous Failure per Hour (1oo2D):
2.8012E-10
Average Frequency of a Dangerous Failure per Hour (2oo3D):
6.5874E-11
Average Frequency of a Dangerous Failure per Hour (3oo4D):
3.5238E-11
Mean Time to Restoration for 1oo2D (SIL-3) configurations:
≤ 9 days
Mean Time to Restoration for all other configurations:
No restriction
In dual redundant configurations, the users must exchange the card within Mean Time to Restore (MTTR ≤
9 days) in order to remain within SIL 3 requirements. Otherwise the card will continue to operate in
degraded SIL 2 mode.

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Hardware Configuration
Switches
Figure 2: Node Processor Configuration Switch Settings
For normal run mode all DIP switches on SW2 must be in the OFF position.
Bootloader mode - set DIP switch SW2-1 or SW2-3 to the on position.
Cabling
The top port of the Node Processor is dedicated to host communications.
Redundant host communication ports of Node Processors can be connected to one or more Ethernet
networks (shown in Figure 3 with Switch 1and Switch 2 respectively).
Non-Redundant node processor configurations use port B for redundant host communications.
Redundant node processors use port B for inter-processor and I/O communications (as needed if
redundant chassis processors are configured) as shown in Figure 3 with Switch B. If redundant chassis
processors are not used, the port still should be connected to I/O Switch B.
The C and D ports of the node processor are always dedicated to I/O communications.
The node processor uses the I/O ports to communicate with I/O ports on the chassis processor, in effect
creating I/O Path B, I/O Path C and I/O Path D (shown in Figure 3 with Switch B, Switch C and Switch D
respectively).
Refer to Table 1 for a summary of Ethernet cabling.
Battery

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Figure 3: 3000-T Node with Four Chassis and Host with two Ethernet networks