Schweitzer Engineering Laboratories SEL-421-4 User manual

SEL-421 RelayInstruction Manual
*PM421-04-NB*
SEL-421-4, -5
Protection, Automation,
and Control System
Instruction Manual
20171021

SEL-421 Relay Instruction Manual Date Code 20171021
© 2016–2017 by Schweitzer Engineering Laboratories, Inc. All rights reserved.
All brand or product names appearing in this document are the trademark or registered trademark of their respective holders. No SEL trademarks
may be used without written permission. SEL products appearing in this document may be covered by U.S. and Foreign patents.
Schweitzer Engineering Laboratories, Inc. reserves all rights and benefits afforded under federal and international copyright and patent laws in its
products, including without limitation software, firmware, and documentation. Portions © 1982-2013, QNX Software Systems Limited under
license to SEL.
The information in this document is provided for informational use only and is subject to change without notice. Schweitzer Engineering
Laboratories, Inc. has approved only the English language document.
This product is covered by the standard SEL 10-year warranty. For warranty details, visit selinc.com or contact your customer service
representative. PM421-04

Date Code 20171021 Instruction Manual SEL-421 Relay
Instruction Manual Table of Contents
List of Tables................................................................................................................................................................................v
List of Figures......................................................................................................................................................................... xiii
Preface.........................................................................................................................................................................................xix
Manual Overview .................................................................................................................................................xix
Safety Information .............................................................................................................................................. xxii
General Information.............................................................................................................................................xxv
Section 1: Introduction and Specifications
Features.................................................................................................................................................................1.2
Models and Options ..............................................................................................................................................1.5
Applications ..........................................................................................................................................................1.8
Product Characteristics .......................................................................................................................................1.12
Specifications......................................................................................................................................................1.14
Section 2: Installation
Shared Configuration Attributes ...........................................................................................................................2.1
Plug-In Boards ....................................................................................................................................................2.13
Jumpers ...............................................................................................................................................................2.15
Relay Placement .................................................................................................................................................2.24
Connection ..........................................................................................................................................................2.25
AC/DC Connection Diagrams ............................................................................................................................2.50
Section 3: Testing
Low-Level Test Interface ......................................................................................................................................3.1
Relay Test Connections.........................................................................................................................................3.3
Checking Relay Operation....................................................................................................................................3.8
Technical Support ...............................................................................................................................................3.23
Section 4: Front-Panel Operations
Front-Panel LCD Default Displays.......................................................................................................................4.1
Front-Panel Menus and Screens............................................................................................................................4.3
Target LEDs ..........................................................................................................................................................4.9
Front-Panel Operator Control Pushbuttons.........................................................................................................4.13
One-Line Diagrams.............................................................................................................................................4.15
Section 5: Protection Functions
Current and Voltage Source Selection ..................................................................................................................5.2
Polarizing Quantity for Distance Element Calculations .....................................................................................5.14
Frequency Estimation .........................................................................................................................................5.15
Undervoltage Supervision Logic ........................................................................................................................5.17
Over- and Underfrequency Elements..................................................................................................................5.19
Time-Error Calculation .......................................................................................................................................5.21
Fault Location .....................................................................................................................................................5.23
Open-Phase Detection Logic ..............................................................................................................................5.24
Pole-Open Logic .................................................................................................................................................5.25
Loss-of-Potential Logic ......................................................................................................................................5.28
Fault Type Identification Selection Logic...........................................................................................................5.33
Ground Directional Element...............................................................................................................................5.33
Phase and Negative-Sequence Directional Elements..........................................................................................5.45
Directionality ......................................................................................................................................................5.46
CVT Transient Detection....................................................................................................................................5.47
Series-Compensation Line Logic........................................................................................................................5.48

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SEL-421 Relay Instruction Manual Date Code 20171021
Table of Contents
Load-Encroachment Logic .................................................................................................................................5.49
Out-of-Step Logic (Conventional) ......................................................................................................................5.50
Out-of-Step Logic (Zero Settings)......................................................................................................................5.56
Mho Ground-Distance Elements ........................................................................................................................5.72
Quadrilateral Ground-Distance Elements...........................................................................................................5.76
Mho Phase-Distance Elements ...........................................................................................................................5.80
Quadrilateral Phase-Distance Elements..............................................................................................................5.85
Zone Time Delay ................................................................................................................................................5.91
Instantaneous Line Overcurrent Elements ..........................................................................................................5.93
Inverse-Time Overcurrent Elements ...................................................................................................................5.99
Over- and Undervoltage Elements....................................................................................................................5.113
Switch-Onto-Fault Logic ..................................................................................................................................5.117
Communications-Assisted Tripping Logic .......................................................................................................5.120
Directional Comparison Blocking Scheme.......................................................................................................5.121
Permissive Overreaching Transfer Tripping Scheme .......................................................................................5.124
Directional Comparison Unblocking Scheme Logic ........................................................................................5.133
Trip Logic .........................................................................................................................................................5.137
Circuit Breaker Failure Protection ....................................................................................................................5.146
Synchronism Check ..........................................................................................................................................5.158
Section 6: Protection Applications Examples
230 kV Overhead Distribution Line Example ......................................................................................................6.1
500 kV Parallel Transmission Lines With Mutual Coupling Example...............................................................6.18
345 kV Tapped Overhead Transmission Line Example .....................................................................................6.53
EHV Parallel 230 kV Underground Cables Example.........................................................................................6.87
Out-of-Step Logic Application Examples ........................................................................................................6.119
Autoreclose Example........................................................................................................................................6.137
Autoreclose and Synchronism-Check Example ...............................................................................................6.141
Circuit Breaker Failure Application Examples.................................................................................................6.151
230 kV Tapped Transmission Line Application Example ................................................................................6.170
Section 7: Metering, Monitoring, and Reporting
Metering................................................................................................................................................................7.1
Circuit Breaker Monitor........................................................................................................................................7.7
Station DC Battery System Monitor.....................................................................................................................7.7
Reporting ..............................................................................................................................................................7.7
Section 8: Settings
Alias Settings ........................................................................................................................................................8.1
Global Settings......................................................................................................................................................8.2
Breaker Monitor Settings......................................................................................................................................8.9
Group Settings ....................................................................................................................................................8.12
Protection Freeform SELOGIC Control Equations ..............................................................................................8.34
Automation Freeform SELOGIC Control Equations ...........................................................................................8.34
Notes Settings .....................................................................................................................................................8.34
Output Settings ...................................................................................................................................................8.35
Front-Panel Settings............................................................................................................................................8.35
Report Settings....................................................................................................................................................8.38
Port Settings........................................................................................................................................................8.38
DNP3 Settings—Custom Maps ..........................................................................................................................8.39
Bay Settings ........................................................................................................................................................8.39
Section 9: ASCII Command Reference
Description of Commands ....................................................................................................................................9.2

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Date Code 20171021 Instruction Manual SEL-421 Relay
Table of Contents
Section 10: Communications Interfaces
Communications Database .................................................................................................................................10.1
DNP3 Communication........................................................................................................................................10.8
IEC 61850 Communication ..............................................................................................................................10.22
Synchrophasors.................................................................................................................................................10.30
Section 11: Relay Word Bits
Alphabetical List.................................................................................................................................................11.1
Row Lists ..........................................................................................................................................................11.34
Section 12: Analog Quantities
Appendix A: Firmware, ICD File, and Manual Versions
Firmware ..............................................................................................................................................................A.1
SELBOOT.............................................................................................................................................................A.9
ICD File ..............................................................................................................................................................A.9
Instruction Manual.............................................................................................................................................A.10
Appendix B: Converting Settings From SEL-421-0, -1, -2, -3 to SEL-421-4, -5
Relay Word Bit Changes......................................................................................................................................B.1
Analog Quantity Changes....................................................................................................................................B.2
Global Settings Changes......................................................................................................................................B.3
Group Settings Changes.......................................................................................................................................B.3
Front-Panel Settings Changes ..............................................................................................................................B.4
Port Settings Changes ..........................................................................................................................................B.4
DNP3 Mapping Changes .....................................................................................................................................B.6
IEC 61850 Object Changes................................................................................................................................B.16
SEL-421-4, -5 Relay Command Summary

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Date Code 20171021 Instruction Manual SEL-421 Relay
List of Tables
Table 1.1 Application Highlights ..............................................................................................................1.11
Table 1.2 SEL-421 Relay Characteristics..................................................................................................1.13
Table 2.1 Recommended Control Input Pickup Settings.............................................................................2.6
Table 2.2 Required Settings for Use with AC Control Signals ...................................................................2.7
Table 2.3 Control Inputs ............................................................................................................................2.15
Table 2.4 Control Outputs .........................................................................................................................2.15
Table 2.5 Main Board Jumpers..................................................................................................................2.16
Table 2.6 Main Board Jumpers—JMP2, JMP3, and JMP4.......................................................................2.19
Table 2.7 I/O Board Jumpers.....................................................................................................................2.23
Table 2.8 Jumper Positions for Breaker OPEN/CLOSE Indication ..........................................................2.23
Table 2.9 Jumper Positions for Arc Suppression.......................................................................................2.23
Table 2.10 Front-Panel LED Option ...........................................................................................................2.24
Table 2.11 Fuse Requirements for the Power Supply .................................................................................2.34
Table 2.12 TiDL LED Status.......................................................................................................................2.45
Table 3.1 UUT Database Entries for SEL-5401 Relay Test System Software—5 A Relay .......................3.2
Table 3.2 UUT Database Entries for SEL-5401 Relay Test System Software—1 A Relay .......................3.2
Table 3.3 Negative-Sequence Directional Element Settings AUTO Calculations....................................3.17
Table 4.1 Metering Screens Enable Settings ...............................................................................................4.2
Table 4.2 Front-Panel Target LEDs...........................................................................................................4.10
Table 4.3 TIME Target LED Trigger Elements—Factory Defaults..........................................................4.11
Table 4.4 Operator Control Pushbuttons and LEDs—Factory Defaults ...................................................4.13
Table 5.1 Available Current Source Selection Settings Combinations .......................................................5.4
Table 5.2 Available Current Source Selection Settings Combinations When ESS := Y, NUMBK := 1 ....5.4
Table 5.3 Available Current Source Selection Settings Combinations When ESS := Y, NUMBK := 2 ....5.5
Table 5.4 Available Voltage Source Selection Setting Combinations ........................................................5.6
Table 5.5 ESS := N, Current and Voltage Source Selection .......................................................................5.8
Table 5.6 ESS := 1, Current and Voltage Source Selection ........................................................................5.8
Table 5.7 ESS := 2, Current and Voltage Source Selection ........................................................................5.9
Table 5.8 ESS := 3, Current and Voltage Source Selection ......................................................................5.10
Table 5.9 ESS := 4, Current and Voltage Source Selection ......................................................................5.11
Table 5.10 ESS := Y, Tapped Line..............................................................................................................5.13
Table 5.11 ESS := Y, Current Polarizing Source ........................................................................................5.13
Table 5.12 VMEMC Relay Setting .............................................................................................................5.15
Table 5.13 Frequency Measurement and Frequency Tracking Ranges.......................................................5.16
Table 5.14 Frequency Estimation ................................................................................................................5.16
Table 5.15 Voltage and Breaker Pole Correlation.......................................................................................5.17
Table 5.16 Frequency Estimation Outputs ..................................................................................................5.17
Table 5.17 Table Y12. Summary of the Valpha and 81UVSP Calculations...............................................5.19
Table 5.18 Time-Error Calculation Inputs and Outputs ..............................................................................5.21
Table 5.19 Fault Location Triggering Elements..........................................................................................5.23
Table 5.20 Fault Type..................................................................................................................................5.24
Table 5.21 Fault Location Settings..............................................................................................................5.24
Table 5.22 Fault Location Relay Word Bit .................................................................................................5.24
Table 5.23 Open-Phase Detection Relay Word Bits ...................................................................................5.25
Table 5.24 Pole-Open Logic Settings..........................................................................................................5.25
Table 5.25 EPO Setting Selections..............................................................................................................5.25
Table 5.26 Pole-Open Logic Relay Word Bits............................................................................................5.25
Table 5.27 LOP Logic Setting .....................................................................................................................5.29
Table 5.28 LOP Logic Relay Word Bits .....................................................................................................5.29
Table 5.29 Fault Type Identification Logic Settings ...................................................................................5.33
Table 5.30 FIDS Relay Word Bits...............................................................................................................5.33
Table 5.31 Directional Elements Supervising Ground Elements ................................................................5.33
Table 5.32 Ground Directional Element Settings........................................................................................5.34

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SEL-421 Relay Instruction Manual Date Code 20171021
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Table 5.33 Ground Directional Element Settings AUTO Calculations.......................................................5.35
Table 5.34 Ground Directional Element Preferred Settings........................................................................5.35
Table 5.35 Ground Directional Element Enables ........................................................................................5.37
Table 5.36 Ground Directional Element Relay Word Bits..........................................................................5.39
Table 5.37 Reference Table for Figure 5.23, Figure 5.24, and Figure 5.25................................................5.42
Table 5.38 Vector Definitions for Equation 1.1 Through Equation 1.11....................................................5.43
Table 5.39 Phase and Negative-Sequence Directional Elements Relay Word Bits ....................................5.45
Table 5.40 Zone Directional Settings ..........................................................................................................5.47
Table 5.41 CVT Transient Detection Logic Setting....................................................................................5.47
Table 5.42 CVT Transient Detection Logic Relay Word Bit......................................................................5.48
Table 5.43 Series-Compensation Line Logic Relay Settings ......................................................................5.49
Table 5.44 Load-Encroachment Logic Relay Settings ................................................................................5.50
Table 5.45 Load-Encroachment Logic Relay Word Bits ............................................................................5.50
Table 5.46 OOS Logic Relay Settings.........................................................................................................5.52
Table 5.47 OOS Logic Relay Word Bits .....................................................................................................5.53
Table 5.48 Input/Output Combinations of the Pole-Open OOS Blocking Logic........................................5.67
Table 5.49 Mho Ground-Distance Elements Relay Word Bits ...................................................................5.73
Table 5.50 Differences Between the Adaptive Right Resistance Blinder and the Existing Resistance
Blinder ......................................................................................................................................5.77
Table 5.51 Quadrilateral Ground-Distance Elements Relay Word Bits......................................................5.77
Table 5.52 Mho Phase-Distance Elements Relay Word Bits ......................................................................5.81
Table 5.53 High-Speed and Conventional Element Directional Setting Summary.....................................5.85
Table 5.54 Quadrilateral Phase-Distance Elements Relay Word Bits.........................................................5.89
Table 5.55 Phase Overcurrent Element Settings .........................................................................................5.94
Table 5.56 Negative-Sequence Overcurrent Element Settings....................................................................5.94
Table 5.57 Residual Ground Overcurrent Element Settings .......................................................................5.95
Table 5.58 Phase Instantaneous/Definite-Time Line Overcurrent Relay Word Bits...........................................5.95
Table 5.59 Negative-Sequence Instantaneous/Definite-Time Line Overcurrent Relay Word Bits.............5.95
Table 5.60 Residual Ground Instantaneous/Definite-Time Line Overcurrent Relay Word Bits.................5.96
Table 5.61 Selectable Current Quantities ..................................................................................................5.100
Table 5.62 Selectable Inverse-Time Overcurrent Settings ........................................................................5.100
Table 5.63 Selectable Inverse-Time Overcurrent Relay Word Bits ..........................................................5.101
Table 5.64 Equations Associated With U.S. Curves .................................................................................5.101
Table 5.65 Equations Associated With IEC Curves ..................................................................................5.102
Table 5.66 Available Input Quantities.......................................................................................................5.114
Table 5.67 SOTF Settings..........................................................................................................................5.118
Table 5.68 SOTF Relay Word Bits............................................................................................................5.118
Table 5.69 ECOMM Setting......................................................................................................................5.120
Table 5.70 DCB Settings ...........................................................................................................................5.123
Table 5.71 DCB Relay Word Bits .............................................................................................................5.123
Table 5.72 POTT Settings .........................................................................................................................5.127
Table 5.73 POTT Relay Word Bits ...........................................................................................................5.128
Table 5.74 DCUB Settings ........................................................................................................................5.134
Table 5.75 DCUB Relay Word Bits ..........................................................................................................5.135
Table 5.76 Additional Settings for Single Pole Tripping (SPT)................................................................5.137
Table 5.77 Setting TULO Unlatch Trip Options .......................................................................................5.139
Table 5.78 Trip Logic Settings ..................................................................................................................5.140
Table 5.79 Trip Logic Relay Word Bits ....................................................................................................5.144
Table 5.80 Circuit Breaker Failure Relay Word Bits ................................................................................5.155
Table 5.81 Synchronism-Check Relay Word Bits.....................................................................................5.161
Table 6.1 System Data—230 kV Overhead Transmission Line..................................................................6.2
Table 6.2 Secondary Impedances ................................................................................................................6.2
Table 6.3 LOP Enable Options....................................................................................................................6.6
Table 6.4 Options for Enabling Pole-Open Logic .....................................................................................6.12
Table 6.5 Setting TULO Unlatch Trip Options .........................................................................................6.14
Table 6.6 Settings for 230 kV Overhead TX Example..............................................................................6.15
Table 6.7 System Data—500 kV Parallel Overhead Transmission Lines.................................................6.19
Table 6.8 Secondary Impedances ..............................................................................................................6.20

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Date Code 20171021 Instruction Manual SEL-421 Relay
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Table 6.9 LOP Enable Options..................................................................................................................6.25
Table 6.10 Tilt Resulting From Nonhomogeneity.......................................................................................6.31
Table 6.11 Options for Enabling Pole-Open Logic .....................................................................................6.37
Table 6.12 Trip Unlatch Options .................................................................................................................6.42
Table 6.13 Settings for 500 kV Parallel TX Example .................................................................................6.47
Table 6.14 System Data—345 kV Tapped Overhead Transmission Line .........................................................6.54
Table 6.15 Secondary Impedances ..............................................................................................................6.55
Table 6.16 LOP Enable Options..................................................................................................................6.60
Table 6.17 Local Zone 2 Fault Impedance Measurements..........................................................................6.62
Table 6.18 Apparent Impedance Measurement for Remote Faults .............................................................6.63
Table 6.19 Options for Enabling Pole-Open Logic .....................................................................................6.77
Table 6.20 Setting TULO Unlatch Trip Options .........................................................................................6.81
Table 6.21 Settings for 345 kV Tapped TX Example .................................................................................6.83
Table 6.22 System Data—230 kV Parallel Underground Cables................................................................6.87
Table 6.23 Secondary Impedances ..............................................................................................................6.88
Table 6.24 LOP Enable Options..................................................................................................................6.93
Table 6.25 Tilt Resulting From Nonhomogeneity.......................................................................................6.98
Table 6.26 XAG Measurement for Remote AG Fault (k01 = 0.374 –39.2°, Sheath and Ground
Return Path)............................................................................................................................6.101
Table 6.27 XAG Measurement for Remote AG Fault (k01 = 0.385 –46.7°, Sheath Return Path) ........6.101
Table 6.28 XAG Measurement for Remote AG Fault (k0 = 6.105 44.5°, Ground Return Path)...........6.101
Table 6.29 Options for Enabling Pole-Open Logic ...................................................................................6.110
Table 6.30 Setting TULO Unlatch Trip Options .......................................................................................6.113
Table 6.31 Settings for 230 kV Parallel Cables Example .........................................................................6.115
Table 6.32 Positive-Sequence Impedances (Secondary) ...........................................................................6.120
Table 6.33 Automatically Calculated/Hidden Settings .............................................................................6.129
Table 6.34 Relay Configuration (Group)...................................................................................................6.129
Table 6.35 Out-of-Step Tripping/Blocking ...............................................................................................6.130
Table 6.36 Automatically Calculated/Hidden Settings .............................................................................6.136
Table 6.37 Relay Configuration (Group)...................................................................................................6.136
Table 6.38 Out-of-Step Tripping/Blocking ...............................................................................................6.136
Table 6.39 Settings for Autoreclose Example ...........................................................................................6.140
Table 6.40 Settings for Autoreclose and Synchronism Check Example ...................................................6.149
Table 6.41 Secondary Quantities...............................................................................................................6.156
Table 6.42 Settings for Circuit Breaker Failure Example 1 ......................................................................6.160
Table 6.43 Secondary Quantities...............................................................................................................6.162
Table 6.44 Settings for Circuit Breaker Failure Example 2 ......................................................................6.168
Table 6.45 Global Settings ........................................................................................................................6.174
Table 6.46 Breaker Monitor Settings.........................................................................................................6.174
Table 6.47 Group Settings .........................................................................................................................6.175
Table 6.48 Protection Freeform SELOGIC Control Equations...................................................................6.176
Table 6.49 Control Inputs ..........................................................................................................................6.179
Table 6.50 Control Outputs (SELOGIC Control Equations).......................................................................6.179
Table 7.1 MET Command ...........................................................................................................................7.2
Table 7.2 Instantaneous Metering Quantities—Voltages, Currents, Frequency .........................................7.3
Table 7.3 Instantaneous Metering Quantities—Power................................................................................7.4
Table 7.4 Maximum/Minimum Metering Quantities—Voltages, Currents, Frequency, and Powers.........7.5
Table 7.5 Demand and Peak Demand Metering Quantities—LINE ...........................................................7.6
Table 7.6 Energy Metering Quantities—(LINE).........................................................................................7.6
Table 7.7 Event Report Nonvolatile Storage Capability When ERDIG = S...............................................7.8
Table 7.8 Event Report Nonvolatile Storage Capability When ERDIG = A ..............................................7.8
Table 7.9 Event Report Metered Analog Quantities .................................................................................7.10
Table 7.10 Event Types ...............................................................................................................................7.14
Table 8.1 Global Settings Changes..............................................................................................................8.1
Table 8.2 Global Settings Categories ..........................................................................................................8.2
Table 8.3 General Global Settings...............................................................................................................8.2
Table 8.4 Global Enables.............................................................................................................................8.2
Table 8.5 Station DC1 Monitor (and Station DC2 Monitor).......................................................................8.3

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SEL-421 Relay Instruction Manual Date Code 20171021
List of Tables
Table 8.6 Control Inputs ..............................................................................................................................8.3
Table 8.7 Main Board Control Inputs..........................................................................................................8.3
Table 8.8 Interface Board #1 Control Inputs ...............................................................................................8.4
Table 8.9 Interface Board #2 Control Inputs ...............................................................................................8.4
Table 8.10 Settings Group Selection .............................................................................................................8.5
Table 8.11 Frequency Estimation ..................................................................................................................8.5
Table 8.12 Time-Error Calculation................................................................................................................8.5
Table 8.13 Current and Voltage Source Selection.........................................................................................8.5
Table 8.14 Synchronized Phasor Configuration Settings ..............................................................................8.6
Table 8.15 Phasors Included in the Data .......................................................................................................8.6
Table 8.16 Synchronized Phasor Configuration Settings Part 2....................................................................8.7
Table 8.17 Synchronized Phasor Recorder Settings......................................................................................8.7
Table 8.18 Synchronized Phasor Real Time Control Settings ......................................................................8.8
Table 8.19 Time and Date Management........................................................................................................8.8
Table 8.20 Data Reset Control.......................................................................................................................8.8
Table 8.21 DNP .............................................................................................................................................8.9
Table 8.22 Breaker Monitor Settings Categories ..........................................................................................8.9
Table 8.23 Enables.........................................................................................................................................8.9
Table 8.24 Breaker 1 Inputs...........................................................................................................................8.9
Table 8.25 Breaker 2 Inputs.........................................................................................................................8.10
Table 8.26 Breaker 1 Monitor (and Breaker 2 Monitor) .............................................................................8.10
Table 8.27 Breaker 1 Contact Wear (and Breaker 2 Contact Wear) ...........................................................8.10
Table 8.28 Breaker 1 Electrical Operating Time (and Breaker 2 Electrical Operating Time)....................8.11
Table 8.29 Breaker 1 Mechanical Operating Time (and Breaker 2 Mechanical Operating Time) .............8.11
Table 8.30 Breaker 1 Pole Scatter and Pole Discrepancy (and Breaker 2 Pole Scatter and Pole
Discrepancy).............................................................................................................................8.11
Table 8.31 Breaker 1 Inactivity Time Elapsed (and Breaker 2 Inactivity Time Elapsed)...........................8.11
Table 8.32 Breaker 1 Motor Running Time (and Breaker 2 Motor Running Time)...................................8.11
Table 8.33 Breaker 1 Current Interrupted (and Breaker 2 Current Interrupted)..........................................8.11
Table 8.34 Group Settings Categories .........................................................................................................8.12
Table 8.35 Line Configuration ....................................................................................................................8.13
Table 8.36 Relay Configuration ..................................................................................................................8.13
Table 8.37 Mho Phase-Distance Element Reach.........................................................................................8.15
Table 8.38 Quadrilateral Phase-Distance Element Reach ...........................................................................8.15
Table 8.39 Phase-Distance Element Time Delay ........................................................................................8.16
Table 8.40 Mho Ground-Distance Element Reach......................................................................................8.16
Table 8.41 Quad Ground-Distance Element Reach.....................................................................................8.17
Table 8.42 Zero-Sequence Compensation Factor........................................................................................8.18
Table 8.43 Ground-Distance Element Time Delay .....................................................................................8.18
Table 8.44 Series Compensation .................................................................................................................8.18
Table 8.45 Distance Element Common Time Delay ...................................................................................8.18
Table 8.46 Switch-Onto-Fault Scheme........................................................................................................8.19
Table 8.47 Out-of-Step Tripping/Blocking .................................................................................................8.19
Table 8.48 Load Encroachment...................................................................................................................8.20
Table 8.49 Phase Instantaneous Overcurrent Pickup...................................................................................8.21
Table 8.50 Phase Definite-Time Overcurrent Time Delay..........................................................................8.21
Table 8.51 Phase Instantaneous Definite-Time Overcurrent Torque Control.............................................8.21
Table 8.52 Residual Ground Instantaneous Overcurrent Pickup.................................................................8.22
Table 8.53 Residual Ground Definite-Time Overcurrent Time Delay........................................................8.22
Table 8.54 Residual Ground Instantaneous Definite-Time Overcurrent Torque Control ...........................8.22
Table 8.55 Negative-Sequence Instantaneous Overcurrent Pickup.............................................................8.23
Table 8.56 Negative-Sequence Definite-Time Overcurrent Time Delay....................................................8.23
Table 8.57 Negative-Sequence Instantaneous Definite-Time Overcurrent Torque Control .......................8.23
Table 8.58 Selectable Operating Quantity Inverse Time Overcurrent Element 1 .......................................8.23
Table 8.59 Selectable Operating Quantity Inverse Time Overcurrent Element 2 .......................................8.24
Table 8.60 Selectable Operating Quantity Inverse Time Overcurrent Element 3 .......................................8.24
Table 8.61 81 Elements ...............................................................................................................................8.25
Table 8.62 Under Voltage (27) Element e...................................................................................................8.25

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Date Code 20171021 Instruction Manual SEL-421 Relay
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Table 8.63 Over Voltage (59) Element e.....................................................................................................8.25
Table 8.64 Zone/Level Direction.................................................................................................................8.26
Table 8.65 Directional Control Element......................................................................................................8.26
Table 8.66 Pole-Open Detection..................................................................................................................8.26
Table 8.67 POTT Trip Scheme....................................................................................................................8.27
Table 8.68 DCUB Trip Scheme...................................................................................................................8.27
Table 8.69 DCB Trip Scheme .....................................................................................................................8.28
Table 8.70 Breaker 1 Failure Logic (and Breaker 2 Failure Logic) ............................................................8.28
Table 8.71 Synchronism-Check Element Reference ...................................................................................8.29
Table 8.72 Breaker 1 Synchronism Check ..................................................................................................8.29
Table 8.73 Breaker 2 Synchronism Check ..................................................................................................8.29
Table 8.74 Recloser and Manual Closing....................................................................................................8.30
Table 8.75 Single-Pole Reclose Settings .....................................................................................................8.31
Table 8.76 Three-Pole Reclose Settings......................................................................................................8.31
Table 8.77 Voltage Elements.......................................................................................................................8.32
Table 8.78 Demand Metering ......................................................................................................................8.32
Table 8.79 MIRRORED BITS Communications Settings...............................................................................8.33
Table 8.80 Trip Logic ..................................................................................................................................8.33
Table 8.81 Protection Freeform SELOGIC Control Equations.....................................................................8.34
Table 8.82 Main Board Default Values .......................................................................................................8.35
Table 8.83 Front-Panel Settings Defaults....................................................................................................8.35
Table 8.84 MIRRORED BITS Protocol Default Settings................................................................................8.38
Table 8.85 Bay Settings...............................................................................................................................8.39
Table 9.1 SEL-421 List of Commands ........................................................................................................9.2
Table 9.2 MET Command ...........................................................................................................................9.4
Table 9.3 MET E Command........................................................................................................................9.5
Table 9.4 MET RMS Command..................................................................................................................9.5
Table 9.5 MET SYN Command ..................................................................................................................9.5
Table 9.6 SET Command Overview............................................................................................................9.6
Table 9.7 SHO Command Overview...........................................................................................................9.7
Table 10.1 SEL-421 Database Regions .......................................................................................................10.1
Table 10.2 SEL-421 Database Structure—LOCAL Region........................................................................10.2
Table 10.3 SEL-421 Database Structure—METER Region .......................................................................10.2
Table 10.4 SEL-421 Database Structure—DEMAND Region ...................................................................10.4
Table 10.5 SEL-421 Database Structure—TARGET Region .....................................................................10.5
Table 10.6 SEL-421 Database Structure—HISTORY Region....................................................................10.5
Table 10.7 SEL-421 Database Structure—BREAKER Region ..................................................................10.6
Table 10.8 SEL-421 Database Structure—STATUS Region......................................................................10.6
Table 10.9 SEL-421 Database Structure—ANALOGS Region..................................................................10.7
Table 10.10 SEL-421 DNP3 Reference Data Map........................................................................................10.9
Table 10.11 SEL-421 Object 12 Control Operations ..................................................................................10.14
Table 10.12 Object 30, 32, FTYPE Upper Byte-Event Cause ....................................................................10.16
Table 10.13 Object 30, 32, FTYPE Lower Byte-Affected Phase(s)............................................................10.16
Table 10.14 SEL-421 DNP3 Default Data Map ..........................................................................................10.16
Table 10.15 Logical Device: PRO (Protection)...........................................................................................10.22
Table 10.16 Logical Device: MET (Metering)............................................................................................10.27
Table 10.17 Voltage Synchrophasor Names ...............................................................................................10.30
Table 10.18 Current Synchrophasor Names................................................................................................10.30
Table 10.19 Synchrophasor Order in Data Stream (Voltages and Currents)...............................................10.31
Table 11.1 Alphabetic List of Relay Word Bits ..........................................................................................11.1
Table 11.2 Relay Word Bits: Enable and Tripping Bits............................................................................11.34
Table 11.3 Relay Word Bits: Distance Elements ......................................................................................11.34
Table 11.4 Relay Word Bits: Series-Compensated Line Logic.................................................................11.37
Table 11.5 Relay Word Bits: Out-of-Step Elements .................................................................................11.38
Table 11.6 Relay Word Bits: Directional Elements ..................................................................................11.39
Table 11.7 Relay Word Bits: Overcurrent Elements .................................................................................11.40
Table 11.8 Relay Word Bits: Synchronism-Check Elements....................................................................11.40
Table 11.9 Relay Word Bits: Reclosing Elements ....................................................................................11.41

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SEL-421 Relay Instruction Manual Date Code 20171021
List of Tables
Table 11.10 Relay Word Bits: Miscellaneous Elements .............................................................................11.43
Table 11.11 Relay Word Bits: Trip Logic Elements ...................................................................................11.43
Table 11.12 Relay Word Bits: Pilot Tripping Elements..............................................................................11.45
Table 11.13 Relay Word Bits: Future Breaker Open-Phase Detector.........................................................11.46
Table 11.14 Relay Word Bits: Breaker 1 Failure ........................................................................................11.46
Table 11.15 Relay Word Bits: Breaker 2 Failure ........................................................................................11.47
Table 11.16 Relay Word Bits: 52 Status and Open-Phase Detector............................................................11.48
Table 11.17 Relay Word Bits: Breaker Monitoring ....................................................................................11.50
Table 11.18 Relay Word Bits: RTD Status Bits ..........................................................................................11.50
Table 11.19 Relay Word Bits: Battery Monitor ..........................................................................................11.51
Table 11.20 Relay Word Bits: Metering Elements......................................................................................11.51
Table 11.21 Relay Word Bits: Open and Close...........................................................................................11.51
Table 11.22 Relay Word Bits: Local Bits....................................................................................................11.51
Table 11.23 Relay Word Bits: Remote Bits ................................................................................................11.52
Table 11.24 Relay Word Bits: Settings Group Bits.....................................................................................11.52
Table 11.25 Relay Word Bits: Future Breaker Failure Bits ........................................................................11.52
Table 11.26 Relay Word Bits: Input Elements............................................................................................11.52
Table 11.27 Relay Word Bits: Protection SELOGIC Variables....................................................................11.52
Table 11.28 Relay Word Bits: Protection SELOGIC Latches ......................................................................11.53
Table 11.29 Relay Word Bits: Protection SELOGIC Conditioning Timers .................................................11.53
Table 11.30 Relay Word Bits: Protection SELOGIC Sequencing Timers....................................................11.53
Table 11.31 Relay Word Bits: Protection SELOGIC Counters ....................................................................11.53
Table 11.32 Relay Word Bits: Automation SELOGIC Variables.................................................................11.53
Table 11.33 Relay Word Bits: Automation SELOGIC Latches....................................................................11.54
Table 11.34 Relay Word Bits: Automation Sequencing Timers .................................................................11.54
Table 11.35 Relay Word Bits: Automation SELOGIC Counters..................................................................11.54
Table 11.36 Relay Word Bits: SELOGIC Control Equation Error and Status Reporting.............................11.54
Table 11.37 Relay Word Bits: Alarms ........................................................................................................11.55
Table 11.38 Relay Word Bits: Time and Date Management and Frequency Estimation............................11.55
Table 11.39 Relay Word Bits: Pushbuttons and Outputs ............................................................................11.56
Table 11.40 Relay Word Bits: Pushbuttons.................................................................................................11.57
Table 11.41 Relay Word Bits: Pushbutton LED Bits ..................................................................................11.57
Table 11.42 Relay Word Bits: Data Reset Bits ...........................................................................................11.57
Table 11.43 Relay Word Bits: Target Logic Bits........................................................................................11.57
Table 11.44 Relay Word Bits: MIRRORED BITS ..........................................................................................11.58
Table 11.45 Relay Word Bits: Test Bits......................................................................................................11.58
Table 11.46 Relay Word Bits: Virtual Bits .................................................................................................11.58
Table 11.47 Relay Word Bits: Ethernet Switch...........................................................................................11.59
Table 11.48 Relay Word Bits: Signal Profiling...........................................................................................11.60
Table 11.49 Relay Word Bits: Fast SER Enable Bits..................................................................................11.60
Table 11.50 Relay Word Bits: Source Selection Elements .........................................................................11.60
Table 11.51 Relay Word Bits: Full-Cycle Mho and Quad Ground-Distance..............................................11.61
Table 11.52 Relay Word Bits: Full-Cycle Mho and Phase Quad Phase-Distance ......................................11.61
Table 11.53 Relay Word Bits: High-Speed Mho and Quad Ground-Distance............................................11.62
Table 11.54 Relay Word Bits: High-Speed Mho and Quad Phase-Distance...............................................11.63
Table 11.55 Relay Word Bits: DNP Event Lock.........................................................................................11.64
Table 11.56 Relay Word Bits: Synchrophasor SELOGIC Equations/RTC Synchrophasors Status Bits......11.64
Table 11.57 Relay Word Bits: IRIG-B Control...........................................................................................11.65
Table 11.58 Relay Word Bit: Time-Error Calculation ................................................................................11.65
Table 11.59 Relay Word Bits: Synchrophasor Configuration Error ...........................................................11.66
Table 11.60 Relay Word Bits: Pushbuttons, Pushbutton LEDs, and Target LEDs for New HMI..............11.66
Table 11.61 Relay Word Bits: Local Bit Supervision .................................................................................11.67
Table 11.62 Relay Word Bits: Local Bit Status ..........................................................................................11.67
Table 11.63 Relay Word Bits: RTC Remote Digital Status ........................................................................11.67
Table 11.64 Relay Word Bits: Fast Operate Transmit Bits .........................................................................11.67
Table 11.65 Relay Word Bits: Bay Control Disconnect Status...................................................................11.68
Table 11.66 Relay Word Bits: Bay Control Disconnect Bus-Zone Compliant...........................................11.70
Table 11.67 Relay Word Bits: Bay Control Disconnect Control ................................................................11.70

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Table 11.68 Relay Word Bits: Bay Control Disconnect Timers and Breaker Status ..................................11.72
Table 11.69 Under/Overvoltage Elements ..................................................................................................11.76
Table 11.70 Relay Word Bits: 81 Frequency Elements ..............................................................................11.77
Table 11.71 Full-Cycle Mho and Quad Distance ........................................................................................11.78
Table 11.72 Time and Date Management....................................................................................................11.79
Table 11.73 Remote Axion Status ...............................................................................................................11.79
Table 11.74 Additional Inputs and Outputs.................................................................................................11.79
Table 12.1 Analog Quantities Sorted Alphabetically ..................................................................................12.1
Table 12.2 Analog Quantities Sorted by Function ....................................................................................12.12
Table A.1 Firmware Revision History ........................................................................................................A.2
Table A.2 SELBOOT Revision History .......................................................................................................A.9
Table A.3 ICD File Revision History.........................................................................................................A.9
Table A.4 Instruction Manual Revision History .......................................................................................A.10
Table B.1 Relay Word Bit Differences .......................................................................................................B.1
Table B.2 Analog Quantity Differences......................................................................................................B.2
Table B.3 Global Settings Differences........................................................................................................B.3
Table B.4 Group Settings Differences ........................................................................................................B.3
Table B.5 Serial Port Settings Differences..................................................................................................B.4
Table B.6 Ethernet Port Settings Differences .............................................................................................B.4
Table B.7 Binary Inputs Point Mapping for MAPSEL = B ........................................................................B.6
Table B.8 Binary Inputs Point Mapping for MAPSEL = E ........................................................................B.7
Table B.9 Binary Outputs Point Mapping...................................................................................................B.7
Table B.10 Counters Point Mapping.............................................................................................................B.9
Table B.11 Analog Inputs Point Mapping.....................................................................................................B.9
Table B.12 Analog Outputs Point Mapping............................................................................................... .B.13
Table B.13 Binary Outputs Mapping for DNP3 LAN/WAN......................................................................B.14
Table B.14 IEC 61850 Functional Differences.......................................................................................... .B.16
Table B.15 Default Dataset Differences..................................................................................................... .B.16
Table B.16 Logical Node Mapping Differences ........................................................................................ .B.16

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Date Code 20171021 Instruction Manual SEL-421 Relay
Instruction Manual List of Figures
Figure 1.1 SEL-421 Functional Overview....................................................................................................1.2
Figure 1.2 Protecting a Line Segment With MIRRORED BITS Communications on a Fiber Channel...........1.8
Figure 1.3 Single Circuit Breaker Configuration (ESS := 1)........................................................................1.8
Figure 1.4 Single Circuit Breaker Configuration With Line Breaker CTs (ESS := 2)...................................1.9
Figure 1.5 Double Circuit Breaker Configuration (ESS := 3) ......................................................................1.9
Figure 1.6 Double Circuit Breaker Configuration With Bus Protection (ESS := 4)...................................1.10
Figure 1.7 Tapped Line (ESS := Y) ............................................................................................................1.10
Figure 2.1 Horizontal Front-Panel Template (a); Vertical Front-Panel Template (b) ..................................2.3
Figure 2.2 Rear 3U Template, Fixed Terminal Block Analog Inputs...........................................................2.4
Figure 2.3 Rear 3U Template, Connectorized Analog Inputs.......................................................................2.5
Figure 2.4 Standard Control Output Connection ..........................................................................................2.8
Figure 2.5 Hybrid Control Output Connection .............................................................................................2.9
Figure 2.6 High-Speed, High-Current Interrupting Control Output Connection, INT5 (INT8).................2.10
Figure 2.7 High-Speed, High-Current Interrupting Control Output Connection, INT4 .............................2.10
Figure 2.8 High-Speed, High-Current Interrupting Control Output Typical Terminals, INT5 (INT8)......2.11
Figure 2.9 Precharging Internal Capacitance of High-Speed, High-Current Interrupting Output
Contacts, INT5 (INT8)...........................................................................................................2.11
Figure 2.10 INT1 I/O Interface Board ..........................................................................................................2.13
Figure 2.11 INT2 I/O Interface Board ..........................................................................................................2.13
Figure 2.12 INT3 I/O Interface Board ..........................................................................................................2.13
Figure 2.13 INT4 I/O Interface Board ..........................................................................................................2.14
Figure 2.14 INT5 I/O Interface Board ..........................................................................................................2.14
Figure 2.15 INT6 I/O Interface Board ..........................................................................................................2.14
Figure 2.16 INT7 I/O Interface Board ..........................................................................................................2.14
Figure 2.17 INT8 I/O Interface Board ..........................................................................................................2.14
Figure 2.18 Jumper Location on the Main Board .........................................................................................2.16
Figure 2.19 Major Component Locations on the SEL-421 Main Board ......................................................2.18
Figure 2.20 Major Component Locations on the SEL-421 INT1, INT2, INT4, INT5, INT6, INT7, and
INT8 I/O Boards ....................................................................................................................2.21
Figure 2.21 Major Component Locations on the SEL-421 INT3 I/O Board................................................2.22
Figure 2.22 SEL-421 Chassis Dimensions ...................................................................................................2.25
Figure 2.23 3U Rear Panel, Main Board.......................................................................................................2.26
Figure 2.24 3U Rear Panel, Main Board, Connectorized .............................................................................2.26
Figure 2.25 EtherCAT Board for TiDL ........................................................................................................2.27
Figure 2.26 4U Rear Panel, Main Board, Without Optional I/O ..................................................................2.27
Figure 2.27 4U Rear Panel, Main Board, INT5 I/O Interface Board............................................................2.27
Figure 2.28 4U Rear Panel, Main Board, INT8 I/O Interface Board............................................................2.28
Figure 2.29 5U Rear Panel, Main Board, INT3 and INT1 I/O Interface Board ...........................................2.28
Figure 2.30 5U Rear Panel, Main Board, INT4 and INT1 I/O Interface Board ...........................................2.29
Figure 2.31 5U Rear Panel, Main Board, INT6 and INT4 I/O Interface Board ...........................................2.29
Figure 2.32 5U Rear Panel, Main Board, INT2 and INT7 I/O Interface Board ...........................................2.30
Figure 2.33 Rear-Panel Symbols ..................................................................................................................2.30
Figure 2.34 Screw-Terminal Connector Keying...........................................................................................2.31
Figure 2.35 Rear-Panel Receptacle Keying ..................................................................................................2.32
Figure 2.36 Power Connection Area of the Rear Panel ................................................................................2.33
Figure 2.37 Control Output OUT108............................................................................................................2.36
Figure 2.38 Axion Chassis ............................................................................................................................2.38
Figure 2.39 SEL-2243 Power Coupler..........................................................................................................2.39
Figure 2.40 SEL-2244-2 Digital Input Module ............................................................................................2.40
Figure 2.41 SEL-2244-5 Fast High-Current Digital Output Module............................................................2.41
Figure 2.42 SEL-2245-42 AC Analog Input Module ...................................................................................2.42

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SEL-421 Relay Instruction Manual Date Code 20171021
List of Figures
Figure 2.43 Topology 1.................................................................................................................................2.43
Figure 2.44 Topology 2.................................................................................................................................2.43
Figure 2.45 Topology 3.................................................................................................................................2.44
Figure 2.46 Remote Module Interface ..........................................................................................................2.45
Figure 2.47 SEL-421 to Computer—D-Subminiature 9-Pin Connector.......................................................2.47
Figure 2.48 Example Ethernet Panel With Fiber-Optic Ports.......................................................................2.48
Figure 2.49 Two 100BASE-FX Port Configuration on Ports 5A and 5B.....................................................2.49
Figure 2.50 Two 10/100BASE-T Port Configuration on Ports 5A and 5B ..................................................2.49
Figure 2.51 100BASE-FX and 10/100BASE-T Port Configuration on Ports 5A and 5B ............................2.49
Figure 2.52 Two 100BASE-FX Port Configuration on Ports 5C and 5D.....................................................2.49
Figure 2.53 Two 10/100BASE-T Port Configuration on Ports 5C and 5D ..................................................2.49
Figure 2.54 100BASE-FX and 10/100BASE-T Port Configuration on Ports 5C and 5D ............................2.49
Figure 2.55 Typical External AC/DC Connections—Single Circuit Breaker ..............................................2.51
Figure 2.56 Typical External AC/DC Connections—Dual Circuit Breaker.................................................2.52
Figure 2.57 SEL-421 Example Wiring Diagram Using the Auxiliary TRIP/CLOSE Pushbuttons .............2.53
Figure 3.1 Low-Level Test Interface ............................................................................................................3.2
Figure 3.2 Test Connections Using Three Voltage and Three Current Sources...........................................3.4
Figure 3.3 Test Connections Using Two Current Sources for Phase-to-Phase, Phase-to-Ground, and
Two-Phase-to-Ground Faults...................................................................................................3.5
Figure 3.4 Test Connections Using Two Current Sources for Three-Phase Faults ......................................3.6
Figure 3.5 Test Connections Using a Single Current Source for a Phase-to-Ground Fault..........................3.7
Figure 3.6 Test Connections Using a Single Current Source for a Phase-to-Phase Fault ............................3.8
Figure 3.7 Negative-Sequence Instantaneous Overcurrent Element Settings: QuickSet............................3.10
Figure 3.8 Uploading Group 1 Settings to the SEL-421.............................................................................3.11
Figure 3.9 ELEMENT SEARCH Screen....................................................................................................3.11
Figure 3.10 RELAY ELEMENTS Screen Containing Element 50Q1 .........................................................3.12
Figure 3.11 Group 1 Relay Configuration Settings: QuickSet .....................................................................3.14
Figure 3.12 Breaker 1 Breaker Monitor Settings: QuickSet .........................................................................3.15
Figure 3.13 Group 1 Line Configuration Settings: QuickSet .......................................................................3.16
Figure 3.14 Directional Settings: QuickSet ..................................................................................................3.17
Figure 3.15 Uploading Group 1 and Breaker Monitor Settings to the SEL-421 ..........................................3.18
Figure 3.16 RELAY ELEMENTS LCD Screen Containing Elements F32Q and R32Q.....................................3.18
Figure 3.17 Finding Phase-to-Phase Test Quantities ....................................................................................3.20
Figure 3.18 Phase-Distance Elements Settings: QuickSet............................................................................3.21
Figure 3.19 RELAY ELEMENTS LCD Screen Containing Element MBC2 ..............................................3.22
Figure 4.1 Sample ROTATING DISPLAY ..................................................................................................4.3
Figure 4.2 METER MENU Screens .............................................................................................................4.4
Figure 4.3 METER SUBMENU ...................................................................................................................4.5
Figure 4.4 RMS, FUND, and DEMAND Metering Screens ........................................................................4.6
Figure 4.5 ENERGY, MAX/MIN, and SYNCH CHECK Metering Screens...............................................4.7
Figure 4.6 EVENT SUMMARY Screens.....................................................................................................4.8
Figure 4.7 BREAKER MONITOR Report Screens......................................................................................4.8
Figure 4.8 VIEW CONFIGURATION Sample Screens...............................................................................4.9
Figure 4.9 Factory-Default Front-Panel Target Areas (16 or 24 LEDs).....................................................4.10
Figure 4.10 Operator Control Pushbuttons and LEDs (8 or 12 Pushbuttons)...............................................4.13
Figure 4.11 Factory-Default Operator Control Pushbuttons.........................................................................4.15
Figure 4.12 Bay Control Screen Selected for Rotating Display ...................................................................4.16
Figure 4.13 Configuring PB1_HMI for Direct Bay Control Access ............................................................4.17
Figure 4.14 Pole Discrepancy .......................................................................................................................4.18
Figure 4.15 Bay With Ground Switch (Option 1).........................................................................................4.19
Figure 4.16 Bay Without Ground Switch (Option 2)....................................................................................4.19
Figure 4.17 Tie Breaker Bay (Option 3) .......................................................................................................4.20
Figure 4.18 Bay With Ground Switch (Option 4).........................................................................................4.20
Figure 4.19 Bay Without Ground Switch (Option 5)....................................................................................4.21
Figure 4.20 Transfer Bay (Option 6) ............................................................................................................4.21
Figure 4.21 Tie Breaker Bay (Option 7) .......................................................................................................4.22

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Date Code 20171021 Instruction Manual SEL-421 Relay
List of Figures
Figure 4.22 Bay With Ground Switch (Option 8).........................................................................................4.22
Figure 4.23 Bay Without Ground Switch (Option 9)....................................................................................4.23
Figure 4.24 Bay With Ground Switch (Option 10).......................................................................................4.23
Figure 4.25 Bay Without Ground Switch (Option 11)..................................................................................4.24
Figure 4.26 Left Breaker Bay With Ground Switch (Option 12) .................................................................4.24
Figure 4.27 Right Breaker Bay With Ground Switch (Option 13) ...............................................................4.25
Figure 4.28 Middle Breaker Bay (Option 14)...............................................................................................4.25
Figure 4.29 Left Breaker Bay Without Ground Switch (Option 15) ............................................................4.26
Figure 4.30 Right Breaker Bay Without Ground Switch (Option 16) ..........................................................4.26
Figure 4.31 Bay With Ground Switch (Option 17).......................................................................................4.27
Figure 4.32 Bay Without Ground Switch (Option 18)..................................................................................4.27
Figure 4.33 Left Breaker Bay With Ground Switch (Option 19) .................................................................4.28
Figure 4.34 Left Breaker Bay Without Ground Switch (Option 20) ............................................................4.28
Figure 4.35 Right Breaker Bay With Ground Switch (Option 21) ...............................................................4.29
Figure 4.36 Right Breaker Bay Without Ground Switch (Option 22) ..........................................................4.29
Figure 4.37 Source Transfer (Option 23)......................................................................................................4.30
Figure 4.38 Throw-Over Bus Type 1 Switch (Option 24)............................................................................4.30
Figure 4.39 Throw-Over Bus Type 2 Switch (Option 25)............................................................................4.31
Figure 4.40 Screen 1 .....................................................................................................................................4.31
Figure 4.41 Screen 2 .....................................................................................................................................4.32
Figure 5.1 Current and Voltage Source Connections for the SEL-421 Relay ..............................................5.2
Figure 5.2 Main and Alternate Line-Current Source Assignments...............................................................5.3
Figure 5.3 Combined Currents for Line-Current Source Assignment ..........................................................5.3
Figure 5.4 Breaker Current Source Assignments..........................................................................................5.3
Figure 5.5 ESS := 1, Single Circuit Breaker Configuration..........................................................................5.8
Figure 5.6 ESS := 2, Single Circuit Breaker Configuration..........................................................................5.9
Figure 5.7 ESS := 3, Double Circuit Breaker Configuration......................................................................5.10
Figure 5.8 ESS := 4, Double Circuit Breaker Configuration......................................................................5.11
Figure 5.9 Tapped EHV Overhead Transmission Line...............................................................................5.12
Figure 5.10 ESS := Y, Tapped Line..............................................................................................................5.12
Figure 5.11 ESS := Y, Single Circuit Breaker With Current Polarizing Source Tapped Power
Transformer............................................................................................................................5.13
Figure 5.12 SEL-421 Alpha Quantity Calculation........................................................................................5.16
Figure 5.13 Undervoltage Supervision Logic ...............................................................................................5.18
Figure 5.14 Frequency Element Logic..........................................................................................................5.20
Figure 5.15 Sample TEC Command Response.............................................................................................5.22
Figure 5.16 Sample TEC nCommand Response..........................................................................................5.22
Figure 5.17 Pole-Open Logic Diagram.........................................................................................................5.27
Figure 5.18 LOP Logic Process Overview ...................................................................................................5.30
Figure 5.19 LOP Logic .................................................................................................................................5.32
Figure 5.20 32Q and 32QG Enable Logic Diagram .....................................................................................5.38
Figure 5.21 32V and 32I Enable Logic Diagram..........................................................................................5.38
Figure 5.22 Best Choice Ground Directional Element Logic.......................................................................5.40
Figure 5.23 Negative-Sequence Voltage-Polarized Directional Element Logic ..........................................5.41
Figure 5.24 Zero-Sequence Voltage-Polarized Directional Element Logic .................................................5.41
Figure 5.25 Zero-Sequence Current-Polarized Directional Element Logic..................................................5.42
Figure 5.26 Ground Directional Element Output Logic Diagram ................................................................5.42
Figure 5.27 32P, Phase Directional Element Logic Diagram .......................................................................5.46
Figure 5.28 32Q, Negative-Sequence Directional Element Logic Diagram.................................................5.46
Figure 5.29 CVT Transient Detection Logic ................................................................................................5.48
Figure 5.30 Load-Encroachment Logic Diagram .........................................................................................5.49
Figure 5.31 Load-Encroachment Characteristics..........................................................................................5.50
Figure 5.32 OOS Characteristics ..................................................................................................................5.51
Figure 5.33 OOS Positive-Sequence Measurements ....................................................................................5.54
Figure 5.34 OOS Override Logic..................................................................................................................5.54
Figure 5.35 OOS Logic Diagram..................................................................................................................5.55

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SEL-421 Relay Instruction Manual Date Code 20171021
List of Figures
Figure 5.36 Open-Pole OSB Unblock Logic ................................................................................................5.56
Figure 5.37 Zero-Setting OOS Blocking Function .......................................................................................5.56
Figure 5.38 Swing Center Voltage Slope Detection Logic...........................................................................5.58
Figure 5.39 Starter Zone Characteristic ........................................................................................................5.59
Figure 5.40 Swing Signature Detector Logic................................................................................................5.60
Figure 5.41 Swing Signature Detector Logic................................................................................................5.61
Figure 5.42 Reset Conditions Logic .............................................................................................................5.62
Figure 5.43 Type of Power Swings Detected by the DOSB Function..........................................................5.63
Figure 5.44 Dependable Power-Swing Block Detector Logic (EOOS = Y1) ..............................................5.64
Figure 5.45 Dependable Power-Swing Block Detector Logic (EOOS = Y) ................................................5.65
Figure 5.46 Relay Word Bit DOSB Is the OR Combination of DOSBY1 and DOSBY......................................5.65
Figure 5.47 Logic Diagram of the Three-Phase Fault Detector....................................................................5.66
Figure 5.48 Pole-Open OOS Blocking Logic ...............................................................................................5.66
Figure 5.49 I0/IA2 Angle Supervision During Pole-Open Situation............................................................5.67
Figure 5.50 Blocking of the MAG Signal by the OSBA Fault Detection ....................................................5.67
Figure 5.51 Unblocking of the MAB Signal by the 67QUB Element ..........................................................5.68
Figure 5.52 Directional Element Signals 67QUBF and 67QUBR................................................................5.68
Figure 5.53 OST Scheme Logic Resistive and Reactive Blinders................................................................5.69
Figure 5.54 Logic That Determines Positive-Sequence Impedance Trajectory (EOOS = Y1) ....................5.70
Figure 5.55 Out-of-Step Trip Logic (EOOS = Y1).......................................................................................5.71
Figure 5.56 Out-of-Step Blocking for Zone 1 Through Zone 5....................................................................5.72
Figure 5.57 Zone 1 Mho Ground-Distance Element Logic Diagram ...........................................................5.74
Figure 5.58 Zone 2 Mho Ground-Distance Element Logic Diagram ...........................................................5.75
Figure 5.59 Zones 3, 4, and 5 Mho Ground-Distance Element Logic Diagram...........................................5.76
Figure 5.60 Zone 1 Quadrilateral Ground-Distance Element Logic Diagram..............................................5.78
Figure 5.61 Zone 2 Quadrilateral Distance Element Logic Diagram ...........................................................5.79
Figure 5.62 Zones 3, 4, and 5 Quadrilateral Ground-Distance Element Logic ............................................5.80
Figure 5.63 Zone 1 Mho Phase-Distance Element Logic Diagram ..............................................................5.82
Figure 5.64 Zone 2 Mho Phase-Distance Element Logic Diagram ..............................................................5.83
Figure 5.65 Zones 3, 4, and 5 Mho Phase-Distance Element Logic Diagram..............................................5.84
Figure 5.66 Quadrilateral Phase-Distance Element Characteristic (TANGP = 0)........................................5.86
Figure 5.67 Quadrilateral Phase-Distance Element Characteristic (TANGP = –10 degrees) ......................5.87
Figure 5.68 Network to Determine Homogeneity ........................................................................................5.87
Figure 5.69 Tilt in Apparent Fault Impedance Resulting From Nonhomogeneity.......................................5.88
Figure 5.70 Zone 1 AB Loop Conventional Quadrilateral Phase-Distance Element Logic .........................5.90
Figure 5.71 Zone 2 AB Loop Conventional Quadrilateral Phase-Distance Element Logic .........................5.90
Figure 5.72 Zone 3, 4, and 5 AB Loop Conventional Quadrilateral Phase-Distance Element Logic ..........5.91
Figure 5.73 Zone Timers...............................................................................................................................5.93
Figure 5.74 Phase Instantaneous/Definite-Time Overcurrent Elements.......................................................5.97
Figure 5.75 Residual Ground Instantaneous/Directional Overcurrent Elements..........................................5.98
Figure 5.76 Negative-Sequence Instantaneous/Directional Overcurrent Elements..............................................5.99
Figure 5.77 U.S. Moderately Inverse—U1 .................................................................................................5.103
Figure 5.78 U.S. Inverse—U2 ....................................................................................................................5.104
Figure 5.79 U.S. Very Inverse—U3 ...........................................................................................................5.105
Figure 5.80 U.S. Extremely Inverse—U4...................................................................................................5.106
Figure 5.81 U.S. Short-Time Inverse—U5 .................................................................................................5.107
Figure 5.82 IEC Standard Inverse—C1 ......................................................................................................5.108
Figure 5.83 IEC Very Inverse—C2 ............................................................................................................5.109
Figure 5.84 IEC Extremely Inverse—C3....................................................................................................5.110
Figure 5.85 IEC Long-Time Inverse—C4 ..................................................................................................5.111
Figure 5.86 IEC Short-Time Inverse—C5..................................................................................................5.112
Figure 5.87 Selectable Inverse-Time Overcurrent Element Logic Diagram ..............................................5.113
Figure 5.88 Undervoltage Elements............................................................................................................5.113
Figure 5.89 Overvoltage Elements..............................................................................................................5.114
Figure 5.90 SOTF Logic Diagram ..............................................................................................................5.119
Figure 5.91 Required Zone Directional Settings ........................................................................................5.120

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Date Code 20171021 Instruction Manual SEL-421 Relay
List of Figures
Figure 5.92 DCB Logic Diagram................................................................................................................5.124
Figure 5.93 Permissive Trip Receiver Logic Diagram ...............................................................................5.129
Figure 5.94 POTT Logic Diagram..............................................................................................................5.130
Figure 5.95 POTT Cross-Country Logic Diagram .....................................................................................5.131
Figure 5.96 POTT Scheme Logic (ECOMM := POTT3) With Echo and Weak Infeed.............................5.132
Figure 5.97 Permissive Trip Received Logic Diagram...............................................................................5.135
Figure 5.98 DCUB Logic Diagram.............................................................................................................5.136
Figure 5.99 Trip Logic Diagram .................................................................................................................5.142
Figure 5.100 Two Circuit Breakers Trip Logic Diagram .............................................................................5.145
Figure 5.101 Trip A Unlatch Logic ..............................................................................................................5.146
Figure 5.102 Trip During Open Pole ............................................................................................................5.146
Figure 5.103 Scheme 1 Logic Diagram ........................................................................................................5.147
Figure 5.104 Scheme Y1 Circuit Breaker Failure Logic ..............................................................................5.148
Figure 5.105 Scheme 2 Three-Pole Circuit Breaker Failure Protection Logic .............................................5.149
Figure 5.106 Scheme Y2 Three-Pole Circuit Breaker Failure Logic............................................................5.149
Figure 5.107 Scheme 2 Single-Pole Circuit Breaker Failure Protection Logic ............................................5.150
Figure 5.108 Scheme Y2 Single-Pole Circuit Breaker Failure Protection Logic .........................................5.150
Figure 5.109 Scheme 2 Current-Supervised Three-Pole Retrip Logic .........................................................5.151
Figure 5.110 Scheme Y2 Current-Supervised Three-Pole Retrip Logic ......................................................5.151
Figure 5.111 Scheme 2 Current-Supervised Single-Pole Retrip Logic ........................................................5.151
Figure 5.112 Scheme Y2 Current-Supervised Single-Pole Retrip Logic .....................................................5.152
Figure 5.113 No Current/Residual Current Circuit Breaker Failure Protection Logic Diagram ..................5.152
Figure 5.114 Circuit Breaker Failure Seal-In Logic Diagram ......................................................................5.156
Figure 5.115 Failure to Interrupt Load Current Logic Diagram ...................................................................5.157
Figure 5.116 Flashover Protection Logic Diagram.......................................................................................5.157
Figure 5.117 Circuit Breaker Failure Trip Logic Diagram...........................................................................5.157
Figure 5.118 Partial Breaker-and-a-Half or Partial Ring-Bus Breaker Arrangement...................................5.158
Figure 5.119 Synchronism-Check Voltages for Two Circuit Breakers........................................................5.159
Figure 5.120 Synchronism-Check Settings...................................................................................................5.160
Figure 5.121 Synchronism-Check Relay Word Bits.....................................................................................5.161
Figure 5.122 Example Synchronism-Check Voltage Connections to the SEL-421 .....................................5.163
Figure 5.123 Synchronism-Check Voltage Reference..................................................................................5.164
Figure 5.124 Normalized Synchronism-Check Voltage Sources VS1 and VS2 ..........................................5.165
Figure 5.125 Healthy Voltage Window and Indication ................................................................................5.166
Figure 5.126 Synchronism-Check Voltage Difference Logic.......................................................................5.166
Figure 5.127 Synchronism-Check Enable Logic ..........................................................................................5.168
Figure 5.128 “No Slip” System Synchronism-Check Element Output Response ........................................5.170
Figure 5.129 “Slip—No Compensation” Synchronism-Check Element Output Response..........................5.171
Figure 5.130 “Slip—With Compensation” Synchronism-Check Element Output Response.......................5.173
Figure 5.131 Alternative Synchronism-Check Source 2 Example and Settings...........................................5.175
Figure 6.1 230 kV Overhead Transmission Line..........................................................................................6.1
Figure 6.2 Circuit Breaker Arrangement at Station S...................................................................................6.3
Figure 6.3 500 kV Parallel Overhead Transmission Lines .........................................................................6.19
Figure 6.4 Circuit Breaker-and-a-Half Arrangement: Station S, Line 1.....................................................6.22
Figure 6.5 Quadrilateral Ground-Distance Element Reactive Reach Setting .............................................6.28
Figure 6.6 Definition of Homogeneous Network .......................................................................................6.30
Figure 6.7 Tilt in Apparent Fault Impedance Resulting From Nonhomogeneity.......................................6.31
Figure 6.8 Nonhomogeneous Angle Setting ...............................................................................................6.32
Figure 6.9 Current Distribution During Cross-Country Fault.....................................................................6.44
Figure 6.10 Simplified POTT Scheme KEY1/KEY3 Logic.........................................................................6.45
Figure 6.11 345 kV Tapped Overhead Transmission Line...........................................................................6.54
Figure 6.12 Circuit Breaker Arrangement at Station S.................................................................................6.57
Figure 6.13 Reverse Zone 3 Coordination ....................................................................................................6.62
Figure 6.14 Impedance Diagram...................................................................................................................6.63
Figure 6.15 Load-Encroachment Function ...................................................................................................6.67
Figure 6.16 345 kV Tapped Line Negative-Sequence Network ...................................................................6.73

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SEL-421 Relay Instruction Manual Date Code 20171021
List of Figures
Figure 6.17 345 kV Tapped Line Zero-Sequence Network..........................................................................6.75
Figure 6.18 DC Schematic for DCB Trip Scheme........................................................................................6.80
Figure 6.19 230 kV Parallel Underground Cables........................................................................................6.87
Figure 6.20 Circuit Breaker Arrangement at Station S, Cable 1...................................................................6.90
Figure 6.21 Quadrilateral Ground-Distance Element Reactive Reach Setting.............................................6.95
Figure 6.22 Circuit to Determine Network Homogeneity ............................................................................6.97
Figure 6.23 Apparent Fault Impedance Resulting From Nonhomogeneity..................................................6.98
Figure 6.24 Nonhomogeneous Angle Setting ...............................................................................................6.99
Figure 6.25 External Ground Fault .............................................................................................................6.102
Figure 6.26 Negative-Sequence Fault Current Distribution-External Ground Fault...........................................6.105
Figure 6.27 Reverse Unbalanced Fault on Cable Circuit (Shunt Admittance)...........................................6.109
Figure 6.28 500 kV Power System .............................................................................................................6.119
Figure 6.29 OOS Characteristic Settings Parameters .................................................................................6.121
Figure 6.30 Calculating Setting R1R7 ........................................................................................................6.123
Figure 6.31 Swing Trajectory to Determine the OSBD Setting .................................................................6.125
Figure 6.32 Inner Blinders ..........................................................................................................................6.127
Figure 6.33 OST Characteristics.................................................................................................................6.131
Figure 6.34 230 kV Example Power System ..............................................................................................6.137
Figure 6.35 Circuit Breaker Arrangement at Station S...............................................................................6.138
Figure 6.36 Potential Sources .....................................................................................................................6.140
Figure 6.37 500 kV Power System .............................................................................................................6.141
Figure 6.38 Partial Circuit Breaker-and-a-Half Arrangement at Station S, Line 1.....................................6.143
Figure 6.39 Potential Sources .....................................................................................................................6.147
Figure 6.40 Scheme 1 All Faults and Scheme 2 Multiphase Fault Timing Diagram .................................6.154
Figure 6.41 Scheme 2 Single-Phase Fault Timing Diagram.......................................................................6.155
Figure 6.42 230 kV Power System for Circuit Breaker Failure Scheme 1.................................................6.155
Figure 6.43 Timing Diagram for Setting BFPU1—Scheme 1....................................................................6.157
Figure 6.44 Circuit Breaker Failure Trip and Circuit Breaker Trip DC Connections ................................6.160
Figure 6.45 500 kV Power System for Circuit Breaker Failure Scheme 2.................................................6.162
Figure 6.46 Fault Current Distribution Through Faulted Line at Station S ................................................6.163
Figure 6.47 Timing Diagram for Setting BFPU1—Scheme 2....................................................................6.164
Figure 6.48 Timing Sequences for Circuit Breaker Failure Protection Scheme 2......................................6.165
Figure 6.49 Circuit Breaker BK1 DC Connections (Two Trip Coils) ........................................................6.168
Figure 6.50 230 kV Tapped Overhead Transmission Line.........................................................................6.170
Figure 6.51 Automatic Restoration Timing Diagram .................................................................................6.171
Figure 6.52 SEL-421 Inputs........................................................................................................................6.173
Figure 6.53 Protection Free-Form SELOGIC Control Equations.................................................................6.177
Figure 6.54 Protection Freeform SELOGIC Control Equations...................................................................6.181
Figure 6.55 Ladder Logic Representation, Protection Freeform SELOGIC Control Equations ..................6.183
Figure 7.1 Complex Power (P/Q) Plane........................................................................................................7.4
Figure 7.2 Fixed Analog Section of the Event Report..................................................................................7.9
Figure 7.3 Digital Section of the Event Report...........................................................................................7.11
Figure 7.4 Sample Digital Portion of the Event Report..............................................................................7.12
Figure 7.5 Summary Section of the Event Report ......................................................................................7.13
Figure 7.6 Sample Event Summary Report ................................................................................................7.13
Figure 7.7 Sample Event History................................................................................................................7.15
Figure 10.1 MAP 1:METER Command Example ........................................................................................10.8