Silicon Laboratories Si5395 User manual

UG335: Si5395 Evaluation Board User's
Guide
The Si5395 EVB is used for evaluating the Si5395 Any-Frequency, Any-Output, Jitter-
Attenuating Clock Multiplier. There are two different EVBs for the Si5395. There is a
Grade A and a Grade P board. This user guide is intended for both versions of the
Si5395 EVBS. The device grade and revision is distinguished by a white 1 inch x 0.187
inch label installed in the lower left hand corner of the board. In the example below, the
label "SI5395A-A-EB" indicates the evaluation board has been assembled with an
Si5395 device, Grade A, Revision A, installed. (For ordering purposes only, the terms
“EB” and “EVB” refer to the board and the kit, respectively. For the purpose of this docu-
ment, the terms are synonymous in context.)
KEY FEATURES
• Powered from USB port or external power
supply
• Onboard 48 MHz XTAL or Reference SMA
Inputs allow holdover mode of operation on
the Si5395
• CBPro™ GUI programmable VDD supply
allows device to operate from 3.3, 2.5, or
1.8 V
• CBPro GUI programmable VDDO supplies
allow each of the 10 outputs to have its
own power supply voltage selectable from
3.3, 2.5, or 1.8 V
• CBPro GUI-controlled voltage, current, and
power measurements of VDD and all
VDDO supplies
• Status LEDs for power supplies and
control/status signals of Si5395
• SMA connectors for input clocks, output
clocks, and optional external timing
reference clock
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1. Functional Block Diagram
Below is a functional block diagram of the Si5395 EVB. This evaluation board can be connected to a PC via the main USB connector
for programming, control, and monitoring. See 3. Quick Start or 10.3 Overview of ClockBuilderPro Applications for more information.
Si5395
CLKOUT_0
CLKOUT_0B
Output
Termination
CLKOUT_1
CLKOUT_1B
Output
Termination
CLKOUT_2
CLKOUT_2B
Output
Termination
CLKOUT_3
CLKOUT_3B
Output
Termination
CLKOUT_4
CLKOUT_4B
Output
Termination
CLKOUT_5
CLKOUT_5B
Output
Termination
CLKOUT_6
CLKOUT_6B
Output
Termination
CLKOUT_7
CLKOUT_7B
Output
Termination
48 MHz
XTAL
Input
Termination
Input
Termination
Input
Termination
XA
XB
CLKIN_0
CLKIN_0B
CLKIN_1
CLKIN_1B
CLKIN_2
CLKIN_2B
Power Supply
C8051F380
MCU
+
Peripherals
I2C/SPI Bus
VDDO_0
VDD_Core
VDD_3.3
VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7
VDDO_0 VDD_Core VDD_3.3 VDDO_1 VDDO_2 VDDO_3 VDDO_4 VDDO_5 VDDO_6 VDDO_7
Main USB
Connector
Aux USB
Connector
Ext +5V
Connector
I2C/SPI Bus
+5V_USB
+5V_Aux
+5V_Ext
VDDMCU
Input Clock 0 {
Input Clock 1 {
Input Clock 2 {
}Output Clock 0A
}Output Clock 0
}Output Clock 1
}Output Clock 2
}Output Clock 3
}Output Clock 4
}Output Clock 5
}Output Clock 6
Power only
Power only
VDDO_8 VDDO_9
VDDO_8 VDDO_9
CLKOUT_8
CLKOUT_8B
Output
Termination }Output Clock 7
CLKOUT_9
CLKOUT_9B
Output
Termination }Output Clock 8
Control/
Status
INTR
Alarm_Status
Input
Termination
CLKIN_3/FB_IN
CLKIN_3/FB_INB
Input Clock 3 {
CLKOUT_9A
CLKOUT_9AB
Output
Termination }Output Clock 9A
Output
Termination }Output Clock 9
CLKOUT_0A
CLKOUT_0AB
VDDO_9A VDDO_9A
VDDO_0A VDDO_0A
Figure 1.1. Si5395 EB Functional Block Diagram
UG335: Si5395 Evaluation Board User's Guide
Functional Block Diagram
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2. Si5395 EVB Support Documentation and ClockBuilderPro™ Software
All Si5395 EVB schematics, BOMs, User’s Guides, and software can be found online at: http://www.silabs.com/products/clocksoscilla-
tors/pages/si539x-evb.aspx.
UG335: Si5395 Evaluation Board User's Guide
Si5395 EVB Support Documentation and ClockBuilderPro™ Software
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3. Quick Start
1. Install the ClockBuilderPro desktop software from http://www.silabs.com/CBPro.
2. Connect a USB cable from Si5395 EVB to the PC where the software was installed.
3. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software.
4. You can use ClockBuilderPro to create, download, and run a frequency plan on the Si5395 EVB.
5. For the Si5395 data sheet, go to http://www.silabs.com/timing.
UG335: Si5395 Evaluation Board User's Guide
Quick Start
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4. Jumper Defaults
Table 4.1. Si5395 EVB Jumper Defaults1
Location Type I= Installed
0 = Open Location Type I = Installed 0 = Open
JP1 2-pin O JP23 2-pin O
JP2 2-pin I JP24 2-pin O
JP3 2-pin O JP25 2-pin O
JP4 2-pin I JP26 2-pin O
JP5 2-pin I JP27 2-pin O
JP6 2-pin I JP28 2-pin O
JP7 2-pin I JP29 2-pin O
JP8 2-pin O JP30 2-pin O
JP9 2-pin O JP31 2-pin O
JP10 2-pin I JP32 2-pin O
JP13 2-pin O JP33 2-pin O
JP14 2-pin I JP34 2-pin O
JP15 3-pin 1 to 2 JP35 2-pin O
JP16 3-pin 1 to 2 JP36 2-pin O
JP17 2-pin O JP38 3-pin All Open
JP18 2-pin O JP39 2-pin O
JP19 2-pin O JP40 2-pin O
JP20 2-pin O JP41 2-pin O
JP21 2-pin O J36 5 x 2 Hdr All 5 installed
JP22 2-pin O
Note:
1. Refer to the Si5395 EVB schematics for the functionality associated with each jumper.
UG335: Si5395 Evaluation Board User's Guide
Jumper Defaults
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5. Status LEDs
Location Silkscreen Color Status Function Indication
D27 5VUSBMAIN Blue Main USB +5 V present
D22 3P3V Blue DUT +3.3 V is present
D26 VDD DUT Blue DUT VDD voltage present
D25 INTR Red MCU INTR (Interrupt) active
D21 READY Green MCU Ready
D24 BUSY Green MCU Busy
D27, D22, and D26 are illuminated when USB +5 V, Si5395 +3.3 V, and Si5395 VDD supply voltages, respectively, are present. D25,
D21, and D24 are status LEDs showing on-board MCU activity.
Figure 5.1. Status LEDs
UG335: Si5395 Evaluation Board User's Guide
Status LEDs
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6. External Reference Input (XA/XB)
An external reference (XTAL) is used in combination with the internal oscillator to produce an ultra-low-jitter reference clock for the
DSPLL and to provide a stable reference for the free-run and holdover modes. The Si5395 EVB can also accommodate an external
reference clock instead of a crystal. To evaluate the device with a REFCLK, C111 and C113 must be populated and the XTAL removed
(see the figure below). Also, R197 and R202 must be populated. The REFCLK can then be supplied to J39 and J40. In the case of the
Si5395J-A, which is the grade with the xtal internal to the device, there will be no external xtal supplied on the board and no input from
Ref_XA and Ref_XB. In this case, it is advised to remove R197 and R202.
Figure 6.1. External Reference Input Circuit
UG335: Si5395 Evaluation Board User's Guide
External Reference Input (XA/XB)
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7. Clock Input Circuits (INx/INxB)
The Si5395 EVB has eight SMA connectors (IN0, IN0B – IN3, IN3B) for receiving external clock signals. All input clocks are terminated
as shown below. Note that input clocks are ac-coupled and 50 Ω terminated. This represents four differential input clock pairs. Single-
ended clocks can be used by appropriately driving one side of the differential pair with a single-ended clock. For details on how to con-
figure inputs as single-ended, refer to the Si5395 data sheet.
Figure 7.1. Input Clock Termination Circuit
UG335: Si5395 Evaluation Board User's Guide
Clock Input Circuits (INx/INxB)
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8. Clock Output Circuits (OUTx/OUTxB)
Each of the twenty-four output drivers (12 differential pairs) is ac-coupled to its respective SMA connector. The output clock termination
circuit is shown below. The output signal will have no dc bias. If dc coupling is required, the ac coupling capacitors can be replaced with
a resistor of appropriate value. The Si5395 EVB provides pads for optional output termination resistors and/or low-frequency capacitors.
Note that components with the schematic “NI” designation are not normally populated on the Si5395 EVB and provide locations on the
PCB for optional dc/ac terminations by the end user.
Figure 8.1. Output Clock Termination Circuit
UG335: Si5395 Evaluation Board User's Guide
Clock Output Circuits (OUTx/OUTxB)
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9. Installing ClockBuilderPro (CBPro) Desktop Software
To install the CBOPro software on any Windows 7 (or above) PC, go to http://www.silabs.com/CBPro and download the ClockBuilder-
Pro software.
Installation instructions and User’s Guide for ClockBuilderPro can be found at the download link shown above.
UG335: Si5395 Evaluation Board User's Guide
Installing ClockBuilderPro (CBPro) Desktop Software
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10. Using the Si5395 EVB
10.1 Connecting the EVB to Your Host PC
Once ClockBuilderPro software is installed, connect to the EVB with a USB cable as shown in the figure below:
Figure 10.1. EVB Connection Diagram
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10.2 Additional Power Supplies
Although additional power (besides the power supplied by the host PC’s USB port) is not needed for most configurations, two additional
+5 VDC power supplies (MAIN and AUX) can be connected to J33 and J34 (located on the bottom of the board, near the USB connec-
tor). Refer to the Si5395 EVB schematic for details.
The Si5395 EVB comes preconfigured with jumpers installed at JP15 and JP16 (pins 1–2 in both cases) in order to select “USB”. These
jumpers, together with the components installed, configure the evaluation board to obtain all +5 V power solely through the main USB
connector at J37. This setup is the default configuration and should normally be sufficient.
The following figure shows the correct installation of the jumper shunts at JP15 and JP16 for default or standard operation.
Figure 10.2. JP15–JP16 Standard Jumper Shunt Installation
Note: Some early versions of the 64-pin Si534x-EVBs may have the silkscreen text at JP15–JP16 reversed regarding EXT and USB,
i.e., USB EXT instead of EXT USB. Regardless, the correct installation of the jumper shunts for default or standard operation is on the
right hand side as read and viewed in the figure above.
The general guidelines for single USB power supply operation are as follows:
• Use either a USB 3.0 or USB 2.0 port. These ports are specified to supply 900 mA and 500 mA, respectively, at +5 V.
• If you are working with a USB 2.0 port and you are current limited, turn off enough DUT output voltage regulators to drop the total
DUT current ≤470 mA. (Note: USB 2.0 ports may supply > 500 mA. Provided the nominal +5 V drops gracefully by less than 10%,
the EVB will still work.)
• If you are working with a USB 2.0 and you are current-limited and need all output clock drivers enabled, reconfigure the EVB to drive
the DUT output voltage regulators from an external +5 V power supply as follows:
• Connect an external +5 V power supply to terminal block J33 on the back side of the PCB.
• Move the jumper at JP15 from pins 1–2 USB to pins 2–3 EXT.
10.3 Overview of ClockBuilderPro Applications
Note: The following instructions and screen captures may vary slightly depending on the grade of your device and your version of
ClockBuilder Pro. (The screen captures below were taken for a board labeled "SI5395A-A-EB".) The ClockBuilderPro™ installer will
install two main applications:
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Figure 10.3. Application #1: ClockBuilder ProWizard
Use the CBPro wizard to:
• Create a new design
• Review or edit an existing design
• Export: create in-system programming
Figure 10.4. Application #2: EVBGUI
Use the EVB GUI to:
• Download configuration to EVB’s DUT (Si5395)
• Control the EVB’s regulators
• Monitor voltage, current, and power on the EVB
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Using the Si5395 EVB
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10.4 Common ClockBuilderPro Workflow Scenarios
There are three common workflow scenarios when using CBPro and the Si5395 EVB. These workflow scenarios are:
• Workflow Scenario 1: Testing a Silicon Labs-Created Default Configuration
• Workflow Scenario 2: Modifying the Default Silicon Labs-Created Device Configuration
• Workflow Scenario 3: Testing a User-Created Device Configuration
Each workflow scenario is described in more detail in the following sections.
10.5 Workflow Scenario 1: Testing a Silicon Labs Default Configuration
The flow for using the EVB GUI to initialize and control a device on the EVB is as follows:
Once the PC and EVB are connected, launch ClockBuilderPro by clicking this icon on your PC’s desktop:
Figure 10.5. ClockBuilderPro Desktop Icon
If an EVB is detected, click on the “Open Default Plan” button on the Wizard’s main menu. CBPro automatically detects the EVB and
device type.
Figure 10.6. Open Default Plan
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Once you open the default plan (based on your EVB model number), a popup will appear:
Figure 10.7. Write Design to EVB Dialog
Select “Yes” to write the default plan to the Si5395 device mounted on your EVB. This ensures the device is completely reconfigured
per the Silicon Labs default plan for the DUT type mounted on the EVB.
Figure 10.8. Writing Design Status
After CBPro writes the default plan to the EVB, click on “Open EVB GUI” as shown below:
Figure 10.9. Open EVB GUI
The EVB GUI will appear. Note that all power supplies will be set to the values defined in the device’s default CBPro project file created
by Silicon Labs, as shown in the following figure:
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Figure 10.10. EVB GUI Window
UG335: Si5395 Evaluation Board User's Guide
Using the Si5395 EVB
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10.5.1 Verify Free-Run Mode Operation
Assuming no external clocks have been connected to the INPUT CLOCK differential SMA connectors (labeled “INx/INxB”) located
around the perimeter of the EVB, the DUT should now be operating in free-run mode, as the DUT will be locked to the crystal in this
case.
You can run a quick check to determine if the device is powered up and generating output clocks (and consuming power) by clicking on
the highlighted "Read All" button and then reviewing the voltage, current, and power readings for each VDDx supply.
Note: Switching the VDD and VDDA supplies “Off” and then “On” will power-down and reset the DUT. Each time this is done, you must
go back to the Wizard’s main menu and select “Write Design to EVB” to reload the Silicon Labs default plan into the DUT’s register
space, as shown below.
Figure 10.11. Write Design to EVB
Failure to perform this step will cause the device to read in a preprogrammed plan from its non-volatile memory (NVM). However, the
plan loaded from the NVM may not be the latest plan recommended by Silicon Labs for evaluation.
At this point, you should verify the presence and frequencies of the output clocks (running to free-run mode from the crystal) using ap-
propriate external instrumentation connected to the output clock SMA connectors. To verify that the output clocks are toggling at the
correct frequency and signal format, click on View Design Report as highlighted below.
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Figure 10.12. View Design Report
Your configuration’s design report will appear in a new window, as shown below. Compare the observed output clocks to the frequen-
cies and formats noted in your default project’s Design Report.
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Figure 10.13. Design Report Window
10.5.2 Verify Locked Mode Operation
Assuming you connect the correct input clocks to the EVB (as noted in the Design Report shown above), the DUT on your EVB will run
in “locked” mode.
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10.6 Workflow Scenario 2: Modifying the Default Silicon Labs-Created Device Configuration
To modify the “default” configuration using the CBPro Wizard, click on the links below under “Edit Configuration with Wizard”.
Figure 10.14. Edit Configuration with Wizard
You will now be taken to the Wizard’s step-by-step menus to allow you to change any of the default plan’s operating configurations.
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