Sony CDX-F5500M User manual

1
Ver 1.0 2004. 05
Model Name Using Similar Mechanism CDX-F5500
CD Drive Mechanism Type MG-611MA-186//Q
Optical Pick-up Name KSS1000E
SERVICE MANUAL
E Model
CDX-F5500M
CD player section
Signal-to-noise ratio 120 dB
Frequency response 10 – 20,000 Hz
Wow and flutter Below measurable limit
Tuner section
FM
Tuning range FM tuning interval:
50 kHz/200 kHz switchable
87.5 – 108.0 MHz (at 50 kHz step)
87.5 – 107.9 MHz (at 200 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz/450 kHz
Usable sensitivity 9 dBf
Selectivity 75 dB at 400 kHz
Signal-to-noise ratio 67 dB (stereo),
69 dB (mono)
Harmonic distortion at 1 kHz
0.5% (stereo),
0.3% (mono)
Separation 35 dB at 1 kHz
Frequency response 30 – 15,000 Hz
AM
Tuning range AM tuning interval:
9 kHz/10 kHz switchable
531 – 1,602 kHz (at 9 kHz step)
530 – 1,710 kHz (at 10 kHz step)
Antenna terminal External antenna connector
Intermediate frequency 10.7 MHz/450 kHz
Sensitivity AM: 30 µV
SPECIFICATIONS
Power amplifier section
Outputs Speaker outputs
(sure seal connectors)
Speaker impedance 4 – 8 ohms
Maximum power output 52 W ×4 (at 4 ohms)
General
Outputs Audio outputs terminal
(front, rear/sub switchable)
Power antenna/aerial relay control terminal
Power amplifier control terminal
Inputs TelephoneATT control terminal
Remote controller input terminal
BUS control input terminal
BUS audio input terminal
Antenna/aerial input terminal
Tone controls Low: ±10 dB at 60 Hz (XPLOD)
Mid: ±10 dB at 1 kHz (XPLOD)
High: ±10 dB at 10 kHz (XPLOD)
Power requirements 12V DC car battery
(negative ground)
Dimensions Approx. 178 ×50 ×181 mm
(w/h/d)
Mounting dimensions Approx. 182 ×53 ×161 mm
(w/h/d)
Mass Approx. 1.2 kg
Supplied accessories Card remote commander RM-X115
Parts for installation and connections (1 set)
Front panel case (1)
Design and specifications are subject to change without
notice.
• The tuner and CD sections have no adjustments.
Sony Corporation
e Vehicle Company
Published by Sony Engineering Corporation
9-877-870-01
2004E04-1
© 2004. 05
FM/AM COMPACT DISC PLAYER

2
CDX-F5500M
If the optical pick-up block is defective, please replace the whole
optical pick-up block.
Never turn the semi-fixed resistor located at the side of optical
pick-up block.
TEST DISCS
This set can playback CD-R and CD-ROM discs. The following
test discs should be used to check the capability:
CD-R test disc TCD-R082LMT (Part No. J-2502-063-1)
CD-RW test disc TCD-W082L (Part No. J-2502-063-2)
optical pick-up
semi-fixed resistor
NOTES ON HANDLING THE OPTICAL PICK-UP BLOCK
OR BASE UNIT
The laser diode in the optical pick-up block may suffer electrostatic
breakdown because of the potential difference generated by the
charged electrostatic load, etc. on clothing and the human body.
During repair, pay attention to electrostatic breakdown and also use
the procedure in the printed matter which is included in the repair
parts.
The flexible board is easily damaged and should be handled with
care.
NOTES ON LASER DIODE EMISSION CHECK
The laser beam on this model is concentrated so as to be focused on
the disc reflective surface by the objective lens in the optical pick-
up block. Therefore, when checking the laser diode emission, ob-
serve from more than 30 cm away from the objective lens.
Notes on Chip Component Replacement
•Never reuse a disconnected chip component.
•Notice that the minus side of a tantalum capacitor may be dam-
aged by heat.
SERVICE NOTES
This label is located on the bottom of the chassis.
SAFETY-RELATED COMPONENT WARNING!!
COMPONENTS IDENTIFIED BY MARK 0OR DOTTED LINE
WITH MARK 0ON THE SCHEMATIC DIAGRAMS AND IN
THE PARTS LIST ARE CRITICAL TO SAFE OPERATION.
REPLACE THESE COMPONENTS WITH SONY PARTS WHOSE
PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL OR
IN SUPPLEMENTS PUBLISHED BY SONY.
CAUTION
Use of controls or adjustments or performance of procedures
other than those specified herein may result in hazardous
radiation exposure.

3
CDX-F5500M
Notes on CD-Rs (recordable CDs)/CD-RWs (rewritable
CDs)
This unit can play the following discs:
Type of discs Label on the disc
Audio CD
MP3 files
•Some CD-Rs/CD-RWs (depending on the equipment used for
its recording or the condition of the disc) may not play on this
unit.
•You cannot play a CD-R/CD-RW that is not finalized∗.
•You can play MP3 files recorded on CD-ROMs, CD-Rs, and
CD-RWs.
•A CD-R/CD-RW to which a session can be added can be played.
∗A process necessary for a recorded CD-R/CD-RW disc to be
played on the audio CD player.
EXTENSION CABLE AND SERVICE POSITION
Whenrepairingorservicingthisset,connectthejig(extensioncable)
as shown below.
•Connect the MAIN board (CN350) and the SERVO board (CN2)
with the extension cable (Part No. J-2502-076-1).
zUNLEADED SOLDER
Boards requiring use of unleaded solder are printed with the lead
free mark (LF) indicating the solder contains no lead.
(Caution: Some printed circuit boards may not come printed with
the lead free mark due to their particular size.)
: LEAD FREE MARK
Unleaded solder has the following characteristics.
• Unleaded solder melts at a temperature about 40°C higher than
ordinary solder.
Ordinary soldering irons can be used but the iron tip has to be
applied to the solder joint for a slightly longer time.
Soldering irons using a temperature regulator should be set to
about 350°C.
Caution: The printed pattern (copper foil) may peel away if the
heated tip is applied for too long, so be careful!
•Strong viscosity
Unleaded solder is more viscous (sticky, less prone to flow)
than ordinary solder so use caution not to let solder bridges
occur such as on IC pins, etc.
•Usable with ordinary solder
It is best to use only unleaded solder but unleaded solder may
also be added to ordinary solder.
SERVO BOAR
D
CN2
J-2502-076-1
MAIN BOARD
CN350

4
CDX-F5500M
TABLE OF CONTENTS
1. GENERAL
Location of controls................................................................. 5
Card remote commander RM-X115........................................ 5
Connections ............................................................................. 6
2. DISASSEMBLY
2-1. Sub Panel Assy .................................................................... 7
2-2. CD Mechanism Block ......................................................... 8
2-3. Main Board ......................................................................... 8
2-4. Chassis (T) Sub Assy .......................................................... 9
2-5. Roller Arm Assy .................................................................. 9
2-6. Chassis (OP) Assy ............................................................. 10
2-7. Optical Pick-up ................................................................. 10
2-8. SL Motor Assy (M902) ..................................................... 11
2-9. LE Motor Assy (M903) ..................................................... 11
2-10. Servo Board....................................................................... 12
3. DIAGRAMS
3-1. IC Pin Descriptions ...........................................................13
3-2. Block Diagram –CD Section–........................................... 19
3-3. Block Diagram –Main Section–........................................ 20
3-4. Block Diagram –Display Section–.................................... 21
3-5. Circuit Boards Location .................................................... 21
3-6. Printed Wiring Boards –CD Mechanism Section–............ 22
3-7. Schematic Diagram –CD Mechanism Section (1/2)– ....... 23
3-8. Schematic Diagram –CD Mechanism Section (2/2)– ....... 24
3-9. Printed Wiring Board –Main Section– .............................. 25
3-10. Schematic Diagram –Main Section (1/2)– ........................ 26
3-11. Schematic Diagram –Main Section (2/2)– ........................ 27
3-12. Printed Wiring Board –Sub Section– ................................ 28
3-13. Schematic Diagram –Sub Section– ................................... 28
3-14. Printed Wiring Board –Key Section– ................................ 29
3-15. Schematic Diagram –Key Section–................................... 30
3-16. IC Block Diagrams............................................................ 31
4. EXPLODED VIEWS
4-1. Main Section ..................................................................... 34
4-2. Front Panel Section ........................................................... 35
4-3. CD Mechanism Section (1) ............................................... 36
4-4. CD Mechanism Section (2) ............................................... 37
4-5. CD Mechanism Section (3) ............................................... 38
4-6. CD Mechanism Section (4) ............................................... 39
5. ELECTRICAL PARTS LIST ........................................ 40

5
CDX-F5500M
SECTION 1
GENERAL This section is extracted
from instruction manual.

6
CDX-F5500M
Connections

7
CDX-F5500M
SECTION 2
DISASSEMBLY
Note : This set can be disassemble according to the following sequence.
Note : Follow the disassembly procedure in the numerical order given.
2-1. SUB PANEL ASSY
2 two claw
s
3 two claws
5 sub panel assy
1 two screws
(+PTT 2.6
x 6)
CN101
4
2-1. SUB PANEL ASSY
(Page 7)
2-2. CD MECHANISM BLOCK
(Page 8)
SET
2-3. MAIN BOARD
(Page 8) 2-4. CHASSIS (T) SUB ASSY
(Page 9)
2-5. ROLLER ARM ASSY
(Page 9)
2-6. CHASSIS (OP) ASSY
(Page 10)
2-8. SL MOTOR ASSY (M902)
(Page 11)
2-10. SERVO BOARD
(Page 12)
2-7. OPTICAL PICK-UP
(Page 10) 2-9. LE MOTOR ASSY (M903)
(Page 11)

8
CDX-F5500M
2-2. CD MECHANISM BLOCK
2-3. MAIN BOARD
7 bracket (CD)
5 CD mechanism block
4 CN350
3
1 screw
(+PTT 2.6 x 6
)
2 screw
(+PTT 2.6 x 6)
6 two screws
(+PTT 2.6 x 4)
1 three ground point screws
(+PTT 2.6 x 6)
insulating sheet
3 MAIN board
2 two screws
(+PTT 2.6
x 8
)

9
CDX-F5500M
2-4. CHASSIS (T) SUB ASSY
2-5. ROLLER ARM ASSY
5 SENSOR board
6 chassis (T) sub assy
4 claw
3 claw
1 two screws
(+P 1.7
x 2.2)
2 two screws
(+P 1.7
x 2.2)
3 washer
4 worm wheel (RA)
5 roller arm assy
1 spring (RAL)
2 spring (RAR)

10
CDX-F5500M
2-6. CHASSIS (OP) ASSY
2-7. OPTICAL PICK-UP
4 washer
0 coil spring (damper)
9 two coil springs (damper)
qa chassis (OP) assy
5 gear (LE1)
1 CN1
lever (D)
slider (R)
6
7
8
2 Remove the six solderings.
3 tension coil spring (KF)
1 tension coil spring (CHKG
)
2 chucking arm sub assy
3 screw
(+B 1.4
x 5)
4 rack (SL)
5 claw
6 main shaft
7 optical pick-up

11
CDX-F5500M
2-9. LE MOTOR ASSY (M903)
2-8. SL MOTOR ASSY (M902)
1 screw
(+P 1.4 x 1.8)
2 SL motor assy (M902)
2 washer
4
qd
3
gear (LE1)
7 leaf spring (LE)
5
lever (D)
bracket (LEM)
slider (R)
6 screw
(+P 1.7
x 2.2)
8 screw
(+M 1.7
x 2.5)
qa screw
(+M 1.7
x 2.5)
qf two toothed lock screws
(+M 1.4
)
qs screw
(+M 1.7
x 2.5)
9 bearing (LEB)
0 woam (LEB) assy
qg LE motor assy
(M903)
1 Remove the two solderings.

12
CDX-F5500M
2-10. SERVO BOARD
3 CN1
5 claw
6 SERVO board
4 toothed lock screw
(M 1.7)
1 Remove the eight solderings.
2 Remove the three solderings.

13
CDX-F5500M
SECTION 3
DIAGRAMS
3-1. IC PIN DESCRIPTIONS
• IC3 CXD3059BR (DIGITAL SERVO/DIGITAL SIGNAL PROCESSOR) (SERVO BOARD (1/2))
Pin No. Pin Name I/O Pin Description
1MIRR I/O Mirror signal input/output (Not used in this set)
2DFCT I/O Defect signal input/output (Not used in this set)
3FOK I/O Focus OK signal input/output
4VSS — Ground
5LOCK I/O Lock signal input/output (Not used in this set)
6MDP O Spindle motor servo control signal output
7SSTP I Disc most inner detection signal input (Fixed at L in this set)
8IOVSS1 — Digital ground
9SFDR O Sled drive signal output (FWD direction)
10 SRDR O Sled drive signal output (REV direction)
11 TFDR O Tracking drive signal output (FWD direction)
12 TRDR O Tracking drive signal output (REV direction)
13 FFDR O Focus drive signal output (FWD direction)
14 FRDR O Focus drive signal output (REV direction)
15 IOVDD1 — Digital power supply pin (+3.3 V)
16 AVDD0 — Analog power supply pin (+3.2 V)
17 AVSS0 — Analog ground
18 NC — Not used. (Open)
19 E I E signal input
20 F I F signal input
21 TEI I Tracking error signal input
22 TEO O Tracking error signal output
23 FEI I Focus error signal input
24 FEO O Focus error signal output
25 VC I/O VC voltage output/Center voltage input
26 A I A signal input
27 B I B signal input
28 C I C signal input
29 D I D signal input
30 NC — Not used. (Open)
31 AVDD4 — Analog power supply pin (+3.2 V)
32 RFDCO I/O RFDC signal input/output (Not used in this set)
33 PDSENS I Reference voltage input (Fixed at L in this set)
34 AC_SUM O RFAC summing amplifier signal output
35 EQ_IN I Equalizer circuit signal input
36 LD O APC amplifier signal output
37 PD I APC amplifier signal input
38 NC — Not used. (Open)
39 RFC I EQ cut off frequency adjustment input
40 AVSS4 — Analog ground
41 RFACO O RFAC signal output
42 RFACI I RFAC signal input
43 AVDD3 — Analog power supply pin (+3.2 V)
44 BIAS I Asymmetry circuit constant current input
45 ASYI I Asymmetry comparate voltage input
46 ASYO O EFM full swing signal output
47 VPCO O Charge pump output
48 VCTL I VCO2 control voltage input
49 AVSS3 — Analog ground
50 CLTV I VCO1 control voltage input
51 FILO O Filter signal output

14
CDX-F5500M
Pin No. Pin Name I/O Pin Description
52 FILI I Filter signal input
53 PCO O Charge pump output
54 AVDD5 — Analog power supply pin (+3.3 V)
55 DDVROUT O DC/DC converter output
56 DDVRSEN I DC/DC converter output voltage monitor signal input
57 AVSS5 — Analog ground
58 DDCR I Reset signal input
59 NC — Not used. (Open)
60 BCKI I D/A interface bit clock signal input
61 PCMDI I D/A interface serial data signal input
62 LRCKI I D/A interface LR clock signal input
63 LRCK O D/A interface LR clock signal output
64 VSS — Ground
65 PCMD O D/A interface serial data signal output
66 BCK O D/A interface bit clock signal output
67 VDD — Power supply pin (+2.6V)
68 EMPH O Not used. (Open)
69 EMPHI I Not used. (Fixed at L in this set)
70 IOVDD2 — Digital power supply pin (+3.3 V)
71 DOUT — Digital out signal output (Not used in this set)
72, 73 TEST I Test pin (Normally, fixed at L)
74 IOVSS2 — Digital ground
75 NC — Not used. (Open)
76 XVSS — Ground
77 XTAO O Master clock signal output (16.9344 MHz)
78 XTAI I Master clock signal input (16.9344 MHz)
79 XVDD — Power supply pin (+2.6 V)
80 AVDD1 — Analog power supply pin (+3.3 V)
81 AOUT1 O L channel analog signal output
82 VREFL O L channel reference voltage output
83, 84 AVSS1,AVSS2 — Analog ground
85 VREFR O R channel reference voltage output
86 AOUT2 O R channel analog signal output
87 AVDD2 — Analog power supply pin (+3.3 V)
88 NC — Not used. (Open)
89 IOVDD0 — Digital power supply pin (+3.3 V)
90 RMUT O R channel “0” detection flug output
91 LMUT O L channel “0” detection flug output
92 NC — Not used. (Open)
93 XTSL I Sub clock signal input (Fixed at L in this set)
94 IOVSS0 — Digital ground
95 XTACN I Oscillation circuit control signal input (Fixed at H in this set)
96 SQSO O Sub 80 bit, PCM peak and level data signal output
97 SQCK I Clock signal input
98 SBSO O Sub P-W serial data signal output (Not used in this set)
99 EXCK I Clock signal input (Not used in this set)
100 XRST I System reset signal input
101 SYSM I Mute signal input (Fixed at L in this set)
102 DATA I Serial data signal input
103 VSS — Ground
104 XLAT I Latch signal input
105 CLOK I Serial data transfer clock signal input
106 VDD — Power supply pin (+2.6 V)

15
CDX-F5500M
Pin No. Pin Name I/O Pin Description
107 SENS O SENS signal output
108 SCLK I Clock signal input
109 ATSK I/O Input/output for anti-shock. (Fixed at L in this set)
110 WFCK O WFCK signal output (Not used in this set)
111 XUGF O XUGF signal output (Not used in this set)
112 XPCK O XPCK signal output (Not used in this set)
113 GFS O GFS signal output
114 C2PO O C2PO signal output
115 SCOR O Sub code sync signal output
116 VDD — Power supply pin (+2.6 V)
117 C4M O 4.2366 MHz signal output (Not used in this set)
118 WDCK O Word clock signal output (Not used in this set)
119 COUT I/O Track count signal output/output (Not used in this set)
120 NC — Not used. (Open)

16
CDX-F5500M
• IC500 MN101E01JRA (SYSTEM CONTROL) (MAIN BOARD (2/2))
Pin No. Pin Name I/O Pin Description
1DAVDD — D/A converter power supply (+) pin (+3.3 V)
2NCO O Not used. (Open)
3DAVSS — D/A converter power supply (–) pin
4UNISO O SONY-BUS data output
5UNISI I SONY-BUS data input
6UNICKO O SONY-BUS clock output
7RETRA_SW I Not used. (Open)
8, 9 NCO O Not used. (Open)
10 VDD1 — Power supply pin (+3.3 V)
11 MMOD I Not used. (Fixed at L in this set)
12 OSCOUT O Main clock output (27.648 MHz)
13 OSCIN I Main clock input (27.648 MHz)
14 VSS1 — Ground
15 XIN I Sub clock input (32.768 kHz)
16 XOUT O Sub clock output (32.768 kHz)
17 VDD2 — Power supply pin (+3.3 V)
18 MOD1 — Not used. (Fixed at H in this set)
19 RESET I Microcomputer reset input
20 RCIN1 I Rotary commander SHIFT key input
21 ACCIN I Accessory power supply detection input
22 TESTIN I Test mode detection input
23 TELATT I Telephone attenuator detection input
24 ATT O Audio mute control output
25 ADON O A/D converter power supply control output
26 NCO O Not used. (Open)
27 KEYACK I Key acknowledge detection input
28 TUATTIN I Not used. (Fixed at L in this set)
29 CDON I Servo power supply control input from CD system control IC.
30 CDMON I Loading 6V power supply control input from CD system control IC.
31 BUIN I Backup power supply detection input
32 to 35 NCO O Not used. (Open)
36 BUSON O BUS ON output to CD system control IC.
37 SYSRST O System reset output to CD system control IC.
38 to 41 NCO O Not used. (Open)
42 Z_MUTE I Mute zero cross detection input from CD system control IC.
43 to 49 NCO O Not used. (Open)
50 BBESEL I Fixed at H in this set.
51 NCO O Not used. (Open)
52 AREASEL1 I Destination area initial setting input (Fixed at H in this set)
53 AREASEL0 I Destination area initial setting input (L: 10K, H: 9K)
54 to 56 NCO O Not used. (Open)
57 EJECT_OK_SW O Not used. (Open)
58 PANELSW I Front panel detach detection input (L: with front panel, H: without front panel)
59 DIAG I Mode input from power amp IC.
60 VOLATT O Attenuator control output to electronic volume IC.
61 NOSESW O Nose detection output
62 NCO O Not used. (Open)
63 VSS2 — Ground
64 TUATT O Tuner mute control output
65 NCO (TUON) O Not used. (Open)
66 NSMASK O Not used. (Open)
67 E2P_CKO O Serial clock output to EEPROM communication.

17
CDX-F5500M
Pin No. Pin Name I/O Pin Description
68 E2P_SIO I/O Serial data input/output with EEPROM communication.
69 DOORIND O Door indicator detection output
70 AMPSTB O Not used. (Open)
71 NCO O Not used. (Open)
72 FLS.SO/LCDSO O Serial data output to LCD driver IC.
73 FLS.SI/LCDCE O Chip enable output to LCD driver IC.
74 LCDCKO O Serial clock output to LCD driver IC.
75 to 78 NCO O Not used. (Open)
79 I2C_SIO I/O I2C bus serial data input/output
80 NCO O Not used. (Open)
81 I2C_CKO O I2C bus serial clock output
82 DAVN I Not used. (Fixed at L in this set)
83 SIRCS I SIRCS signal input
84 NCO O Not used. (Open)
85 BEEP O Beep output to power amp IC.
86 to 88 NCO O Not used. (Open)
89 VDD3 — Power supply pin (+3.3 V)
90 NCO O Not used. (Open)
91 VSS3 — Ground
92 QUALITY I Not used. (Fixed at L in this set)
93 VSM I S-meter voltage detection input
94, 95 KEYIN1, 0 I Key input 1, 0
96 RCIN0 I Rotary commander key input
97 to 99 NCO O Not used. (Open)
100 VREF+ — A/D converter power supply (+) pin (+3.3 V)

18
CDX-F5500M
• Waveforms
— Servo Board —
(MODE: CD PLAY)
IC3 whwk (A, C)
3
0V
Approx.
150mVp-p
16.9344MHz
IC3 uj (XTAO)
0V
2
Approx. 100mVp-p
IC3 wd (FEI)
1
Approx. 100mVp-p
IC3 wa (TEI)
IC3 wjwl (B, D)
4
6
2Vp-p
IC3 ra (RFACO)
5
18.43MHz
IC4 ia (X1)
7
1Vp-p
Approx.
150mVp-p
Approx.
0.8Vp-p
THIS NOTE IS COMMON FOR PRINTED WIRING
BOARDS AND SCHEMATIC DIAGRAMS.
(In addition to this, the necessary note is
printed in each block.)
for schematic diagram:
•All capacitors are in µF unless otherwise noted. (p: pF)
50 WV or less are not indicated except for electrolytics
and tantalums.
•All resistors are in Ωand 1/4W or less unless otherwise
specified.
•%: indicates tolerance.
•f: internal component.
•C: panel designation.
•A: B+ Line.
•Powervoltageisdc 14.4V and fed with regulated dcpower
supply from ACC and BATT cords.
•VoltagesaretakenwithaVOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
•Waveforms are taken with a oscilloscope.
Voltage variations may be noted due to normal produc-
tion tolerances.
•Circled numbers refer to waveforms.
•Signal path.
F: FM
f: AM
J: CD
for printed wiring boards:
•X: parts extracted from the component side.
•Y: parts extracted from the conductor side.
•a: Through hole.
•: Pattern from the side which enables seeing.
(The other layer’s patterns are not indicated.)
Note: The components identified by mark 0or dotted line
with mark 0are critical for safety.
Replace only with part number specified.
Caution:
Pattern face side: Parts onthepatternfaceside seen fromthe
(Side B) pattern face are indicated.
Parts face side: Parts on the parts face side seen from the
(Side A) parts face are indicated.
— Main Board —
2
32.768kHz
IC500 qh (XOUT)
2.8Vp-p
1
27.648MHz
IC500 qs (OSCOUT)
2.6Vp-p

19 19
CDX-F5500M
CDX-F5500M
46
ASYO
RF AMP,DIGITAL SERVO,
DIGITAL SIGNAL PROCESSOR
IC3
41
RFACO
24
FEO
22
TEO
42 RFACI
23 FEI
21 TEI
13 FFDR
PD1
PD2
E
F
I-V AMP
PD LD
DETECTOR
45 ASYI
27
26
29
28
19
20
E
C
D
A
B
F
36 LD 37
PD
(FOCUS)
(TRACKING)
2-AXIS DEVICE
OPTICAL
PICK-UP BLOCK
(KSS1000E)
• Signal path
: CD
LASER DIODE
M
M
M
13
12
VO1–
VO1+
6
7
VO4+
VO4–
8
9VO3–
VO3+
5
4
VOL+
VOL–
FWD
REV
1
2
VIN2+ 22
14 FRDR
VIN2– 21
11 TFDR
VIN1+B 19
12 TRDR
VIN1–B 18
9SFDR
VIN4+ 31
10 SRDR
VIN4– 32
6MDP
VIN3+ 25
MUTE 34
11
10
VO2–
VO2+
M903
(LOADING)
M901
(SPINDLE)
M902
(SLED)
FOCUS/TRACKING COIL DRIVE,
SLED/SPINDLE/LOADING
MOTOR DRIVE
IC1
3
FOK
96
SQSO
97
SQCK
100
XRST
102
DATA
104
XLAT
105
CLOK
107
SENS
CD-L
81
AOUT1
86
AOUT2 R-CH
18 CD SQCK
15 CD XRST
14 CD DATA
13 CD XLAT
53 MEC_SELFSW
45 MEC_INSW
42 MEC_LIMIT
12 CD CLOK
11 CD SENS
108
SCLK 10 CD SCLK
113
GFS 8CD GFS
114
C2PO 7CD C2PO
115
SCOR 52 CD SCOR
81 X1
80 X0
MEC LOAD
43
MEC EJECT
44
CD
SYSTEM CONTROL
IC4
AUDIO INTERFACE
IC8
+1.5V REG
IC7
SYSTEM CONTROL
IC500 (1/3)
19 CD FOK
16 CD SQSO
DRON
41
SD1O
14
LRCK1B
19
LRCK1A
16
SD0O
11
BCK1B
18
BCK1A
15
CLCK
22
SRMSTB
41
RESET
2
STANDBY
3
BUCK
36
I2C SCL
7
I2C SDA
6
BUSO
28
SW2
(SELF)
46 MEC_DSW
SW1
(DOWN)
SW3
(DISC IN)
SW4
(LIMIT)
91
LMUT 22 CD LMUT
90
RMUT 23 CD RMUT
51
BU IN
75
RSTX
61
EJECT OK
67
MECON CHK
69
EMPH
32
DEC SDA
31
DEC SCL
30
DEC INT
29
DEC STBY
28
DEC XRST
27
DEC SSTBY
37
DEC XMUTE
65
DECON
63
MECON
64
CDON
66
ZMUTE
60
A ATT
PD1
E
F
LD
PD
FCS+
FCS–
TRK+
TRK–
PD2
LD DRIVE
Q1
+3.3V
CONTROL
Q5,6
+1.5V
CONTROL
Q2,3
• R-ch is omitted due to same as L-ch.
77
78
X1
16.9344MHz
X2
18.43MHz
XTAI
XTAO
66
BCK
60
BCKI
61
PCMDI
63
LRCK
62
LRCKI
65
PCMD
PANEL SW
M-ATT
BU IN
SYS RST
58
CD ON
VOUT
29
CDM ON
30
Z MUTE
MECH+6V KEY BOARD
42
56
UNISI
25
RXD
57
UNISO
26
TXD
58
UNICLK
UNI SI
UNI SO
UNI CLK
50
BUS ON BUS ON
68
CDON CHK
15 VDD
3
CE
SERVO 3.3V
+1.5V
VDDT+3.3V
BU 3.3V
MAIN
SECTION
MAIN
SECTION
A
B
3-2. BLOCK DIAGRAM — CD SECTION —
(Page 20)
(Page 20)

2020
CDX-F5500M
CDX-F5500M
J1
(ANTENNA) 1ANT
CDL
CDR
CD-L
TU-L
R-CH
3
R
AUDIO 8.3V
TUNER UNIT
TU1
6
S-METER
14
SDA
SYSTEM CONTROL
IC500 (2/3)
24
ACCIN 21
TELATT 23
AMPSTB 70
BEEP 85
CD
SECTION
A
CD
SECTION
B
3
11
CN700
J400
1
9
FL+
FL-
2
10
RL+
RL-
4
12
13
7
FR+
FR-
15
RR+
RR-
TEST
ACC
ATT
16 +B (BATT)
8GND
R-CH
F901
10A
TU_ATT
BU3.3V
17
19
18
BATT
BATT
EEP_CKO
67
VSM
13
SCL
ATT
BATT
D493
59
TESTIN
DIAG
22
93
VOLATT
60
SOUND CONTROL
ELECTRONIC VOLUME
IC400
BUS-LCH AP2
5
C2
9
B2
7
SDA
SCL
MUTE
CONT.
EVR
29
I2C_SIO
I2C_CKO
79
81
17
E2P-SDA
16
E2P-SCL
7
TUN MUTE
11
VDD5V
10
VCC8.3V
68 EEP_SIO
64
R-CH
25
29
AUDIO OUT FRONT
-5
L
R
-6
R-CH
5AMP-R
27
35
37
34
33
31
30
6ANT-R
BEEP
STB
FL
RL
SUB-L
4SCL
2SDA
CONT.
9
7
6
20
POWER AMP
IC300 (1/2)
MULTIPLE VOLTAGE
REGULATOR
IC300 (2/2)
VP2
VP1
• Signal path
:FM
:AM
:CD
• R-ch is omitted due to same as L-ch.
AUDIO OUT REAR
-3
L
R
-4
R-CH
BUS AUDIO IN
-1
L
R
-2
R-CH
12
BUIN
M-ATT
31
UNI CKO 6
4
L
OUTF2
23
OUTR2
22
SYSRST 37
RESET 19
+5V REG.
Q3
RESET
IC502
LINE MUTE
CONTROL
Q491,492
TEL
ATT
Q701
I2C
BUS
ACC
CHECK
Q702
MUTE
Q440
MUTE
Q450
11
MUTE
TONE
INPUT SELECTOR
EFFECT
OUTS2
17
MUTE
Q480
5
3
DIAG
AMP-REM
ANT-REM
B.UP+B
PANEL+B
MECH 6V
SERVO 3.3V
AUDIO +B
BU5V
PANEL+B
MECH 6V
SERVO 3.3V
AUDIO 8.3V
VP
D302
D301
D603
D602
D351
D601
S103
RESET
BUS INTERFACE
IC600
MUTE
16
22
I2C
BUS
31
30
UNI SI
UNI SO
UNI CLK
BUS ON
BU IN
SYS RST
B/U C
10
RST
13
DATA IN
9
CLK IN
11
BUS IN
12
DATA OUT
8
12
BU5VBU3.3V +3.3V REG
IC501
32
UNI SI 5
UNI SO 4
BUS ON 36
BATT 3
RST 2
DATA I/O 64
5
6
1
7
8
2
3
CLK 4
BUS ON 1
BATTERY
CHECK
Q605
BUS ON
SWITCH
Q600,601
CN600
(BUS CONTROL IN)
3-3. BLOCK DIAGRAM — MAIN SECTION —
(Page 19)
(Page 19)