7
D-E330/E331
Pin No. Pin name I/O Description
SECTION 5
DIAGRAMS
5-1. EXPLANATION OF IC TERMINALS
IC801 (SYSTEM CONTROL)T5AW5-Z5-M1
1 GND – Ground terminal.
2 XIN I System clock input.
3 XOUT O Not used (OPEN).
4 TEST I Test mode terminal (FiXed to “L”).
5 VCPU – Power supply for CPU & I/O.
6 FOK_I I Focus OK signal input.
7 XBUSY_I I DSP’s auto sequencer status.
8 XRESET_I I/O Micon reset terminal.
9 XSTOP_I I Not used (FiXed to “L”).
10 DFCT CTRL O Not used (OPEN).
11 SCOR_I I SCOR pulse input.
12 HPSW_O O Headphone IC power switch.
13 DEFECT O DEFECT signal output (Not used).
14 XPOWLT_O O Power IC’s serial interface latch output.
15 R/XW_O O DSP’s serial interface Read/Write signal output.
16 MSDTI I Serial interface input.
17 MSDTO O Serial interface output.
18 SCK_O O Serial interface clock output.
19 AVCPU – Power supply for CPU and I/O.
20 VREFH – Analog reference voltage forA/D converter.
21 AD_SEL I Test mode detection input
22 AD_CHGMNT I Charging monitor input.
23 AD_KEY2 I Key input.
24 AD_BATMNT I Battery voltage monitor input.
25 AD_KEY I Set’s key detection input.
26 AD_RMKEY I Not used (OPEN).
27 AD_DCINMNT I DC voltage monitoring input.
28 XOPEN_I I OPEN switch status detection input.
29 P50 O Not used (OPEN).
30 BEEP_O O BEEP sound
31 TSB O Not used (OPEN).
32 VDD_EEPROM – Power supply for EEPROM (OPEN).
33 P44 O Not used (OPEN).
34 XNONCHG_I I Charging feature detection
35 P42 O Not used (OPEN).
36 FRANCE_I I France version detection input.
37 X4M/16M_I I DRAM size selection terminal (OPEN).
38 CMPON_I I ESP switch status detection input.
39 XTSB/PANA-HP O Not used (fixed at “L”) (OPEN).
40 HOLD_I I HOLD switch status detection input.
41 SEG15 O Not used (OPEN).
42-55 SEG1-14 O LCD segment output.
56 SEG0 O Not used (OPEN).
57-60 COM0-3 O LCD common output.
61-63 V1-3 – LCD driver booster.
64 C1 – LCD driver booster.
65 C0 – LCD driver booster.
