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  9. Sony SPP-SS965 - Cordless Telephone User manual

Sony SPP-SS965 - Cordless Telephone User manual

MICROFILM
SERVICE MANUAL
CORDLESS TELEPHONE
US Model
Canadian Model
General
Spread method
Direct-Sequence Spread-Spectrum
Access method
FDMA-TDD
Operation frequency
902-928 MHz (100 mW)
Operating channel
20 channels
Dial signal
Tone, 10 PPS (pulse) selectable
Supplied accessories
AC power adaptor (AC-T46)
Telephone line cords (2)
Wall bracket/stand for base phone
Rechargeable battery pack (BP-T24)
Directories
Handset
Power source
Rechargeable battery pack BP-T24
Battery life
Standby: Approx. 10 days (RING ON mode)
Approx. A month (RING OFF mode)
Talk: Approx. 6 hours
Dimensions
Approx. 58 x 177 x 46 mm (w / h / d),
antenna excluded
(approx. 2 3/8x 7 x 1 13/16 inches)
Antenna: Approx. 72 mm
(approx. 2 7/8inches)
Mass
Approx. 250 g
(approx. 8.8 oz), battery included
Base phone
Power source
DC 9V from AC power adaptor
AC-T46
Battery charging time
Approx. 12 hours
Dimensions
Approx. 170 x 60 x 214 mm (w / h / d),
antenna excluded
(approx. 6 3/4x 2 3/8x 8 1/2inches)
Antenna: Approx. 165 mm
(approx. 6 1/2inches)
Mass
Approx. 580 g
(approx. 1 lb 4 oz), wall bracket excluded
Design and specifications are subject to
change without notice.
SPECIFICATIONS
SPP-SS965
SPP-SS965
– 39 – – 40 –
7-7. SCHEMATIC DIAGRAM – BASE MAIN Section (1/3) – • See page 34 for Waveform. •See page 54 for IC Block Diagrams.
(Page 46)
(Page 43) (Page 43)
(Page 41)
(Page
48)
SPP-SS965
– 41 – – 42 –
7-8. SCHEMATIC DIAGRAM – BASE MAIN Section (2/3) – • See page 34 for Waveform. •See page 53 for IC Block Diagrams.
(Page
40)
(Page 43)
SPP-SS965
– 43 – – 44 –
7-9. SCHEMATIC DIAGRAM – BASE MAIN Section (3/3) – • See page 53 for IC Block Diagrams.
(Page
40)
(Page 39)
(Page 41)
– 46 –
SPP-SS965
7-11. SCHEMATIC DIAGRAM – BASE KEY Section –
(Page 39)
SPP-SS965
– 47 – – 48 –
7-12. PRINTED WIRING BOARD – BASE LCD Section – 7-13. SCHEMATIC DIAGRAM – BASE LCD Section –
(Page 35)
(Page 40)
SPP-SS965
– 51 – – 52 –
7-15. SCHEMATIC DIAGRAM – HAND MAIN Section – • See page 34 forWaveform. •See page 54 for IC Block Diagrams.
– 53 – – 54 –
IC401 10497-15 (HAND MAIN BOARD)
IC701 10497-15 (BASE MAIN BOARD) IC502 S-24C16AFJ-TB (HAND MAIN BOARD)
IC951 S-24C02AFJ-TB (BASE MAIN BOARD)
12 3 45 6 7 8
9
10
16
15
14
13
12
11
MODULATOR
& FILTER
CONTROL
REGISTOR
16 BIT
REGISTOR
16 BIT
REGISTOR MODULATOR
& FILTER
1719 182021222324
28
29
30
27
26
25
31
32
VOXRNT
VOXSND
AVDD
LINE-IN
AVSS
MICIN
RBIAS
NC
REFCNTL
XCLKO
NC
ICLK
FRAM
SPKPO
SPKMO
LINEO
RESETB
MCLK
DVSS
DATAI
DATAO
DVDD
NC
NC
NC
NC
NC
NC
NC
AGND
VREF
MICBIAS
8
VCC
7
TEST INPUT
6
SCL
5
SDA
1
NC
2
NC
3
NC
4
VSS
START
STOP
LOGIC
CONTROL
LOGIC
START CYCLE H.V. GENERATION
TIMING
& CONTROL
E PROM
32 x 32
2
32
XDEC
INC
LOAD
5
R/W
PIN
2
8D
OUT
CK
32
WORD
ADDRESS
COUNTER
YDEC
D
OUT
ACK
DATA REGISTER
• IC Block Diagrams
IC103 MC34118DW (BASE MAIN BOARD) IC104 MC34119DR2 (BASE MAIN BOARD)
+
8 7 6 5
4321
_
+
_
VO2
CD
CF 2
CF 1
V in
GN
D
Vcc
VO1
BIAS
CIRCUIT
2
1
RLO1
TLO1
TLI1
RLI1
CPR
GND
RXO
RXI
RLI2
RLO2
TLO2
TLI2
CPT
VB
FI
4
VCC
3
CD
FO
+
–
+
–
59
8
7
6
HTI
TXO
TXI
HTO+
HTO–
10 12
11 14
13
27
28 2526 24 20
21
22
23 19 17
18 15
16
MUT
MCO
MCI
CT
VLC
VR
VCC
HYBRID
AMP 2 HYBRID
AMP 1
MIC
AMP
VREF
+
–
VR
FILTER
AMP
COMPARATOR
AGC
BACKGROUND
NOISE
DETECTOR
VR
LEVEL
DETECTOR
LEVEL
DETECTOR COMPARATOR
ATTENUATOR
CONTROL BLOCK
BACKGROUND
NOISE
DETECTOR
DIAL
TONE
DETECTOR
LEVEL
DETECTOR
LEVEL
DETECTOR
RX
ATTEN-
UATOR
TX
ATTENUATOR
IC150 MT88E43 (BASE MAIN BOARD)
3
4
5
6
7
8
9
10
16
15
14
1312
11
+
–
BIAS
GENERATOR
ANTI-ALIAS
FILTER
OSCILLATOR
ALERT SIGNAL
HIGH TONE
FILTER
ALERT SIGNAL
LOW TONE
FILTER
TONE
DETECTION
ALGORITHM
GUARD
TIME
INTERRUPT
GENERATOR
CARRIER
DETECTOR
FSK
DEMODUL-
ATOR
FSK
BANDPASS
FILTER
DATA
TIMING
RECOVERY
24
23
22
21
20
19
18
17
1
2
IN+
IN–
GS
VREF
CAP
TRIGIN
TRIGRC
TRIGOUT
MODE
OSCIN
OSCOUT
VSS IC
PWDN
FSKEN
DCLK
DATA
DR
CD
INT
STD
EST
ST/GT
VDD
TO
INTERNAL
CCL
TO
INTERNAL
CCL

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