TDK T3903 User manual

T3903
Bottom Port PDM Digital Output Multi-Mode Microphone
This document contains information on a preproduction
product. Specifications and information herein are
subject to change without notice
TDK Corporation
1745 Technology Drive, San Jose, CA 95110 U.S.A
[phone]
www.tdk.com
Document Number: DS-000358
Revision: 1.0
Release Date: 5/5/2020
GENERAL DESCRIPTION
The T3903 is a multi-mode, low noise digital MEMS
microphone in a small package. The T3903 consists of a
MEMS microphone element and an impedance converter
amplifier followed by a fourth-order Σ-Δ modulator. The digital
interface allows the pulse density modulated (PDM) output of
two microphones to be time multiplexed on a single data line
using a single clock.
The T3903 has multiple modes of operation: High Quality,
Low-Power (AlwaysOn), and Sleep. The T3903 has high SNR in
all operational modes. It has 133 dB SPL AOP in High Quality
Mode and 120 dB SPL AOP in Low-Power mode.
The T3903 is available in a standard 3.5 × 2.65 × 0.98 mm
surface-mount package. It is reflow solder compatible with
no sensitivity degradation.
FUNCTIONAL BLOCK DIAGRAM
APPLICATIONS
•Smartphones
•Microphone Arrays
•Tablet Computers
•Cameras
FEATURES
SPEC
HIGH QUALITY MODE
LOW-POWER MODE
Sensitivity
−37 dB FS ±1 dB
−26 dB FS ±1 dB
SNR
66 dBA
63 dBA
Current
590 µA
220 µA
AOP
133 dB SPL
120 dB SPL
Clock
2.0 MHz to 3.3 MHz
400 kHz to 800 kHz
•3.5 × 2.65 × 0.98 mm surface-mount package
•Extended frequency response from 40 Hz to >20 kHz
•Sleep Mode: 9 µA
•Fourth-order Σ-Δ modulator
•Digital pulse density modulation (PDM) output
•Compatible with Sn/Pb and Pb-free solder processes
•RoHS/WEEE compliant
ORDERING INFORMATION
PART
TEMP RANGE
PACKAGING
MMICT3903-00-012
−40°C to +85°C
13” Tape and Reel
EV_T3903-FX
—
ICS-51360
ADC
POWER
MANAGEMENT
CLK
DATA
VDD
GND
PDM
MODULATOR
CHANNEL
SELECT
SELECT
T3903

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TABLE OF CONTENTS
General Description ..................................................................................................................................................................... 1
Functional Block Diagram ............................................................................................................................................................ 1
Applications ................................................................................................................................................................................. 1
Features ....................................................................................................................................................................................... 1
Ordering Information................................................................................................................................................................... 1
Table of Contents.................................................................................................................................................................................... 2
Specifications .......................................................................................................................................................................................... 4
Table 1. Acoustical/Electrical Characteristics – General.............................................................................................................. 4
Table 2. Acoustical/Electrical Characteristics – High Quality Mode ............................................................................................ 4
Table 3. Acoustical/Electrical Characteristics – Low-Power Mode.............................................................................................. 5
Table 4. Digital Input/Output Characteristics .............................................................................................................................. 5
Table 5. PDM Digital Input/Output.............................................................................................................................................. 6
Timing Diagram............................................................................................................................................................................ 6
Absolute Maximum Ratings.................................................................................................................................................................... 7
Table 6. Absolute Maximum Ratings ........................................................................................................................................... 7
ESD Caution ................................................................................................................................................................................. 7
Soldering Profile........................................................................................................................................................................... 8
Table 7. Recommended Soldering Profile*.................................................................................................................................. 8
Pin Configurations And Function Descriptions ....................................................................................................................................... 9
Table 8. Pin Function Descriptions............................................................................................................................................... 9
Typical Performance Characteristics..................................................................................................................................................... 10
Theory Of Operation............................................................................................................................................................................. 11
PDM Data Format ...................................................................................................................................................................... 11
Table 9. T3903 Channel Setting ................................................................................................................................................. 11
PDM Microphone Sensitivity ..................................................................................................................................................... 11
Applications Information ...................................................................................................................................................................... 13
Low-Power Mode....................................................................................................................................................................... 13
Dynamic Range Considerations ................................................................................................................................................. 13
Connecting PDM Microphones.................................................................................................................................................. 13
Sleep Mode................................................................................................................................................................................ 15
Start-Up Time............................................................................................................................................................................. 15
Supporting Documents ......................................................................................................................................................................... 16
Application Notes – General ...................................................................................................................................................... 16
PCB Design And Land Pattern Layout ................................................................................................................................................... 17
PCB Material And Thickness ...................................................................................................................................................... 17
Handling Instructions............................................................................................................................................................................ 18
Pick And Place Equipment ......................................................................................................................................................... 18
Reflow Solder............................................................................................................................................................................. 18

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Board Wash ............................................................................................................................................................................... 18
Outline Dimensions............................................................................................................................................................................... 19
Ordering Guide .......................................................................................................................................................................... 19
Revision History ......................................................................................................................................................................... 20
Compliance Declaration Disclaimer ...................................................................................................................................................... 21

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Document Number: DS-000358
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SPECIFICATIONS
TABLE 1. ACOUSTICAL/ELECTRICAL CHARACTERISTICS – GENERAL
TA= 25°C, VDD = 1.8 V to 3.3 V, SCK = 2.4 MHz, CLOAD = 30 pF unless otherwise noted. Typical specifications are not guaranteed.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
PERFORMANCE
Directionality
Omni
Output Polarity
Input acoustic pressure vs. output
data
Non-Inverted
Supply Voltage (VDD)
1.65
1.8
3.63
V
Sleep Mode Current (IS)
SCK < 200 kHz, VDD=1.8V
9
µA
1
Note 1: Sleep Mode current is not specified at 3.3V
TABLE 2. ACOUSTICAL/ELECTRICAL CHARACTERISTICS – HIGH QUALITY MODE
TA= 25°C, VDD = 1.8 V to 3.3 V, SCK = 2.4 MHz, CLOAD = 30 pF unless otherwise noted. Typical specifications are not guaranteed.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Sensitivity
1 kHz, 94 dB SPL
−38
−37
−36
dB FS
2
Signal-to-Noise Ratio (SNR)
20 kHz bandwidth, A-weighted
66
dBA
Equivalent Input Noise (EIN)
20 kHz bandwidth, A-weighted
28
dBA SPL
Acoustic Dynamic Range
Derived from EIN and acoustic
overload point
105 dB
Total Harmonic Distortion (THD)
94 dB SPL
0.1
%
Power Supply Rejection (PSR)
20 Hz, 100 mVpp applied to V
DD
1 kHz, 100 mVpp applied to VDD
5 kHz, 100 mVpp applied to VDD
10 kHz, 100 mVpp applied to VDD
20 kHz, 100 mVpp applied to VDD
-86
-109
-98
-96
-81
dB FS(A)
Power Supply Rejection (PSR)
217 Hz, 100 mV p-p square wave
superimposed on VDD = 1.8 V, A-
weighted
-105 dB FS (A)
Power Supply Rejection—Swept Sine
1 kHz sine wave
-109
dB FS
Acoustic Overload Point
10% THD
133
dB SPL
Supply Current (IS)
VDD = 1.8 V, no load
590
µA
Note 2: Sensitivity is relative to the RMS level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density.

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TABLE 3. ACOUSTICAL/ELECTRICAL CHARACTERISTICS – LOW-POWER MODE
TA= 25°C, VDD = 1.8 V to 3.3 V, SCK = 768 kHz, CLOAD = 30 pF unless otherwise noted. Typical specifications are not guaranteed.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Sensitivity
1 kHz, 94 dB SPL
−27
−26
−25
dB FS
3
Signal-to-Noise Ratio (SNR)
8 kHz bandwidth, A-weighted
63
dBA
Equivalent Input Noise (EIN)
8 kHz bandwidth, A-weighted
31
dBA SPL
Acoustic Dynamic Range
Derived from EIN and acoustic overload point
89 dB
Total Harmonic Distortion (THD)
105 dB SPL
0.15
%
Power Supply Rejection (PSR)
217 Hz, 100 mV p-p square wave superimposed on
VDD = 1.8 V, A-weighted
−95 dB FS
Power Supply Rejection—Swept Sine
1 kHz sine wave
−99
dB FS
Acoustic Overload Point
10% THD
120
dB SPL
Supply Current (IS)
VDD = 1.8 V, no load
220
µA
Note 3: Sensitivity is relative to the RMS level of a sine wave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density.
TABLE 4. DIGITAL INPUT/OUTPUT CHARACTERISTICS
TA= 25°C, 1.8 V < VDD < 3.3 V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Input Voltage High (VIH) 0.65 × VDD V
Input Voltage Low (VIL) 0.35 × VDD V
Output Voltage High (V
OH
)
ILOAD = 0.5 mA 0.7 × VDD VDD
V
Output Voltage Low (V
OL
)
ILOAD = 0.5 mA 0 0.3 × VDD
V
Output DC Offset
Percent of full scale
3 %

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TABLE 5. PDM DIGITAL INPUT/OUTPUT
TA= 25°C, 1.8 V < VDD < 3.3 V , unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
MODE SWITCHING
Sleep Time
Time from f
CLK
falling <200 kHz
1
ms
Wake-Up Time
High Quality mode, Sleep Mode to f
CLK
>1.2
MHz, output within 0.5 dB of final sensitivity,
power on
7 ms
Wake-Up Time
Low-Power Mode, Sleep Mode to f
CLK
>400
kHz, output within 0.5 dB of final sensitivity,
power on
7 ms
Switching time
Between Low-Power and High Quality Mode
7
ms
INPUT
tCLKIN Input clock period
303
2500
ns
Clock Frequency (CLK)
Sleep Mode
200
kHz
Low-Power Mode
400
800
kHz
High Quality Mode
2.0
3.3
MHz
Clock Duty Cycle fCLK <3.3 MHz
45
55
%
tRISE CLK rise time (10% to 90% level)
25
ns 4
tFALL CLK fall time (90% to 10% level)
25
ns 4
OUTPUT
t1OUTEN
DATA1 (right) driven after falling clock edge
30
ns
t1OUTDIS
DATA1 (right) disabled after rising clock edge
5
18
ns
t2OUTEN
DATA2 (left) driven after rising clock edge
30
ns
t2OUTDIS
DATA2 (left) disabled after falling clock edge
5
18
ns
Note 4: Guaranteed by design
TIMING DIAGRAM
Figure 1. Pulse Density Modulated Output Timing
tCLKIN
CLK
DATA2
DATA1
t2OUTDIS
t1OUTDIS
t2OUTEN
t1OUTEN
tRISE
tFALL

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ABSOLUTE MAXIMUM RATINGS
Stress above those listed as Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these conditions is not implied. Exposure to the absolute maximum ratings conditions for
extended periods may affect device reliability.
TABLE 6. ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
Supply Voltage (VDD)
−0.3 V to +3.63 V
Digital Pin Input Voltage
−0.3 V to VDD + 0.3 V or 3.63 V, whichever is less
Mechanical Shock
10,000 g
Vibration
Per MIL-STD-883 Method 2007, Test Condition B
Temperature Range
Operating
−40°C to +85°C
Storage
−55°C to +150°C
ESD CAUTION
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can
discharge without detection. Although this
product features patented or proprietary
protection circuitry, damage may occur on
devices subjected to high energy ESD.
Therefore proper ESD precautions should be
taken to avoid performance degradation or
loss of functionality.

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SOLDERING PROFILE
Figure 2. Recommended Soldering Profile Limits
TABLE 7. RECOMMENDED SOLDERING PROFILE*
PROFILE FEATURE
Sn63/Pb37
Pb-Free
Average Ramp Rate (T
L
to T
P
)
1.25°C/sec max
1.25°C/sec max
Preheat
Minimum Temperature
(TSMIN)
100°C 100°C
Maximum Temperature
(TSMAX)
150°C 200°C
Time (TSMIN to TSMAX), tS60 sec to 75 sec 60 sec to 75 sec
Ramp-Up Rate (TSMAX to TL) 1.25°C/sec 1.25°C/sec
Time Maintained Above Liquidous (tL) 45 sec to 75 sec ~50 sec
Liquidous Temperature (TL) 183°C 217°C
Peak Temperature (T
P
)
215°C +3°C/−3°C 260°C +0°C/−5°C
Time Within +5°C of Actual Peak
Temperature (tP)
20 sec to 30 sec 20 sec to 30 sec
Ramp-Down Rate 3°C/sec max
3°C/sec max
Time +25°C (t25°C) to Peak Temperature 5 min max
5 min max
*The reflow profile in Table 7 is recommended for board manufacturing with TDK MEMS microphones. All microphones are also
compatible with the J-STD-020 profile
tP
tL
t25°C TO PEAK TEMPERATURE
tS
PREHEAT
CRITICALZONE
T
L
TO T
P
TEMPERATURE
TIME
RAMP-DOWN
RAMP-UP
T
SMIN
T
SMAX
T
P
T
L

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PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 3. Pin Configuration (Top View, Terminal Side Down)
TABLE 8. PIN FUNCTION DESCRIPTIONS
PIN NAME FUNCTION
1 DATA Digital Output Signal (DATA1 or DATA2)
2 SELECT
Left Channel or Right Channel Select:
DATA 1 (right): SELECT tied to GND
DATA 2 (left): SELECT tied to VDD. In this setting, SELECT should be tied to the same voltage
source as the VDD pin.
3 GND Ground
4 CLK Clock Input to Microphone
5 VDD
Power Supply. For best performance and to avoid potential parasitic artifacts, place a 0.1 µF
(100 nF) ceramic type X7R capacitor between Pin 5 (VDD) and ground. Place the capacitor as
close to Pin 5 as possible.
DATA
VDD
GND
1
2
3
5
4
SELECT
CLK

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TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. Typical Audio Frequency Response, High Quality Mode
Figure 5. THD + N
Figure 6. Power Supply Rejection (PSR) vs. Frequency
Figure 7. Linearity
-20.0
-10.0
0.0
10.0
20.0
10 100 1000 10000
NORMALIZED AMPLITUDE (dB)
FREQUENCY (Hz)
0.01
0.10
1.00
10.00
90 100 110 120 130 140
THD+N (%)
INPUT AMPLITUDE (dB SPL)
High Quality Mode
Low Power Mode
-120.0
-100.0
-80.0
-60.0
-40.0
-20.0
0.0
100 1000 10000
PSRR (dB)
FREQUENCY (Hz)
High Quality Mode
Low Power Mode
-45.00
-40.00
-35.00
-30.00
-25.00
-20.00
-15.00
-10.00
-5.00
0.00
90 100 110 120 130 140
OUTPUT AMPLITUDE (dBFS)
INPUT AMPLITUDE (dB SPL)
High Quality Mode
Low Power Mode

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THEORY OF OPERATION
PDM DATA FORMAT
The output from the DATA pin of the T3903 is in pulse density modulated (PDM) format. This data is the 1-bit output of a fourth-
order Σ-Δ modulator. The data is encoded so that the left channel is clocked on the falling edge of CLK, and the right channel is clocked
on the rising edge of CLK. After driving the DATA signal high or low in the appropriate half frame of the CLK signal, the DATA driver of
the microphone tristates. In this way, two microphones, one set to the left channel and the other to the right, can drive a single DATA
line. See Figure 1 for a timing diagram of the PDM data format; the DATA1 and DATA2 lines shown in this figure are two halves of the
single physical DATA signal. Figure 9 shows a diagram of the two stereo channels sharing a common DATA line.
Figure 9. Stereo PDM Format
If only one microphone is connected to the DATA signal, the output is only clocked on a single edge (Figure 10). For example, a left
channel microphone is never clocked on the rising edge of CLK. In a single microphone application, each bit of the DATA signal is
typically held for the full CLK period until the next transition because the leakage of the DATA line is not enough to discharge the line
while the driver is tristated.
Figure 10. Mono PDM Format
See Table 9 for the channel assignments according to the logic level on the SELECT pin. The setting on the SELECT pin is sampled at
power-up and should not be changed during operation.
TABLE 9. T3903 CHANNEL SETTING
For PDM data, the density of the pulses indicates the signal amplitude. A high density of high pulses indicates a signal near positive
full scale, and a high density of low pulses indicates a signal near negative full scale. A perfect zero (dc) audio signal shows an
alternating pattern of high and low pulses.
The output PDM data signal has a small dc offset of about 3% of full scale. A high-pass filter in the codec that is connected to the digital
microphone and does not affect the performance of the microphone typically removes this dc signal.
PDM MICROPHONE SENSITIVITY
The sensitivity of a PDM output microphone is specified with the unit dB FS (decibels relative to digital full scale). A 0 dB FS sine
wave is defined as a signal whose peak just touches the full-scale code of the digital word (see 10). This measurement convention also
means that signals with a different crest factor may have an RMS level higher than 0 dB FS. For example, a full-scale square wave has an
RMS level of 3 dB FS.
DATA2 (L) DATA2 (L)DATA1 (R) DATA1 (R)
CLK
DATA
DATA1 (R) DATA1 (R) DATA1 (R)
CLK
DATA
SELECT Pin Setting
Channel
Low (tie to GND)
Right (DATA1)
High (tie to VDD)
Left (DATA2)

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This definition of a 0 dB FS signal must be understood when measuring the sensitivity of the T3903. A 1 kHz sine wave at a 94 dB SPL
acoustic input to the T3903 results in an output signal with a −26 dB FS level (low-power mode). The output digital word peaks at
−26 dB below the digital full-scale level. A common misunderstanding is that the output has an RMS level of −29 dB FS; however, this is
not true because of the definition of the 0 dB FS sine wave.
Figure 11. 1 kHz, 0 dB FS Sine Wave
There is not a commonly accepted unit of measurement to express the instantaneous level, as opposed to the RMS level of the
signal, of a digital signal output from the microphone. Some measurement systems express the instantaneous level of an individual
sample in units of D, where 1.0 D is digital full scale. In this case, a −26 dB FS sine wave has peaks at 0.05 D.
1.0
–1.0
–0.8
–0.6
–0.4
–0.2
0
0.2
0.4
0.6
0.8
00.9 1.0
0.80.7
0.60.5
0.4
0.30.2
0.1
DIGITAL AMPLITUDE (D)
TIME (ms)

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APPLICATIONS INFORMATION
LOW-POWER MODE
Low-Power Mode (LPM) enables the T3903 to be used in an AlwaysOn listening mode for keyword spotting and ambient sound
analysis. The T3903 will enter LPM when the frequency of SCK is 768 kHz. In this mode, the microphone consumes only 220 µA while
retaining high electro-acoustic performance.
When one microphone is in LPM for AlwaysOn listening, a second microphone sharing the same data line may be powered down. In
this case, where one microphone is powered up and another is powered down by disabling the VDD supply or in sleep mode by
reducing the frequency of a separate clock source, the disabled microphone does not present a load to the signal on the LPM
microphone’s DATA pin.
DYNAMIC RANGE CONSIDERATIONS
The microphone clips (THD = 10%) at 120 dB SPL in Low-Power Mode and at 133 dB SPL in High Quality Mode (see Figure 5);
however, it continues to output an increasingly distorted signal above that point. The peak output level, which is controlled by the
modulator, limits at 0 dB FS.
To fully use the 105 dB dynamic range of the output data of the T3903 in a design, the digital signal processor (DSP) or codec circuit
following it must be chosen carefully. The decimation filter that inputs the PDM signal from the T3903 must have a dynamic range
sufficiently better than the dynamic range of the microphone so that the overall noise performance of the system is not degraded. If
the decimation filter has a dynamic range of 10 dB better than the microphone, the overall system noise only degrades by 0.4 dB.
This 115 dB filter dynamic range requires the filter to have at least 20 bit resolution.
CONNECTING PDM MICROPHONES
A PDM output microphone is typically connected to a codec with a dedicated PDM input. This codec separately decodes the left and right
channels and filters the high sample rate modulated data back to the audio frequency band. This codec also generates the clock for the
PDM microphones or is synchronous with the source that is generating the clock. Figure 12 and Figure 13 show mono and stereo
connections of the T3903 to a codec. The mono connection shows an T3903 set to output data on the right channel. To output on the
left channel, tie the SELECT pin to VDD instead of tying it to GND.
Figure 12. Mono PDM Microphone (Right Channel) Connection to Codec

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Figure 13. Stereo PDM Microphone Connection to Codec
Decouple the VDD pin of the T3903 to GND with a 0.1 µF capacitor. Place this capacitor as close to VDD as the printed circuit board
(PCB) layout allows.
Do not use a pull-up or pull-down resistor on the PDM data signal line because it can pull the signal to an incorrect state during the period
that the signal line is tristated.
The DATA signal does not need to be buffered in normal use when the T3903 microphone(s) is placed close to the codec on the PCB. If the
DATA signal must be driven over a long cable (>15 cm) or other large capacitive load, a digital buffer may be required. Only use a signal
buffer on the DATA line when one microphone is in use or after the point where two microphones are connected (see Figure 14). The
DATA output of each microphone in a stereo configuration cannot be individually buffered because the two buffer outputs cannot
drive a single signal line. If a buffer is used, take care to select one with low propagation delay so that the timing of the data
connected to the codec is not corrupted.
Figure 14. Buffered Connections Between Stereo T3903s and a Codec
When long wires are used to connect the codec to the T3903, a source termination resistor can be used on the clock output of the
codec instead of a buffer to minimize signal overshoot or ringing. Match the value of this resistor to the characteristic impedance of

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the CLK trace on the PCB. Depending on the drive capability of the codec clock output, a buffer may still be needed, as shown in Figure
14.
SLEEP MODE
The microphone enters sleep mode when the clock frequency falls below 200 kHz. In this mode, the microphone data output is in a high
impedance state. The current consumption in sleep mode is 9 µA.
The microphone wakes up from sleep mode and begins to output data 7 ms after the clock becomes active. The wake-up time indicates
the time from when the clock is enabled to when the T3903 outputs data within 0.5 dB of its settled sensitivity.
START-UP TIME
The start-up time of the T3903 is typically 7 ms, measured by the time from when power and clock are enabled until sensitivity of
the output signal is within 0.5 dB of its settled sensitivity.

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SUPPORTING DOCUMENTS
For additional information, see the following documents.
APPLICATION NOTES – GENERAL
AN-000048, PDM Digital Output MEMS Microphone Flex Evaluation Board User Guide
AN-100, MEMS Microphone Handling and Assembly Guide
AN-1003, Recommendations for Mounting and Connecting the TDK, Bottom-Ported MEMS Microphones
AN-1112, Microphone Specifications Explained
AN-1124, Recommendations for Sealing TDK Bottom-Port MEMS Microphones from Dust and Liquid Ingress
AN-1140, Microphone Array Beamforming

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PCB DESIGN AND LAND PATTERN LAYOUT
The recommended PCB land pattern for the T3903 is a 1:1 ratio of the solder pads on the microphone package, as shown in Figure 15.
Avoid applying solder paste to the sound hole in the PCB. A suggested solder paste stencil pattern layout is shown in Figure 16.
The response of the T3903 is not affected by the PCB hole size as long as the hole is not smaller than the sound port of the
microphone (0.375 mm in diameter). A 0.5 mm to 1 mm diameter for the hole is recommended. Take care to align the hole in the
microphone package with the hole in the PCB. The exact degree of the alignment does not affect the microphone performance as long
as the holes are not partially or completely blocked.
Figure 15. Recommended PCB Land Pattern Layout
Figure 16. Suggested Solder Paste Stencil Pattern Layout
PCB MATERIAL AND THICKNESS
The performance of the T3903 is not affected by PCB thickness. The T3903 can be mounted on either a rigid or flexible PCB. A
flexible PCB with the microphone can be attached directly to the device housing with an adhesive layer. This mounting method
offers a reliable seal around the sound port while providing the shortest acoustic path for good sound quality.
Ø1.025
Ø1.625
0.522x0.725(4X)
1.252
0.822
1.675
0.838
1.252
0.822
1.675
0.1(4x)
Ø1.125
Ø1.625
0.422x0.625(4X)

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HANDLING INSTRUCTIONS
PICK AND PLACE EQUIPMENT
The MEMS microphone can be handled using standard pick-and-place and chip shooting equipment. Take care to avoid damage to the
MEMS microphone structure as follows:
•Use a standard pickup tool to handle the microphone. Because the microphone hole is on the bottom of the package, the
pickup tool can make contact with any part of the lid surface.
•Do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone.
Do not pull air out of or blow air into the microphone port.
•Do not use excessive force to place the microphone on the PCB.
REFLOW SOLDER
For best results, the soldering profile must be in accordance with the recommendations of the manufacturer of the solder paste used to
attach the MEMS microphone to the PCB. It is recommended that the solder reflow profile not exceed the limit conditions specified
in Figure 2 and Table 7.
BOARD WASH
When washing the PCB, ensure that water does not make contact with the microphone port. Do not use blow-off procedures or
ultrasonic cleaning.

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OUTLINE DIMENSIONS
Figure 17. 5-Terminal Chip Array Small Outline No Lead Cavity [LGA_CAV]
3.5 mm × 2.65 mm × 0.98 mm Body
Dimensions shown in millimeters
Dimension tolerance is ±0.15 mm unless otherwise specified
Figure 18. Package Marking Specification (Top View)
ORDERING GUIDE
PART
TEMP RANGE
PACKAGE
QUANTITY
PACKAGING
MMICT3903-00-012
−40°C to +85°C
5-Terminal LGA_CAV
10,000
13” Tape and Reel
EV_T3903-FX
—
Evaluation Board
—

T3903
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Document Number: DS-000358
Revision: 1.0
REVISION HISTORY
REVISION DATE REVISION DESCRIPTION
1/15/20 0.1 Initial preliminary version
5/5/20 1.0 Initial release