
Theory
of
Operation-TG
501
Decade
Dividers
The
decade
dividers
operate
continuously
;
however,
the
output
is
selected
by
enabling the appropriate
enable
logic
gate
with
a
low,
via
the
cam
switch
S350
.
The
=10
dividers
are
U355,U360,U362, U364, U368,
and
U372
.
The
NAND
enable
logic
gates are
U330B,
U350B-C,
U190A-C-
D
and
U366A-B-C-D
.
The
square-wave
pulses
from
the
logic
gates are
differentiated
by
an
RC
circuit
using
capacitors
C358,C360,C362, C366, C368,
C370
and
C372
.
The
resistance
for
the
RC
circuit
is
selected
by
cam
switch
S350
via
the
5-2-1
sequence
logic
gates,
depending
upon
the
timing
position
in
the
5-2-1
sequence
.
The
selection
of
the
resistance
for
the
RC
circuit
determines
the slope
of
the
falli
ngedge
of
the
marker
and
hence
controls
the
marker
brightness
.
R385,
the
largest
resistance,
is
selected
in
all
positions
of
the
5-2-1
se-
quence
.
In
the
2
position,
a
low
from
the
5-2-1
sequence
logic
gate
turns
on
Q384
and
connects
R384
in
parallel
.
with
R385, reducing
the
resistance
and
the marker
brightness
.
In
the
1
position,
Q380
turns on
and
R381
parallels
R385
to
reduce
the
resistance
and
brightness
from
that
obtained
in
the 2
position
.
0405
provides a stage
of
isolation
between
the
decade
dividers
and
the
low
speed
marker
output
amplitude
.
The
isolation
stage
increasesthe
impedance
seen
by the
input
to
the
low
speed
marker
output
operational
amplifier
.
Low
Speed
MarkerOutput
Amplifier
The
low
speed
marker
output
amplifier
is
an
operational
amplifier
having
a
gain
of
1
.5
.
The
amplifier
consists
of
Q408
and
Q415
with
R406
and
R410
being the
input
resistor
and
feedback
resistor
respectively
.
3-
4
DIAGRAM
3
10
ns,
20
ns,
50 ns
MarkerOutput
Amplifier
Q390
and
0400
form
an
emitter
coupled
switch
that
is
controlled
by
U300D,
and
ECL
enable
logic
gate
.
U300D
requires
a
lowfrom
the 10
ns,
20
ns,
or
50
ns
logic
gateto
pass the
square-wave
.
The
square-wave
at
output
pins
15
and
9
of
U300D
is
differentiated
by
RC
networks
C390-
R394
andC400-R400
.
The
differentiated
signal
is
coupled
through
Q400
as
long
as
pin
13
of
U300D
remains
low
.
The
output
from
Q400
is
summed
with
the output
from
thelow
speed
marker
output
amplifier
and
supplied
to the
MARKER
OUT
connectorJ470
.
Trigger
Output
At
MARKER
Control
settings
of
5
s
through
.1
Ns
the
marker
available
at
the
MARKER
OUT
connector
is
used
as
a
slave
trigger
.
The
slave
trigger
from
the low
speed
marker
output
amplifier
is
coupled
through
emitter
followers
Q430
and
Q435
and
made
available
at
+
TRIGGER
OUT
connectorJ435
.
At
Marker
Control
settings of
50
ns
and
faster,
the
trigger
signal
rate
available
at
the
+
TRIGGER
OUT
connector
remains
.1
has
.
The
.1
/is
output
is
obtained
by
enabling
logic
gates
U235D
and
U330D
.
Enabling
U330D
allows
the
output
square-wave
from
U320
to
be
differen-
tiated
by
RC
networkR445-C440,
then
amplified
by
Q440
before
being
coupled
to
the
+
TRIGGER
OUT
connector
via
emitter
follower
0435
.
The
rc
network
determines
the
width
and
amplitude
of
the
trigger
signal,
while
R439-C439
network
in
the
emitter
of
Q440
controls
the
signal
gain
.
R445
High
Speed
trigger
amplitude
provides
a
means
of
adjusting
the high
speed
trigger
amplitude
to
match
the
low
speed
trigger
amplitude
.
REV
B
AUG
1980
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