Texas Instruments TPS53310EVM-755 User manual

User's Guide
SLUU826–January 2012
Using the TPS53310EVM-755, A 3-A Eco-mode™
Integrated Switcher With Master-Slave
The TPS53310EVM-755 evaluation module (EVM) is a high-efficiency evaluation platform with two
TPS53310 3-A, integrated FET, step-down converters working in a Master-Slave synchronization scheme.
The two outputs are 1.5 V/3 A (master) and 1.2 V/3 A (slave) from a 3.3-V or 5-V input bus. The EVM
uses the TPS53310 synchronous buck controller with integrated switcher.
Contents
1 Description ................................................................................................................... 3
1.1 Typical Applications ................................................................................................ 3
1.2 Features ............................................................................................................. 3
2 Electrical Performance Specifications .................................................................................... 3
3 Schematic .................................................................................................................... 5
4 Test Setup ................................................................................................................... 6
4.1 Test Equipment ..................................................................................................... 6
4.2 Recommended Test Setup ....................................................................................... 7
5 Configuration ................................................................................................................ 8
5.1 5Vin Option (J1: 5Vin Option) .................................................................................... 8
5.2 Mode Selection (J2: MST Mode) ................................................................................. 8
5.3 Mode Selection (J7: SLV Mode) ................................................................................. 8
5.4 Synchronization (J5: SYNC) ...................................................................................... 8
5.5 Master Enable (J4: EN_MST) .................................................................................... 9
5.6 Slave Enable (J9: EN_SLV) ...................................................................................... 9
6 Test Procedure .............................................................................................................. 9
6.1 Line/Load Regulation and Efficiency Measurement Procedure .............................................. 9
6.2 Loop Gain/Phase Measurement ................................................................................. 9
6.3 List of Test Points ................................................................................................ 10
6.4 Equipment Shutdown ............................................................................................ 10
7 Performance Data and Typical Characteristic Curves ................................................................ 10
7.1 Efficiency .......................................................................................................... 11
7.2 Load Regulation .................................................................................................. 11
7.3 Line Regulation ................................................................................................... 12
7.4 1.5-V Output Ripple .............................................................................................. 12
7.5 1.5-V Switching Node at Full Load ............................................................................. 13
7.6 1.5-V Switching Node at No Load .............................................................................. 13
7.7 Master-Slave 180°Synchronization ............................................................................ 14
7.8 1.5-V Master Turnoff During Master-Slave Synchronization ................................................ 14
7.9 1.5-V Output Transient ........................................................................................... 15
7.10 1.5-V Turnon Waveform ......................................................................................... 15
7.11 1.5-V Turnoff Waveform ......................................................................................... 16
7.12 1.5-V Hiccup OCP Waveform ................................................................................... 16
7.13 1.5-V Bode Plot ................................................................................................... 17
7.14 EVM Top Board Thermal Image ................................................................................ 17
8 EVM Assembly Drawings and PCB Layout ............................................................................ 18
9 Bill of Materials ............................................................................................................. 22
Eco-mode is a trademark of Texas Instruments.
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List of Figures
1 TPS53310EVM-755 Schematic .......................................................................................... 5
2 Tip and Barrel Measurement for Vout Ripple ........................................................................... 6
3 TPS53310EVM-755 Recommended Test Setup ....................................................................... 7
4 TPS53310EVM-755 Efficiency........................................................................................... 11
5 TPS53310EVM-755 Load Regulation .................................................................................. 11
6 TPS53310EVM-755 Line Regulation ................................................................................... 12
7 TPS53310EVM-755 Output Ripple (3.3 Vin, 1.5 V/3 A).............................................................. 12
8 TPS53310EVM-755 Switching Node at Full Load (5 Vin, 1.5 V/3 A)............................................... 13
9 TPS53310EVM-755 Switching Node at No Load (5 Vin, 1.5 V/0 A DE Mode).................................... 13
10 TPS53310EVM-755 Synchronization (3.3 Vin, 1.5 V/3 A, 1.2 V/3 A 180°Synchronization).................... 14
11 TPS53310EVM-755 Synchronization (3.3 Vin, 1.5 V/3 A, 1.2 V/3 A 180°Synchronization, Then Turn Off
Master)...................................................................................................................... 14
12 TPS53310EVM-755 1.5-V Output Transient (5 Vin, 1.5 V/0 A-3 A ) ............................................... 15
13 TPS53310EVM-755 Enable Turns On Waveform (3.3 Vin, 1.5 V/3 A)............................................. 15
14 TPS53310EVM-755 Enable Turns Off Waveform (3.3 Vin, 1.5 V/3 A)............................................. 16
15 TPS53310EVM-755 Hiccup OCP Waveform (5 Vin, 1.5 V/5.5 A OCP)............................................ 16
16 TPS53310EVM-755 Bode Plot (3.3 Vin, 1.5 V/3 A)................................................................... 17
17 TPS53310EVM-755 Top-Side Thermal Image (3.3 Vin, 1.5 V/3 A, 1.2 V/3 A).................................... 17
18 TPS53310EVM-755 Top Layer Assembly Drawing, Top View...................................................... 18
19 TPS53310EVM-755 Bottom Assembly Drawing, Bottom View...................................................... 19
20 TPS53310EVM-755 Top Copper, Top View........................................................................... 19
21 TPS53310EVM-755 Internal Layer 2, Top View ...................................................................... 20
22 TPS53310EVM-755 Internal Layer 3, Top View ...................................................................... 20
23 TPS53310EVM-755 Bottom Copper, Top View....................................................................... 21
List of Tables
1 TPS53310EVM-755 Electrical Performance Specifications........................................................... 3
2 5Vin Option .................................................................................................................. 8
3 Master Mode Selection..................................................................................................... 8
4 Slave Mode Selection ...................................................................................................... 8
5 Synchronization Selection ................................................................................................. 8
6 Master Enable Selection ................................................................................................... 9
7 Slave Enable Selection..................................................................................................... 9
8 Functions of Each Test Points........................................................................................... 10
9 Bill of Materials............................................................................................................. 22
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www.ti.com Description
1 Description
The TPS53310EVM-755 uses a regulated 3.3-V or 5-V bus to produce outputs at up to 3 A of load
current. The output is 1.5-V master and 1.2-V slave. The TPS53310EVM-755 is designed to demonstrate
the TPS53310 in a typical low-voltage application while providing test points to evaluate the performance
of the TPS53310.
1.1 Typical Applications
•Servers, notebook/netbook computers
•Multifunction printers (MFP)
•Embedded personal computers, POS terminals
•Switches, routers
•Low-voltage, point-of-load converters
•Any Energy Star/80Plus low-voltage rail
1.2 Features
The TPS53310EVM-755 features:
•1.5-V master and 1.2-V slave outputs
•3-Adc steady-state current
•1.1-MHz switching frequency
•Hiccup overcurrent protection
•J1: selectable 3.3-V or 5-V input voltage
•J2, J7: selectable FCCM, DE, HEF mode
•J5: selectable master and slave interleaved operation
•J4, J9 for master and slave enable function
•Loop gain measurement
•Convenient test points for probing critical waveforms
•Four-layer PCB with 2 oz of copper on the outside layers
2 Electrical Performance Specifications
Table 1. TPS53310EVM-755 Electrical Performance Specifications
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
INPUT CHARACTERISTICS
VIN input voltage range* Vin 2.9 3.3/5 6 V
Maximum input current Vin = 3.3 V, 1.5 V/ 3 A, 1.2 V/3 A, FCCM 2.82 A
No-load input current Vin = 3.3 V, 1.5 V/0 A, 1.2 V/0 A, FCCM 40 mA
OUTPUT CHARACTERISTICS
Master output voltage Vo_MST 1.485 1.5 1.515 V
Slave output voltage Vo_SLV 1.188 1.2 1.212 V
Output voltage regulation Line regulation 0.1 %
Load regulation 1.0 %
Output voltage ripple Vin = 3.3 V, 1.5 V/0 A-3 A, 1.2 V/0 A-3 A 20 mVpp
Output load current 0 3 A
Output over current 4.5 A
SYSTEMS CHARACTERISTICS
Switching frequency Fixed 1.1 MHz
1.5-V, full-load efficiency Vin = 3.3 V, 1.5 V/3 A 88.82 %
1.5-V, full-load efficiency Vin = 5 V, 1.5 V/3 A 89.50 %
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Electrical Performance Specifications www.ti.com
Table 1. TPS53310EVM-755 Electrical Performance Specifications (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
1.2-V, full-load efficiency Vin = 3.3 V, 1.2 V/3 A 86.50 %
1.2-V, full-load efficiency Vin = 5 V, 1.2 V/3 A 87.32 %
Operating temperature 25 ºC
Note: Jumpers set to default locations; see Section 5 of this user’s guide.
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Notused
ModeConfiguration:Seedatasheetfordetail Enabl
e
1.JumpershortsonJ4andJ9:Disabletheconverter(Defaultsetting)
2.NoJumpershortsonJ4andJ9:Enabletheconverter
SYNCoption
1.JumpershortsonJ5:Masterandslavearesynchronized(Defaultsetting)
2.NoJumpershortsonJ5:Masterandslavearenotsynchr
onized
5Vinoption
1.J
umpershortacrosspin1andpin2ofJ1:Setsinputfor3.3Voperation(Defaultsetting).
2.Jumpershor
tacrosspin2andpin3ofJ1:Setsinputfor5Vinoperation
www.ti.com Schematic
3 Schematic
Figure 1. TPS53310EVM-755 Schematic
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TP10(21)TP7(19)
Metal Ground Barrel
Probe Tip
Test Setup www.ti.com
4 Test Setup
4.1 Test Equipment
Voltage Source VIN:
The input voltage source VIN must be a 0-V to 6-V variable dc source capable of supplying 3 Adc.
Connect Vin to J6 as shown in Figure 3.
Multimeters: V1:
Vin at TP5 (Vin_MST) and TP8 (GND)
V2: 1.5 Vout at TP7 (Vout_MST) and TP10 (GND)
V3: 1.2 Vout at TP19 (Vout_SLV) and TP21 (GND)
A1: Vin input current
Output Load:
Load1: The output load1 must be an electronic constant-resistance-mode load capable of 0 Adc to 5 Adc
at 1.5 V.
Load2: The output load2 must be an electronic constant-resistance-mode load capable of 0 Adc to 5 Adc
at 1.2 V.
Oscilloscope:
A digital or analog oscilloscope can be used to measure the output ripple. The oscilloscope must be set
for 1-MΩimpedance, 20-MHz bandwidth, ac coupling, 1-µs/division horizontal resolution, 20-mV/division
vertical resolution. Test points TP7, TP10 can be used to measure 1.5-V master output ripple voltage.
TP19 and TP21 can be used to measure 1.2-V slave output ripple voltage. Place the oscilloscope probe
tip through TP7 (TP19), and hold the ground barrel TP10 (TP21) as shown in Figure 2.
Do not use a leaded ground connection as this may induce additional noise due to the large ground loop.
Figure 2. Tip and Barrel Measurement for Vout Ripple
Recommended Wire Gauge:
1. Vin to J6: The recommended wire size is AWG 16 per input connection, with the total length of wire
less than 4 feet (2-foot input, 2-foot return).
2. J3 to LOAD1 the minimum recommended wire size is AWG 16, with the total length of wire less than 4
feet (2-foot input, 2-foot return)
3. J8 to LOAD2 the minimum recommended wire size is AWG16, with the total length of wire less than 4
feet (2-foot input, 2-foot return)
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I
T
SNSTRUMENT
EXAS
V1
DC
Source
VIN
A1
V2 Load1
V3 Load2
www.ti.com Test Setup
4.2 Recommended Test Setup
Figure 3. TPS53310EVM-755 Recommended Test Setup
Figure 3 is the recommended test setup to evaluate the TPS53310EVM-755. When working at an ESD
workstation, make sure that any wrist straps, bootstraps, or mats are connected referencing the user to
earth ground before handling the EVM.
Input Connections:
1. Prior to connecting the dc input source VIN, it is advisable to limit the source current from VIN to 5 A
maximum. Ensure that VIN is set initially to 0 V and connected as shown in Figure 3.
2. Connect a voltmeter V1 at TP5 (Vin_MST) and TP8 (GND) to measure input voltage.
3. Connect a current meter A1 between VIN DC source and J6.
Output Connections:
1. Connect Load1 to J3, and set Load to constant resistance mode to sink 0 Adc before Vin is applied.
2. Connect a voltmeter V2 at TP7 (Vout_MST) and TP10 (GND) to measure the 1.5-V output voltage.
3. Connect Load2 to J8, and set Load to constant resistance mode to sink 0 Adc before Vin is applied.
4. Connect a voltmeter V3 at TP19 (Vout_SLV) and TP21 (GND) to measure the 1.2-V output voltage.
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Configuration www.ti.com
5 Configuration
All jumper selections must be made prior to applying power to the EVM. Users can configure this EVM per
following configurations.
5.1 5Vin Option (J1: 5Vin Option)
The 5-V input option can be set by
J1 Default setting: 3.3Vin.
Table 2. 5Vin Option
Jumper Set to Input Voltage
1-2 pin shorted 3.3Vin
2-3 pin shorted 5Vin
5.2 Mode Selection (J2: MST Mode)
The Master mode selection can be set by J2.
Default setting: FCCM_Mst
Table 3. Master Mode Selection
Jumper set to Mode
Left (1-2 pin shorted) FCCM Slave
Second (3-4 pin shorted) DE Slave
Third (5-6 pin shorted) HEF
Fourth (7-8 pin shorted) Reserved
Fifth (9-10 pin shorted) DE Master
Right(11-12 pin shorted) FCCM Master
5.3 Mode Selection (J7: SLV Mode)
The Slave mode selection can be set by J7.
Default setting: FCCM_Slave
Table 4. Slave Mode Selection
Jumper set to Mode
Left (1-2 pin shorted) FCCM Slave
Second (3-4 pin shorted) DE Slave
Third (5-6 pin shorted) HEF
Fourth (7-8 pin shorted) Reserved
Fifth (9-10 pin shorted) DE Master
Right(11-12 pin shorted) FCCM Master
5.4 Synchronization (J5: SYNC)
The synchronization for input interleaving can be set by J5.
Default setting: Jumper on J5, Master and Slave 180°Interleaved
Table 5. Synchronization Selection
Jumper set to Master and Slave Synchronization
Jumper shorts on J5 Yes
No Jumper on J5 No
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5.5 Master Enable (J4: EN_MST)
The Master Enable can be set by J4.
Default setting: Jumper on J4
Table 6. Master Enable Selection
Jumper set to Enable/Disable Controller
Jumper shorts on J4 Disable 1.5-V Master output
No Jumper on J4 Enable 1.5-V Master output
5.6 Slave Enable (J9: EN_SLV)
The Slave Enable can be set by J9.
Default setting: Jumper on J9
Table 7. Slave Enable Selection
Jumper set to Enable/Disable Controller
Jumper shorts on J9 Disable 1.2-V Master output
No Jumper on J9 Enable 1.2-V Master output
6 Test Procedure
6.1 Line/Load Regulation and Efficiency Measurement Procedure
1. Ensure that Load1 and Load2 are set to constant resistance mode and sink 0 A.
2. Ensure that all jumper configuration settings are per Section 5.
3. Ensure that jumpers short on J4, J9 before Vin is applied.
4. Increase Vin from 0 V to 3.3 V. Use V1 to measure input voltage.
5. Remove jumper from J4 to enable the master controller.
6. Vary Load1 from 0 A to 3 A; 1.5-V master output must remain in load regulation.
7. Vary Vin from 2.9 V to 3.5 V; 1.5-V master output must remain in line regulation.
8. Remove jumper from J9 to enable the slave controller.
9. Vary Load2 from 0 A to 3 A; 1.2-V slave output must remain in load regulation.
10. Vary Vin from 2.9 V to 3.5 V; 1.2-V slave output must remain in line regulation.
11. Measure the waveforms of SW_MST (TP6) and SW_SLV (TP18) to see master-slave 180°
interleaved.
12. Put jumpers on J4, J9 to disable master and slave controller.
13. Decrease Load1 and Load2 to 0 A.
14. Decrease Vin to 0 V.
6.2 Loop Gain/Phase Measurement
1. Set up the EVM as described in Section 6.1 and Figure 3. Measure 1.5-V bode plot.
2. Connect the isolation transformer to CHA_MST and CHB_MST.
3. Connect input signal CHA to TP1(CHA_MST), and connect output signal CHB to TP2 (CHB_MST).
4. Connect the GND lead of CHA and CHB to TP25(GND).
5. Inject approximately a 50-mV or less signal through the isolate transformer.
6. Sweep the frequency from 500 Hz to 1 MHz with a 10-Hz or lower post filter. The control loop gain and
phase margin can be measured.
7. Disconnect isolate transformer from the bode plot setup before making other measurements. (Signal
injection into feedback may interfere with accuracy of other measurement.)
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8. The loop measurement for 1.2-V slave output is the same with 1.5-V master output.
6.3 List of Test Points
Table 8. Functions of Each Test Points
Test Points Name Description
TP1(1) CHA_MST Input A for 1.5-V loop injection
TP2 CHB_MST Input B for 1.5-V loop injection
TP3 3.3VDD 3.3VDD
TP4 GND Ground
TP5 Vin_MST Input voltage for 1.5-V master
TP6 SW_MST Switching node for 1.5-V master
TP7 Vout_MST 1.5-V output
TP8 GND Ground
TP9 EN_MST Enable for 1.5-V master
TP10 GND Ground
TP11 GND Ground
TP12 SYNC_MST SYNC signal for 1.5-V master
TP13 PG_MST Power Good for 1.5-V master
TP14 CHA_SLV Input A for 1.2-V loop injection
TP15 CHB_SLV Input B for 1.2-V loop injection
TP16 Vin_SLV Input voltage for 1.2-V slave
TP17 GND Ground
TP18 SW_SLV Switching node for 1.2-V slave
TP19 Vout_SLV 1.2-V output
TP20 SYNC_SLV SYNC signal for 1.2-V slave
TP21 GND Ground
TP22 EN_SLV Enable for 1.2-V slave
TP23 PG_SLV Power Good for 1.2-V slave
TP24 GND Ground
TP25 GND Ground
TP26 GND Ground
(1) For test point locations, see Figure 3.
6.4 Equipment Shutdown
1. Shut down load.
2. Shut down Vin.
3. Shut down oscilloscope.
7 Performance Data and Typical Characteristic Curves
Figure 4 through Figure 17 present typical performance curves for TPS53310EVM-755. Jumpers set to
default locations; see Section 6.
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0
10
20
30
40
50
60
70
80
90
100
Efficiency - %
0.001 0.01 0.1 1 10
I - Output Current - A
O
3.3 V ,1.5 V
I O
5 V ,1.5 V
I O
3.3 V ,1.2 V
I O
5 V ,1.2 V
I O
1
1.1
1.2
1.3
1.4
1.5
1.6
1.5V/1.2V Output Voltage - V
0 0.5 1 1.5 2 2.5 3
I - Output Current - A
O
3.3Vin, 1.5Vout,FCCM
5Vin,1.5Vout, FCCM
3.3Vin,1.5Vout, DE
5Vin, 1.5Vout, DE
3.3Vin, 1.5Vout, HEF
5Vin, 1.5Vout, HEF
3.3Vin, 1.2Vout, FCCM
5Vin, 1.2Vout, FCCM
3.3Vin, 1.2Vout, DE
5Vin, 1.2Vout, DE
3.3Vin, 1.2Vout, HEF
5Vin, 1.2Vout, HEF
www.ti.com Performance Data and Typical Characteristic Curves
7.1 Efficiency
NOTE: R-C snubber to reduce switching node ringing has effect on dc-dc converter efficiency.
Figure 4. TPS53310EVM-755 Efficiency
7.2 Load Regulation
Figure 5. TPS53310EVM-755 Load Regulation
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2.9 3.4 3.9 4.4 4.9 5.4 5.9 6.4
V - Input Voltage - V
I
1
1.1
1.2
1.3
1.4
1.5
1.6
1.5V/1.2V Output Voltage - V
1.5Vout/0A, FCCM
1.5Vout/3A, FCCM
1.5Vout/0A, DE
1.5Vout/3A, DE
1.5Vout/0A, HEF
1.5Vout/3A, HEF
1.2Vout/0A, FCCM
1.2Vout/3A, FCCM
1.2Vout/0A, DE
1.2Vout/3A, DE
1.2Vout/0A, HEF
1.2Vout/3A, HEF
TPS53310EVM-755
Output Ripple Test condition: 3.3Vin, 1.5V/3A, FCCM
CH1: 1.5V_MST Output Ripple
Performance Data and Typical Characteristic Curves www.ti.com
7.3 Line Regulation
Figure 6. TPS53310EVM-755 Line Regulation
7.4 1.5-V Output Ripple
Figure 7. TPS53310EVM-755 Output Ripple (3.3 Vin, 1.5 V/3 A)
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TPS53310EVM-755
1.5Vout Switching Node
Test condition: 5Vin, 1.5V/3A, FCCM
CH2: SW_MST
TPS53310EVM-755
1.5Vout Switching Node
Test condition: 5Vin, 1.5V/0A, DE
CH2: SW_MST
www.ti.com Performance Data and Typical Characteristic Curves
7.5 1.5-V Switching Node at Full Load
Figure 8. TPS53310EVM-755 Switching Node at Full Load (5 Vin, 1.5 V/3 A)
7.6 1.5-V Switching Node at No Load
Figure 9. TPS53310EVM-755 Switching Node at No Load (5 Vin, 1.5 V/0 A DE Mode)
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Test condition: 3.3Vin, 1.5V/3A, FCCM
TPS53310EVM-755
Master-Slave Synchronization
CH2: SW_SLV
CH1: SW_MST
TPS53310EVM-755
Master-Slave Synchronization Test condition: 3.3Vin, 1.5V/3A, FCCM
1.5V Master Enable Turn off
CH1: EN_MST
CH2: SW_MST
CH3: EN_SLY
CH4: SW_SLV
Performance Data and Typical Characteristic Curves www.ti.com
7.7 Master-Slave 180°Synchronization
Figure 10. TPS53310EVM-755 Synchronization
(3.3 Vin, 1.5 V/3 A, 1.2 V/3 A 180°Synchronization)
7.8 1.5-V Master Turnoff During Master-Slave Synchronization
Figure 11. TPS53310EVM-755 Synchronization
(3.3 Vin, 1.5 V/3 A, 1.2 V/3 A 180°Synchronization, Then Turn Off Master)
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Test condition: 5Vin, 1.5V/0A-3A, FCCM
TPS53310EVM-755
Transient Response
CH1: 1.5Voutput
CH2: SW_MST
CH3: 1.5Voutput current 0A-3A
Test condition: 3.3Vin, 1.5V/3A, FCCM
TPS53310EVM-755
1.5V Enable Start up
CH1: EN_MST
CH2: 1.5Voutput
CH3: SW_MST
CH3: PG_MST
www.ti.com Performance Data and Typical Characteristic Curves
7.9 1.5-V Output Transient
Figure 12. TPS53310EVM-755 1.5-V Output Transient (5 Vin, 1.5 V/0 A-3 A )
7.10 1.5-V Turnon Waveform
Figure 13. TPS53310EVM-755 Enable Turns On Waveform
(3.3 Vin, 1.5 V/3 A)
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Test condition: 3.3Vin, 1.5V/3A, FCCM
TPS53310EVM-755
1.5V Enable Turn off
CH1: EN_MST
CH2: 1.5Voutput
CH3: SW_MST
CH4: PG_MST
CH1: 1.5Vout
Test condition: 5Vin, 1.5V/5.5A, OCP, FCCM
CH3: PG_MST
TPS53310EVM-755
1.5Vout Hiccup OCP
CH2: SW_MST
Performance Data and Typical Characteristic Curves www.ti.com
7.11 1.5-V Turnoff Waveform
Figure 14. TPS53310EVM-755 Enable Turns Off Waveform
(3.3 Vin, 1.5 V/3 A)
7.12 1.5-V Hiccup OCP Waveform
Figure 15. TPS53310EVM-755 Hiccup OCP Waveform
(5 Vin, 1.5 V/5.5 A OCP)
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www.ti.com Performance Data and Typical Characteristic Curves
7.13 1.5-V Bode Plot
Figure 16. TPS53310EVM-755 Bode Plot (3.3 Vin, 1.5 V/3 A)
7.14 EVM Top Board Thermal Image
Figure 17. TPS53310EVM-755 Top-Side Thermal Image
(3.3 Vin, 1.5 V/3 A, 1.2 V/3 A)
17
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EVM Assembly Drawings and PCB Layout www.ti.com
8 EVM Assembly Drawings and PCB Layout
The following figures (Figure 18 through Figure 23) show the design of the TPS53310EVM-755
printed-circuit board. The EVM has been designed using a four-layer circuit board with 2 oz of copper on
the outside layers.
Figure 18. TPS53310EVM-755 Top Layer Assembly Drawing, Top View
18 Using the TPS53310EVM-755, A 3-A Eco-mode™Integrated Switcher With SLUU826–January 2012
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www.ti.com EVM Assembly Drawings and PCB Layout
Figure 19. TPS53310EVM-755 Bottom Assembly Drawing, Bottom View
Figure 20. TPS53310EVM-755 Top Copper, Top View
19
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EVM Assembly Drawings and PCB Layout www.ti.com
Figure 21. TPS53310EVM-755 Internal Layer 2, Top View
Figure 22. TPS53310EVM-755 Internal Layer 3, Top View
20 Using the TPS53310EVM-755, A 3-A Eco-mode™Integrated Switcher With SLUU826–January 2012
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